Lines Matching refs:MVPP2_PRS_LU_VID
570 mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_VID); in mvpp2_prs_dsa_tag_set()
746 mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_VID); in mvpp2_prs_vlan_add()
1283 mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_VID); in mvpp2_prs_vid_init()
1300 mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_VID); in mvpp2_prs_vid_init()
1308 mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_VID); in mvpp2_prs_vid_init()
1326 mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_VID); in mvpp2_prs_vid_init()
1571 mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_VID); in mvpp2_prs_vlan_init()
1941 port->priv->prs_shadow[tid].lu != MVPP2_PRS_LU_VID) in mvpp2_prs_vid_range_find()
1994 mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_VID); in mvpp2_prs_vid_entry_add()
2019 mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_VID); in mvpp2_prs_vid_entry_add()
2090 mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_VID); in mvpp2_prs_vid_enable_filtering()
2112 mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_VID); in mvpp2_prs_vid_enable_filtering()