Lines Matching +full:0 +full:x02000000

12 #define E1000_IVAR_VALID	0x80
15 #define E1000_RXD_STAT_DD 0x01 /* Descriptor Done */
16 #define E1000_RXD_STAT_EOP 0x02 /* End of Packet */
17 #define E1000_RXD_STAT_IXSM 0x04 /* Ignore checksum */
18 #define E1000_RXD_STAT_VP 0x08 /* IEEE VLAN Packet */
19 #define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum calculated */
20 #define E1000_RXD_STAT_TCPCS 0x20 /* TCP xsum calculated */
21 #define E1000_RXD_STAT_IPCS 0x40 /* IP xsum calculated */
22 #define E1000_RXD_ERR_SE 0x02 /* Symbol Error */
23 #define E1000_RXD_SPC_VLAN_MASK 0x0FFF /* VLAN ID is in lower 12 bits */
25 #define E1000_RXDEXT_STATERR_LB 0x00040000
26 #define E1000_RXDEXT_STATERR_CE 0x01000000
27 #define E1000_RXDEXT_STATERR_SE 0x02000000
28 #define E1000_RXDEXT_STATERR_SEQ 0x04000000
29 #define E1000_RXDEXT_STATERR_CXE 0x10000000
30 #define E1000_RXDEXT_STATERR_TCPE 0x20000000
31 #define E1000_RXDEXT_STATERR_IPE 0x40000000
32 #define E1000_RXDEXT_STATERR_RXE 0x80000000
43 #define E1000_CTRL_RST 0x04000000 /* Global reset */
46 #define E1000_STATUS_FD 0x00000001 /* Full duplex.0=half,1=full */
47 #define E1000_STATUS_LU 0x00000002 /* Link up.0=no,1=link */
48 #define E1000_STATUS_TXOFF 0x00000010 /* transmission paused */
49 #define E1000_STATUS_SPEED_10 0x00000000 /* Speed 10Mb/s */
50 #define E1000_STATUS_SPEED_100 0x00000040 /* Speed 100Mb/s */
51 #define E1000_STATUS_SPEED_1000 0x00000080 /* Speed 1000Mb/s */
60 #define E1000_TXD_POPTS_IXSM 0x01 /* Insert IP checksum */
61 #define E1000_TXD_POPTS_TXSM 0x02 /* Insert TCP/UDP checksum */
62 #define E1000_TXD_CMD_DEXT 0x20000000 /* Desc extension (0 = legacy) */
63 #define E1000_TXD_STAT_DD 0x00000001 /* Desc Done */
65 #define MAX_JUMBO_FRAME_SIZE 0x3F00
72 #define E1000_SUCCESS 0
79 #define E1000_SRRCTL_BSIZEHDRSIZE_MASK 0x00000F00
81 #define E1000_SRRCTL_DESCTYPE_ADV_ONEBUF 0x02000000
82 #define E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS 0x0A000000
83 #define E1000_SRRCTL_DESCTYPE_MASK 0x0E000000
84 #define E1000_SRRCTL_DROP_EN 0x80000000
86 #define E1000_SRRCTL_BSIZEPKT_MASK 0x0000007F
87 #define E1000_SRRCTL_BSIZEHDR_MASK 0x00003F00
90 #define E1000_TXDCTL_QUEUE_ENABLE 0x02000000 /* Enable specific Tx Que */
91 #define E1000_RXDCTL_QUEUE_ENABLE 0x02000000 /* Enable specific Rx Que */