152 static void igb_rar_set_index(struct igb_adapter *, u32);
221 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
246 	u32 ofs;
291 	u32 regs[8];  in igb_regdump()
363 	u32 staterr;  in igb_dump()
700 	u32 rbase_offset = adapter->vfs_allocated_count;  in igb_cache_ring_register()
730 u32 igb_rd32(struct e1000_hw *hw, u32 reg)  in igb_rd32()
734 	u32 value = 0;  in igb_rd32()
768 	u32 ivar = array_rd32(E1000_IVAR0, index);  in igb_write_ivar()
771 	ivar &= ~((u32)0xFF << offset);  in igb_write_ivar()
786 	u32 msixbm = 0;  in igb_assign_vector()
867 	u32 tmp;  in igb_configure_msix()
1487 		u32 regval = rd32(E1000_EIAM);  in igb_irq_disable()
1517 		u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;  in igb_irq_enable()
1518 		u32 regval = rd32(E1000_EIAC);  in igb_irq_enable()
1571 	u32 ctrl_ext;  in igb_release_hw_control()
1590 	u32 ctrl_ext;  in igb_get_hw_control()
1622 	u32 val;  in set_tx_desc_fetch_prio()
1639 	u32 val;  in set_queue_mode()
1693 	u32 tqavcc, tqavctrl;  in igb_config_tx_modes()
1911 	u32 val;  in igb_setup_tx_mode()
2056 	u32 ctrl_ext, connsw;  in igb_check_swap_media()
2146 		u32 reg_data = rd32(E1000_CTRL_EXT);  in igb_up()
2169 	u32 tctl, rctl;  in igb_down()
2248 	u32 connsw = rd32(E1000_CONNSW);  in igb_enable_mas()
2267 	u32 ctrl_ext;  in igb_set_i2c_bb()
2290 	u32 pba, hwm;  in igb_reset()
2315 		u32 min_rx_space, min_tx_space, needed_tx_space;  in igb_reset()
2971 	u32 ret;  in igb_xdp_xmit_back()
2994 			struct xdp_frame **frames, u32 flags)  in igb_xdp_xmit()
4000 	u32 max_rss_queues;  in igb_init_queue_configuration()
4003 	adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());  in igb_init_queue_configuration()
4009 			      const u32 max_rss_queues)  in igb_set_flag_queue_pairs()
4104 	adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),  in igb_sw_init()
4205 		u32 reg_data = rd32(E1000_CTRL_EXT);  in __igb_open()
4354 	u32 tctl;  in igb_setup_tctl()
4384 	u32 txdctl = 0;  in igb_configure_tx_ring()
4519 	u32 mrqc, rxcsum;  in igb_setup_mrqc()
4520 	u32 j, num_rx_queues;  in igb_setup_mrqc()
4521 	u32 rss_key[10];  in igb_setup_mrqc()
4582 			u32 vtctl = rd32(E1000_VT_CTL);  in igb_setup_mrqc()
4609 	u32 rctl;  in igb_setup_rctl()
4666 	u32 vmolr;  in igb_set_vf_rlpml()
4683 	u32 val, reg;  in igb_set_vf_vlan_strip()
4705 	u32 vmolr;  in igb_set_vmolr()
4743 	u32 srrctl = 0;  in igb_setup_srrctl()
4778 	u32 rxdctl = 0;  in igb_configure_rx_ring()
5150 	u32 i, pf_id;  in igb_vlan_promisc_enable()
5182 		u32 vlvf = rd32(E1000_VLVF(i));  in igb_vlan_promisc_enable()
5200 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)  in igb_scrub_vfta()
5203 	u32 vfta[VFTA_BLOCK_SIZE] = { 0 };  in igb_scrub_vfta()
5204 	u32 vid_start = vfta_offset * 32;  in igb_scrub_vfta()
5205 	u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);  in igb_scrub_vfta()
5206 	u32 i, vid, word, bits, pf_id;  in igb_scrub_vfta()
5219 		u32 vlvf = rd32(E1000_VLVF(i));  in igb_scrub_vfta()
5258 	u32 i;  in igb_vlan_promisc_disable()
5285 	u32 rctl = 0, vmolr = 0, rlpml = MAX_JUMBO_FRAME_SIZE;  in igb_set_rx_mode()
5382 	u32 wvbr = 0;  in igb_check_wvbr()
5470 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)  in igb_thermal_sensor_event()
5473 	u32 ctrl_ext, thstat;  in igb_thermal_sensor_event()
5496 	u32 lvmmc;  in igb_check_lvmmc()
5527 	u32 link;  in igb_watchdog_task()
5529 	u32 connsw;  in igb_watchdog_task()
5560 			u32 ctrl;  in igb_watchdog_task()
5712 		u32 eics = 0;  in igb_watchdog_task()
5784 		avg_wire_size = max_t(u32, avg_wire_size,  in igb_update_ring_itr()
5892 	u32 new_itr = q_vector->itr_val;  in igb_set_itr()
5951 			    u32 vlan_macip_lens, u32 type_tucmd,  in igb_tx_ctxtdesc()
5952 			    u32 mss_l4len_idx)  in igb_tx_ctxtdesc()
5990 	u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;  in igb_tso()
6002 	u32 paylen, l4_offset;  in igb_tso()
6084 	u32 vlan_macip_lens = 0;  in igb_tx_csum()
6085 	u32 type_tucmd = 0;  in igb_tx_csum()
6126 	 ((u32)(_input & _flag) * (_result / _flag)) : \
6127 	 ((u32)(_input & _flag) / (_flag / _result)))
6129 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)  in igb_tx_cmd_type()
6132 	u32 cmd_type = E1000_ADVTXD_DTYP_DATA |  in igb_tx_cmd_type()
6156 				 u32 tx_flags, unsigned int paylen)  in igb_tx_olinfo_status()
6158 	u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;  in igb_tx_olinfo_status()
6222 	u32 tx_flags = first->tx_flags;  in igb_tx_map()
6223 	u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);  in igb_tx_map()
6367 	u32 len = xdpf->len, cmd_type, olinfo_status;  in igb_xmit_xdp_ring()
6470 	u32 tx_flags = 0;  in igb_xmit_frame_ring()
6697 	u32 reg, mpc;  in igb_update_stats()
6717 		u32 rqdpc = rd32(E1000_RQDPC(i));  in igb_update_stats()
6883 	u32 tsauxc;  in igb_perout()
6894 		u32 systiml, systimh, level_mask, level, rem;  in igb_perout()
6938 		ts.tv_nsec = (u32)systim;  in igb_perout()
6939 		ts.tv_sec  = ((u32)(systim >> 32)) & 0xFF;  in igb_perout()
6947 	wr32((tsintr_tt == 1) ? E1000_TRGTTIMH1 : E1000_TRGTTIMH0, (u32)ts.tv_sec);  in igb_perout()
6992 	const u32 mask = (TSINTR_SYS_WRAP | E1000_TSICR_TXTS |  in igb_tsync_interrupt()
6996 	u32 tsicr = rd32(E1000_TSICR);  in igb_tsync_interrupt()
7034 	u32 icr = rd32(E1000_ICR);  in igb_msix_other()
7072 	u32 itr_val = q_vector->itr_val & 0x7FFC;  in igb_write_itr()
7107 	u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);  in igb_update_tx_dca()
7128 	u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);  in igb_update_rx_dca()
7248 	u32 ping;  in igb_ping_all_vfs()
7259 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)  in igb_set_vf_promisc()
7262 	u32 vmolr = rd32(E1000_VMOLR(vf));  in igb_set_vf_promisc()
7299 				  u32 *msgbuf, u32 vf)  in igb_set_vf_multicasts()
7333 		u32 vmolr = rd32(E1000_VMOLR(i));  in igb_restore_vf_multicasts()
7351 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)  in igb_clear_vf_vfta()
7354 	u32 pool_mask, vlvf_mask, i;  in igb_clear_vf_vfta()
7366 		u32 vlvf = rd32(E1000_VLVF(i));  in igb_clear_vf_vfta()
7367 		u32 vfta_mask, vid, vfta;  in igb_clear_vf_vfta()
7403 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)  in igb_find_vlvf_entry()
7405 	u32 vlvf;  in igb_find_vlvf_entry()
7422 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)  in igb_update_pf_vlvf()
7425 	u32 bits, pf_id;  in igb_update_pf_vlvf()
7448 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,  in igb_set_vf_vlan()
7449 			   bool add, u32 vf)  in igb_set_vf_vlan()
7482 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)  in igb_set_vmvir()
7559 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)  in igb_set_vf_vlan_msg()
7578 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)  in igb_vf_reset()
7601 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)  in igb_vf_reset_event()
7613 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)  in igb_vf_reset_msg()
7617 	u32 reg, msgbuf[3] = {};  in igb_vf_reset_msg()
7858 				 const u32 info, const u8 *addr)  in igb_set_vf_mac_filter()
7924 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)  in igb_set_vf_mac_addr()
7928 	u32 info = msg[0] & E1000_VT_MSGINFO_MASK;  in igb_set_vf_mac_addr()
7960 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)  in igb_rcv_ack_from_vf()
7964 	u32 msg = E1000_VT_MSGTYPE_NACK;  in igb_rcv_ack_from_vf()
7974 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)  in igb_rcv_msg_from_vf()
7977 	u32 msgbuf[E1000_VFMAILBOX_SIZE];  in igb_rcv_msg_from_vf()
8061 	u32 vf;  in igb_msg_task()
8094 	u32 uta = set ? ~0 : 0;  in igb_set_uta()
8116 	u32 icr = rd32(E1000_ICR);  in igb_intr_msi()
8155 	u32 icr = rd32(E1000_ICR);  in igb_intr()
8618 	u32 act;  in igb_run_xdp()
8748 	u32 ntc = rx_ring->next_to_clean + 1;  in igb_is_non_eop()
8905 	u32 frame_sz = 0;  in igb_clean_rx_irq()
9214 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)  in igb_read_pci_cfg()
9221 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)  in igb_write_pci_cfg()
9228 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)  in igb_read_pcie_cap_reg()
9238 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)  in igb_write_pcie_cap_reg()
9252 	u32 ctrl, rctl;  in igb_vlan_mode()
9318 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)  in igb_set_spd_dplx()
9383 	u32 ctrl, rctl, status;  in __igb_shutdown()
9384 	u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;  in __igb_shutdown()
9451 	u32 wupl;  in igb_deliver_wake_packet()
9487 	u32 err, val;  in __igb_resume()
9698 static void igb_rar_set_index(struct igb_adapter *adapter, u32 index)  in igb_rar_set_index()
9701 	u32 rar_low, rar_high;  in igb_rar_set_index()
9815 	u32 bcnrc_val;  in igb_set_vf_rate_limit()
9900 	u32 reg_val, reg_offset;  in igb_ndo_set_vf_spoofchk()
9958 	u32 reg;  in igb_vmm_control()
9996 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)  in igb_init_dmac()
9999 	u32 dmac_thr;  in igb_init_dmac()
10001 	u32 reg;  in igb_init_dmac()
10062 		u32 reg = rd32(E1000_PCIEMISC);  in igb_init_dmac()