323  *  igb_init_nvm_params_82575 - Init NVM func ptrs.
328 	struct e1000_nvm_info *nvm = &hw->nvm;  in igb_init_nvm_params_82575()  local
345 	nvm->word_size = BIT(size);  in igb_init_nvm_params_82575()
346 	nvm->opcode_bits = 8;  in igb_init_nvm_params_82575()
347 	nvm->delay_usec = 1;  in igb_init_nvm_params_82575()
349 	switch (nvm->override) {  in igb_init_nvm_params_82575()
351 		nvm->page_size = 32;  in igb_init_nvm_params_82575()
352 		nvm->address_bits = 16;  in igb_init_nvm_params_82575()
355 		nvm->page_size = 8;  in igb_init_nvm_params_82575()
356 		nvm->address_bits = 8;  in igb_init_nvm_params_82575()
359 		nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;  in igb_init_nvm_params_82575()
360 		nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ?  in igb_init_nvm_params_82575()
364 	if (nvm->word_size == BIT(15))  in igb_init_nvm_params_82575()
365 		nvm->page_size = 128;  in igb_init_nvm_params_82575()
367 	nvm->type = e1000_nvm_eeprom_spi;  in igb_init_nvm_params_82575()
369 	/* NVM Function Pointers */  in igb_init_nvm_params_82575()
370 	nvm->ops.acquire = igb_acquire_nvm_82575;  in igb_init_nvm_params_82575()
371 	nvm->ops.release = igb_release_nvm_82575;  in igb_init_nvm_params_82575()
372 	nvm->ops.write = igb_write_nvm_spi;  in igb_init_nvm_params_82575()
373 	nvm->ops.validate = igb_validate_nvm_checksum;  in igb_init_nvm_params_82575()
374 	nvm->ops.update = igb_update_nvm_checksum;  in igb_init_nvm_params_82575()
375 	if (nvm->word_size < BIT(15))  in igb_init_nvm_params_82575()
376 		nvm->ops.read = igb_read_nvm_eerd;  in igb_init_nvm_params_82575()
378 		nvm->ops.read = igb_read_nvm_spi;  in igb_init_nvm_params_82575()
383 		nvm->ops.validate = igb_validate_nvm_checksum_82580;  in igb_init_nvm_params_82575()
384 		nvm->ops.update = igb_update_nvm_checksum_82580;  in igb_init_nvm_params_82575()
388 		nvm->ops.validate = igb_validate_nvm_checksum_i350;  in igb_init_nvm_params_82575()
389 		nvm->ops.update = igb_update_nvm_checksum_i350;  in igb_init_nvm_params_82575()
678 	/* NVM initialization */  in igb_get_invariants_82575()
1152  *  Acquire the SW/FW semaphore to access the PHY or NVM.  The mask
1201  *  Release the SW/FW semaphore used to access the PHY or NVM.  The mask
1709 			ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &data);  in igb_setup_serdes_link_82575()
1711 				hw_dbg(KERN_DEBUG "NVM Read Error\n\n");  in igb_setup_serdes_link_82575()
2223 	ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +  in igb_reset_mdicnfg_82580()
2227 		hw_dbg("NVM Read Error\n");  in igb_reset_mdicnfg_82580()
2367 		ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);  in igb_validate_nvm_checksum_with_offset()
2369 			hw_dbg("NVM Read Error\n");  in igb_validate_nvm_checksum_with_offset()
2376 		hw_dbg("NVM Checksum Invalid\n");  in igb_validate_nvm_checksum_with_offset()
2402 		ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);  in igb_update_nvm_checksum_with_offset()
2404 			hw_dbg("NVM Read Error while updating checksum.\n");  in igb_update_nvm_checksum_with_offset()
2410 	ret_val = hw->nvm.ops.write(hw, (NVM_CHECKSUM_REG + offset), 1,  in igb_update_nvm_checksum_with_offset()
2413 		hw_dbg("NVM Write Error while updating checksum.\n");  in igb_update_nvm_checksum_with_offset()
2434 	ret_val = hw->nvm.ops.read(hw, NVM_COMPATIBILITY_REG_3, 1, &nvm_data);  in igb_validate_nvm_checksum_82580()
2436 		hw_dbg("NVM Read Error\n");  in igb_validate_nvm_checksum_82580()
2473 	ret_val = hw->nvm.ops.read(hw, NVM_COMPATIBILITY_REG_3, 1, &nvm_data);  in igb_update_nvm_checksum_82580()
2475 		hw_dbg("NVM Read Error while updating checksum compatibility bit.\n");  in igb_update_nvm_checksum_82580()
2482 		ret_val = hw->nvm.ops.write(hw, NVM_COMPATIBILITY_REG_3, 1,  in igb_update_nvm_checksum_82580()
2485 			hw_dbg("NVM Write Error while updating checksum compatibility bit.\n");  in igb_update_nvm_checksum_82580()
2794 	hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_offset);  in igb_get_thermal_sensor_data_generic()
2798 	hw->nvm.ops.read(hw, ets_offset, 1, &ets_cfg);  in igb_get_thermal_sensor_data_generic()
2808 		hw->nvm.ops.read(hw, (ets_offset + i), 1, &ets_sensor);  in igb_get_thermal_sensor_data_generic()
2825  *  Sets the thermal sensor thresholds according to the NVM map
2853 	hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_offset);  in igb_init_thermal_sensor_thresh_generic()
2857 	hw->nvm.ops.read(hw, ets_offset, 1, &ets_cfg);  in igb_init_thermal_sensor_thresh_generic()
2866 		hw->nvm.ops.read(hw, (ets_offset + i), 1, &ets_sensor);  in igb_init_thermal_sensor_thresh_generic()