Lines Matching full:hw
12 * @hw: pointer to the hardware structure
16 static void iavf_adminq_init_regs(struct iavf_hw *hw) in iavf_adminq_init_regs() argument
19 hw->aq.asq.tail = IAVF_VF_ATQT1; in iavf_adminq_init_regs()
20 hw->aq.asq.head = IAVF_VF_ATQH1; in iavf_adminq_init_regs()
21 hw->aq.asq.len = IAVF_VF_ATQLEN1; in iavf_adminq_init_regs()
22 hw->aq.asq.bal = IAVF_VF_ATQBAL1; in iavf_adminq_init_regs()
23 hw->aq.asq.bah = IAVF_VF_ATQBAH1; in iavf_adminq_init_regs()
24 hw->aq.arq.tail = IAVF_VF_ARQT1; in iavf_adminq_init_regs()
25 hw->aq.arq.head = IAVF_VF_ARQH1; in iavf_adminq_init_regs()
26 hw->aq.arq.len = IAVF_VF_ARQLEN1; in iavf_adminq_init_regs()
27 hw->aq.arq.bal = IAVF_VF_ARQBAL1; in iavf_adminq_init_regs()
28 hw->aq.arq.bah = IAVF_VF_ARQBAH1; in iavf_adminq_init_regs()
33 * @hw: pointer to the hardware structure
35 static enum iavf_status iavf_alloc_adminq_asq_ring(struct iavf_hw *hw) in iavf_alloc_adminq_asq_ring() argument
39 ret_code = iavf_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, in iavf_alloc_adminq_asq_ring()
41 (hw->aq.num_asq_entries * in iavf_alloc_adminq_asq_ring()
47 ret_code = iavf_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf, in iavf_alloc_adminq_asq_ring()
48 (hw->aq.num_asq_entries * in iavf_alloc_adminq_asq_ring()
51 iavf_free_dma_mem(hw, &hw->aq.asq.desc_buf); in iavf_alloc_adminq_asq_ring()
60 * @hw: pointer to the hardware structure
62 static enum iavf_status iavf_alloc_adminq_arq_ring(struct iavf_hw *hw) in iavf_alloc_adminq_arq_ring() argument
66 ret_code = iavf_allocate_dma_mem(hw, &hw->aq.arq.desc_buf, in iavf_alloc_adminq_arq_ring()
68 (hw->aq.num_arq_entries * in iavf_alloc_adminq_arq_ring()
77 * @hw: pointer to the hardware structure
82 static void iavf_free_adminq_asq(struct iavf_hw *hw) in iavf_free_adminq_asq() argument
84 iavf_free_dma_mem(hw, &hw->aq.asq.desc_buf); in iavf_free_adminq_asq()
89 * @hw: pointer to the hardware structure
94 static void iavf_free_adminq_arq(struct iavf_hw *hw) in iavf_free_adminq_arq() argument
96 iavf_free_dma_mem(hw, &hw->aq.arq.desc_buf); in iavf_free_adminq_arq()
101 * @hw: pointer to the hardware structure
103 static enum iavf_status iavf_alloc_arq_bufs(struct iavf_hw *hw) in iavf_alloc_arq_bufs() argument
115 ret_code = iavf_allocate_virt_mem(hw, &hw->aq.arq.dma_head, in iavf_alloc_arq_bufs()
116 (hw->aq.num_arq_entries * in iavf_alloc_arq_bufs()
120 hw->aq.arq.r.arq_bi = (struct iavf_dma_mem *)hw->aq.arq.dma_head.va; in iavf_alloc_arq_bufs()
123 for (i = 0; i < hw->aq.num_arq_entries; i++) { in iavf_alloc_arq_bufs()
124 bi = &hw->aq.arq.r.arq_bi[i]; in iavf_alloc_arq_bufs()
125 ret_code = iavf_allocate_dma_mem(hw, bi, in iavf_alloc_arq_bufs()
127 hw->aq.arq_buf_size, in iavf_alloc_arq_bufs()
133 desc = IAVF_ADMINQ_DESC(hw->aq.arq, i); in iavf_alloc_arq_bufs()
136 if (hw->aq.arq_buf_size > IAVF_AQ_LARGE_BUF) in iavf_alloc_arq_bufs()
161 iavf_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); in iavf_alloc_arq_bufs()
162 iavf_free_virt_mem(hw, &hw->aq.arq.dma_head); in iavf_alloc_arq_bufs()
169 * @hw: pointer to the hardware structure
171 static enum iavf_status iavf_alloc_asq_bufs(struct iavf_hw *hw) in iavf_alloc_asq_bufs() argument
178 ret_code = iavf_allocate_virt_mem(hw, &hw->aq.asq.dma_head, in iavf_alloc_asq_bufs()
179 (hw->aq.num_asq_entries * in iavf_alloc_asq_bufs()
183 hw->aq.asq.r.asq_bi = (struct iavf_dma_mem *)hw->aq.asq.dma_head.va; in iavf_alloc_asq_bufs()
186 for (i = 0; i < hw->aq.num_asq_entries; i++) { in iavf_alloc_asq_bufs()
187 bi = &hw->aq.asq.r.asq_bi[i]; in iavf_alloc_asq_bufs()
188 ret_code = iavf_allocate_dma_mem(hw, bi, in iavf_alloc_asq_bufs()
190 hw->aq.asq_buf_size, in iavf_alloc_asq_bufs()
202 iavf_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); in iavf_alloc_asq_bufs()
203 iavf_free_virt_mem(hw, &hw->aq.asq.dma_head); in iavf_alloc_asq_bufs()
210 * @hw: pointer to the hardware structure
212 static void iavf_free_arq_bufs(struct iavf_hw *hw) in iavf_free_arq_bufs() argument
217 for (i = 0; i < hw->aq.num_arq_entries; i++) in iavf_free_arq_bufs()
218 iavf_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); in iavf_free_arq_bufs()
221 iavf_free_dma_mem(hw, &hw->aq.arq.desc_buf); in iavf_free_arq_bufs()
224 iavf_free_virt_mem(hw, &hw->aq.arq.dma_head); in iavf_free_arq_bufs()
229 * @hw: pointer to the hardware structure
231 static void iavf_free_asq_bufs(struct iavf_hw *hw) in iavf_free_asq_bufs() argument
236 for (i = 0; i < hw->aq.num_asq_entries; i++) in iavf_free_asq_bufs()
237 if (hw->aq.asq.r.asq_bi[i].pa) in iavf_free_asq_bufs()
238 iavf_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); in iavf_free_asq_bufs()
241 iavf_free_virt_mem(hw, &hw->aq.asq.cmd_buf); in iavf_free_asq_bufs()
244 iavf_free_dma_mem(hw, &hw->aq.asq.desc_buf); in iavf_free_asq_bufs()
247 iavf_free_virt_mem(hw, &hw->aq.asq.dma_head); in iavf_free_asq_bufs()
252 * @hw: pointer to the hardware structure
256 static enum iavf_status iavf_config_asq_regs(struct iavf_hw *hw) in iavf_config_asq_regs() argument
262 wr32(hw, hw->aq.asq.head, 0); in iavf_config_asq_regs()
263 wr32(hw, hw->aq.asq.tail, 0); in iavf_config_asq_regs()
266 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in iavf_config_asq_regs()
268 wr32(hw, hw->aq.asq.bal, lower_32_bits(hw->aq.asq.desc_buf.pa)); in iavf_config_asq_regs()
269 wr32(hw, hw->aq.asq.bah, upper_32_bits(hw->aq.asq.desc_buf.pa)); in iavf_config_asq_regs()
272 reg = rd32(hw, hw->aq.asq.bal); in iavf_config_asq_regs()
273 if (reg != lower_32_bits(hw->aq.asq.desc_buf.pa)) in iavf_config_asq_regs()
281 * @hw: pointer to the hardware structure
285 static enum iavf_status iavf_config_arq_regs(struct iavf_hw *hw) in iavf_config_arq_regs() argument
291 wr32(hw, hw->aq.arq.head, 0); in iavf_config_arq_regs()
292 wr32(hw, hw->aq.arq.tail, 0); in iavf_config_arq_regs()
295 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in iavf_config_arq_regs()
297 wr32(hw, hw->aq.arq.bal, lower_32_bits(hw->aq.arq.desc_buf.pa)); in iavf_config_arq_regs()
298 wr32(hw, hw->aq.arq.bah, upper_32_bits(hw->aq.arq.desc_buf.pa)); in iavf_config_arq_regs()
300 /* Update tail in the HW to post pre-allocated buffers */ in iavf_config_arq_regs()
301 wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1); in iavf_config_arq_regs()
304 reg = rd32(hw, hw->aq.arq.bal); in iavf_config_arq_regs()
305 if (reg != lower_32_bits(hw->aq.arq.desc_buf.pa)) in iavf_config_arq_regs()
313 * @hw: pointer to the hardware structure
317 * in the hw->aq structure:
318 * - hw->aq.num_asq_entries
319 * - hw->aq.arq_buf_size
324 static enum iavf_status iavf_init_asq(struct iavf_hw *hw) in iavf_init_asq() argument
329 if (hw->aq.asq.count > 0) { in iavf_init_asq()
336 if ((hw->aq.num_asq_entries == 0) || in iavf_init_asq()
337 (hw->aq.asq_buf_size == 0)) { in iavf_init_asq()
342 hw->aq.asq.next_to_use = 0; in iavf_init_asq()
343 hw->aq.asq.next_to_clean = 0; in iavf_init_asq()
346 ret_code = iavf_alloc_adminq_asq_ring(hw); in iavf_init_asq()
351 ret_code = iavf_alloc_asq_bufs(hw); in iavf_init_asq()
356 ret_code = iavf_config_asq_regs(hw); in iavf_init_asq()
361 hw->aq.asq.count = hw->aq.num_asq_entries; in iavf_init_asq()
365 for (i = 0; i < hw->aq.num_asq_entries; i++) in iavf_init_asq()
366 iavf_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); in iavf_init_asq()
367 iavf_free_virt_mem(hw, &hw->aq.asq.dma_head); in iavf_init_asq()
370 iavf_free_adminq_asq(hw); in iavf_init_asq()
378 * @hw: pointer to the hardware structure
382 * in the hw->aq structure:
383 * - hw->aq.num_asq_entries
384 * - hw->aq.arq_buf_size
389 static enum iavf_status iavf_init_arq(struct iavf_hw *hw) in iavf_init_arq() argument
394 if (hw->aq.arq.count > 0) { in iavf_init_arq()
401 if ((hw->aq.num_arq_entries == 0) || in iavf_init_arq()
402 (hw->aq.arq_buf_size == 0)) { in iavf_init_arq()
407 hw->aq.arq.next_to_use = 0; in iavf_init_arq()
408 hw->aq.arq.next_to_clean = 0; in iavf_init_arq()
411 ret_code = iavf_alloc_adminq_arq_ring(hw); in iavf_init_arq()
416 ret_code = iavf_alloc_arq_bufs(hw); in iavf_init_arq()
421 ret_code = iavf_config_arq_regs(hw); in iavf_init_arq()
426 hw->aq.arq.count = hw->aq.num_arq_entries; in iavf_init_arq()
430 for (i = 0; i < hw->aq.num_arq_entries; i++) in iavf_init_arq()
431 iavf_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); in iavf_init_arq()
432 iavf_free_virt_mem(hw, &hw->aq.arq.dma_head); in iavf_init_arq()
434 iavf_free_adminq_arq(hw); in iavf_init_arq()
442 * @hw: pointer to the hardware structure
446 static enum iavf_status iavf_shutdown_asq(struct iavf_hw *hw) in iavf_shutdown_asq() argument
450 mutex_lock(&hw->aq.asq_mutex); in iavf_shutdown_asq()
452 if (hw->aq.asq.count == 0) { in iavf_shutdown_asq()
458 wr32(hw, hw->aq.asq.head, 0); in iavf_shutdown_asq()
459 wr32(hw, hw->aq.asq.tail, 0); in iavf_shutdown_asq()
460 wr32(hw, hw->aq.asq.len, 0); in iavf_shutdown_asq()
461 wr32(hw, hw->aq.asq.bal, 0); in iavf_shutdown_asq()
462 wr32(hw, hw->aq.asq.bah, 0); in iavf_shutdown_asq()
464 hw->aq.asq.count = 0; /* to indicate uninitialized queue */ in iavf_shutdown_asq()
467 iavf_free_asq_bufs(hw); in iavf_shutdown_asq()
470 mutex_unlock(&hw->aq.asq_mutex); in iavf_shutdown_asq()
476 * @hw: pointer to the hardware structure
480 static enum iavf_status iavf_shutdown_arq(struct iavf_hw *hw) in iavf_shutdown_arq() argument
484 mutex_lock(&hw->aq.arq_mutex); in iavf_shutdown_arq()
486 if (hw->aq.arq.count == 0) { in iavf_shutdown_arq()
492 wr32(hw, hw->aq.arq.head, 0); in iavf_shutdown_arq()
493 wr32(hw, hw->aq.arq.tail, 0); in iavf_shutdown_arq()
494 wr32(hw, hw->aq.arq.len, 0); in iavf_shutdown_arq()
495 wr32(hw, hw->aq.arq.bal, 0); in iavf_shutdown_arq()
496 wr32(hw, hw->aq.arq.bah, 0); in iavf_shutdown_arq()
498 hw->aq.arq.count = 0; /* to indicate uninitialized queue */ in iavf_shutdown_arq()
501 iavf_free_arq_bufs(hw); in iavf_shutdown_arq()
504 mutex_unlock(&hw->aq.arq_mutex); in iavf_shutdown_arq()
510 * @hw: pointer to the hardware structure
513 * in the hw->aq structure:
514 * - hw->aq.num_asq_entries
515 * - hw->aq.num_arq_entries
516 * - hw->aq.arq_buf_size
517 * - hw->aq.asq_buf_size
519 enum iavf_status iavf_init_adminq(struct iavf_hw *hw) in iavf_init_adminq() argument
524 if ((hw->aq.num_arq_entries == 0) || in iavf_init_adminq()
525 (hw->aq.num_asq_entries == 0) || in iavf_init_adminq()
526 (hw->aq.arq_buf_size == 0) || in iavf_init_adminq()
527 (hw->aq.asq_buf_size == 0)) { in iavf_init_adminq()
533 iavf_adminq_init_regs(hw); in iavf_init_adminq()
536 hw->aq.asq_cmd_timeout = IAVF_ASQ_CMD_TIMEOUT; in iavf_init_adminq()
539 ret_code = iavf_init_asq(hw); in iavf_init_adminq()
544 ret_code = iavf_init_arq(hw); in iavf_init_adminq()
552 iavf_shutdown_asq(hw); in iavf_init_adminq()
561 * @hw: pointer to the hardware structure
563 enum iavf_status iavf_shutdown_adminq(struct iavf_hw *hw) in iavf_shutdown_adminq() argument
565 if (iavf_check_asq_alive(hw)) in iavf_shutdown_adminq()
566 iavf_aq_queue_shutdown(hw, true); in iavf_shutdown_adminq()
568 iavf_shutdown_asq(hw); in iavf_shutdown_adminq()
569 iavf_shutdown_arq(hw); in iavf_shutdown_adminq()
576 * @hw: pointer to the hardware structure
580 static u16 iavf_clean_asq(struct iavf_hw *hw) in iavf_clean_asq() argument
582 struct iavf_adminq_ring *asq = &hw->aq.asq; in iavf_clean_asq()
590 while (rd32(hw, hw->aq.asq.head) != ntc) { in iavf_clean_asq()
591 iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE, in iavf_clean_asq()
592 "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head)); in iavf_clean_asq()
598 cb_func(hw, &desc_cb); in iavf_clean_asq()
617 * @hw: pointer to the hw struct
622 bool iavf_asq_done(struct iavf_hw *hw) in iavf_asq_done() argument
627 return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use; in iavf_asq_done()
632 * @hw: pointer to the hw struct
641 enum iavf_status iavf_asq_send_command(struct iavf_hw *hw, in iavf_asq_send_command() argument
655 mutex_lock(&hw->aq.asq_mutex); in iavf_asq_send_command()
657 if (hw->aq.asq.count == 0) { in iavf_asq_send_command()
658 iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE, in iavf_asq_send_command()
664 hw->aq.asq_last_status = IAVF_AQ_RC_OK; in iavf_asq_send_command()
666 val = rd32(hw, hw->aq.asq.head); in iavf_asq_send_command()
667 if (val >= hw->aq.num_asq_entries) { in iavf_asq_send_command()
668 iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE, in iavf_asq_send_command()
674 details = IAVF_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use); in iavf_asq_send_command()
696 if (buff_size > hw->aq.asq_buf_size) { in iavf_asq_send_command()
697 iavf_debug(hw, in iavf_asq_send_command()
706 iavf_debug(hw, in iavf_asq_send_command()
720 if (iavf_clean_asq(hw) == 0) { in iavf_asq_send_command()
721 iavf_debug(hw, in iavf_asq_send_command()
729 desc_on_ring = IAVF_ADMINQ_DESC(hw->aq.asq, hw->aq.asq.next_to_use); in iavf_asq_send_command()
736 dma_buff = &hw->aq.asq.r.asq_bi[hw->aq.asq.next_to_use]; in iavf_asq_send_command()
751 iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE, "AQTX: desc and buffer:\n"); in iavf_asq_send_command()
752 iavf_debug_aq(hw, IAVF_DEBUG_AQ_COMMAND, (void *)desc_on_ring, in iavf_asq_send_command()
754 (hw->aq.asq.next_to_use)++; in iavf_asq_send_command()
755 if (hw->aq.asq.next_to_use == hw->aq.asq.count) in iavf_asq_send_command()
756 hw->aq.asq.next_to_use = 0; in iavf_asq_send_command()
758 wr32(hw, hw->aq.asq.tail, hw->aq.asq.next_to_use); in iavf_asq_send_command()
770 if (iavf_asq_done(hw)) in iavf_asq_send_command()
774 } while (total_delay < hw->aq.asq_cmd_timeout); in iavf_asq_send_command()
778 if (iavf_asq_done(hw)) { in iavf_asq_send_command()
784 iavf_debug(hw, in iavf_asq_send_command()
799 hw->aq.asq_last_status = (enum iavf_admin_queue_err)retval; in iavf_asq_send_command()
802 iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE, in iavf_asq_send_command()
804 iavf_debug_aq(hw, IAVF_DEBUG_AQ_COMMAND, (void *)desc, buff, buff_size); in iavf_asq_send_command()
813 if (rd32(hw, hw->aq.asq.len) & IAVF_VF_ATQLEN1_ATQCRIT_MASK) { in iavf_asq_send_command()
814 iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE, in iavf_asq_send_command()
818 iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE, in iavf_asq_send_command()
825 mutex_unlock(&hw->aq.asq_mutex); in iavf_asq_send_command()
846 * @hw: pointer to the hw struct
854 enum iavf_status iavf_clean_arq_element(struct iavf_hw *hw, in iavf_clean_arq_element() argument
858 u16 ntc = hw->aq.arq.next_to_clean; in iavf_clean_arq_element()
871 mutex_lock(&hw->aq.arq_mutex); in iavf_clean_arq_element()
873 if (hw->aq.arq.count == 0) { in iavf_clean_arq_element()
874 iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE, in iavf_clean_arq_element()
881 ntu = rd32(hw, hw->aq.arq.head) & IAVF_VF_ARQH1_ARQH_MASK; in iavf_clean_arq_element()
889 desc = IAVF_ADMINQ_DESC(hw->aq.arq, ntc); in iavf_clean_arq_element()
892 hw->aq.arq_last_status = in iavf_clean_arq_element()
897 iavf_debug(hw, in iavf_clean_arq_element()
900 hw->aq.arq_last_status); in iavf_clean_arq_element()
907 memcpy(e->msg_buf, hw->aq.arq.r.arq_bi[desc_idx].va, in iavf_clean_arq_element()
910 iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE, "AQRX: desc and buffer:\n"); in iavf_clean_arq_element()
911 iavf_debug_aq(hw, IAVF_DEBUG_AQ_COMMAND, (void *)desc, e->msg_buf, in iavf_clean_arq_element()
912 hw->aq.arq_buf_size); in iavf_clean_arq_element()
918 bi = &hw->aq.arq.r.arq_bi[ntc]; in iavf_clean_arq_element()
922 if (hw->aq.arq_buf_size > IAVF_AQ_LARGE_BUF) in iavf_clean_arq_element()
929 wr32(hw, hw->aq.arq.tail, ntc); in iavf_clean_arq_element()
932 if (ntc == hw->aq.num_arq_entries) in iavf_clean_arq_element()
934 hw->aq.arq.next_to_clean = ntc; in iavf_clean_arq_element()
935 hw->aq.arq.next_to_use = ntu; in iavf_clean_arq_element()
940 *pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc); in iavf_clean_arq_element()
943 mutex_unlock(&hw->aq.arq_mutex); in iavf_clean_arq_element()