Lines Matching defs:i40e_hw_capabilities

208 struct i40e_hw_capabilities {  struct
209 	u32  switch_mode;
220 	u32  management_mode;
221 	u32  mng_protocols_over_mctp;
222 	u32  npar_enable;
223 	u32  os2bmc;
224 	u32  valid_functions;
225 	bool sr_iov_1_1;
226 	bool vmdq;
227 	bool evb_802_1_qbg; /* Edge Virtual Bridging */
228 	bool evb_802_1_qbh; /* Bridge Port Extension */
229 	bool dcb;
230 	bool fcoe;
231 	bool iscsi; /* Indicates iSCSI enabled */
232 	bool flex10_enable;
233 	bool flex10_capable;
234 	u32  flex10_mode;
236 	u32 flex10_status;
238 	bool sec_rev_disabled;
239 	bool update_disabled;
243 	bool mgmt_cem;
244 	bool ieee_1588;
245 	bool iwarp;
246 	bool fd;
247 	u32 fd_filters_guaranteed;
248 	u32 fd_filters_best_effort;
249 	bool rss;
250 	u32 rss_table_size;
251 	u32 rss_table_entry_width;
252 	bool led[I40E_HW_CAP_MAX_GPIO];
253 	bool sdp[I40E_HW_CAP_MAX_GPIO];
254 	u32 nvm_image_type;
255 	u32 num_flow_director_filters;
256 	u32 num_vfs;
257 	u32 vf_base_id;
258 	u32 num_vsis;
259 	u32 num_rx_qp;
260 	u32 num_tx_qp;
261 	u32 base_queue;
262 	u32 num_msix_vectors;
263 	u32 num_msix_vectors_vf;
264 	u32 led_pin_num;
265 	u32 sdp_pin_num;
266 	u32 mdio_port_num;
267 	u32 mdio_port_mode;
268 	u8 rx_buf_chain_len;
269 	u32 enabled_tcmap;
270 	u32 maxtc;
271 	u64 wr_csr_prot;