Lines Matching full:hw
9 static void i40e_resume_aq(struct i40e_hw *hw);
13 * @hw: pointer to the hardware structure
17 static void i40e_adminq_init_regs(struct i40e_hw *hw) in i40e_adminq_init_regs() argument
20 if (i40e_is_vf(hw)) { in i40e_adminq_init_regs()
21 hw->aq.asq.tail = I40E_VF_ATQT1; in i40e_adminq_init_regs()
22 hw->aq.asq.head = I40E_VF_ATQH1; in i40e_adminq_init_regs()
23 hw->aq.asq.len = I40E_VF_ATQLEN1; in i40e_adminq_init_regs()
24 hw->aq.asq.bal = I40E_VF_ATQBAL1; in i40e_adminq_init_regs()
25 hw->aq.asq.bah = I40E_VF_ATQBAH1; in i40e_adminq_init_regs()
26 hw->aq.arq.tail = I40E_VF_ARQT1; in i40e_adminq_init_regs()
27 hw->aq.arq.head = I40E_VF_ARQH1; in i40e_adminq_init_regs()
28 hw->aq.arq.len = I40E_VF_ARQLEN1; in i40e_adminq_init_regs()
29 hw->aq.arq.bal = I40E_VF_ARQBAL1; in i40e_adminq_init_regs()
30 hw->aq.arq.bah = I40E_VF_ARQBAH1; in i40e_adminq_init_regs()
32 hw->aq.asq.tail = I40E_PF_ATQT; in i40e_adminq_init_regs()
33 hw->aq.asq.head = I40E_PF_ATQH; in i40e_adminq_init_regs()
34 hw->aq.asq.len = I40E_PF_ATQLEN; in i40e_adminq_init_regs()
35 hw->aq.asq.bal = I40E_PF_ATQBAL; in i40e_adminq_init_regs()
36 hw->aq.asq.bah = I40E_PF_ATQBAH; in i40e_adminq_init_regs()
37 hw->aq.arq.tail = I40E_PF_ARQT; in i40e_adminq_init_regs()
38 hw->aq.arq.head = I40E_PF_ARQH; in i40e_adminq_init_regs()
39 hw->aq.arq.len = I40E_PF_ARQLEN; in i40e_adminq_init_regs()
40 hw->aq.arq.bal = I40E_PF_ARQBAL; in i40e_adminq_init_regs()
41 hw->aq.arq.bah = I40E_PF_ARQBAH; in i40e_adminq_init_regs()
47 * @hw: pointer to the hardware structure
49 static int i40e_alloc_adminq_asq_ring(struct i40e_hw *hw) in i40e_alloc_adminq_asq_ring() argument
53 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, in i40e_alloc_adminq_asq_ring()
54 (hw->aq.num_asq_entries * in i40e_alloc_adminq_asq_ring()
60 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf, in i40e_alloc_adminq_asq_ring()
61 (hw->aq.num_asq_entries * in i40e_alloc_adminq_asq_ring()
64 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_alloc_adminq_asq_ring()
73 * @hw: pointer to the hardware structure
75 static int i40e_alloc_adminq_arq_ring(struct i40e_hw *hw) in i40e_alloc_adminq_arq_ring() argument
79 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf, in i40e_alloc_adminq_arq_ring()
80 (hw->aq.num_arq_entries * in i40e_alloc_adminq_arq_ring()
89 * @hw: pointer to the hardware structure
94 static void i40e_free_adminq_asq(struct i40e_hw *hw) in i40e_free_adminq_asq() argument
96 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_free_adminq_asq()
101 * @hw: pointer to the hardware structure
106 static void i40e_free_adminq_arq(struct i40e_hw *hw) in i40e_free_adminq_arq() argument
108 i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf); in i40e_free_adminq_arq()
113 * @hw: pointer to the hardware structure
115 static int i40e_alloc_arq_bufs(struct i40e_hw *hw) in i40e_alloc_arq_bufs() argument
127 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.arq.dma_head, in i40e_alloc_arq_bufs()
128 (hw->aq.num_arq_entries * sizeof(struct i40e_dma_mem))); in i40e_alloc_arq_bufs()
131 hw->aq.arq.r.arq_bi = (struct i40e_dma_mem *)hw->aq.arq.dma_head.va; in i40e_alloc_arq_bufs()
134 for (i = 0; i < hw->aq.num_arq_entries; i++) { in i40e_alloc_arq_bufs()
135 bi = &hw->aq.arq.r.arq_bi[i]; in i40e_alloc_arq_bufs()
136 ret_code = i40e_allocate_dma_mem(hw, bi, in i40e_alloc_arq_bufs()
137 hw->aq.arq_buf_size, in i40e_alloc_arq_bufs()
143 desc = I40E_ADMINQ_DESC(hw->aq.arq, i); in i40e_alloc_arq_bufs()
146 if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF) in i40e_alloc_arq_bufs()
171 i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); in i40e_alloc_arq_bufs()
172 i40e_free_virt_mem(hw, &hw->aq.arq.dma_head); in i40e_alloc_arq_bufs()
179 * @hw: pointer to the hardware structure
181 static int i40e_alloc_asq_bufs(struct i40e_hw *hw) in i40e_alloc_asq_bufs() argument
188 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.dma_head, in i40e_alloc_asq_bufs()
189 (hw->aq.num_asq_entries * sizeof(struct i40e_dma_mem))); in i40e_alloc_asq_bufs()
192 hw->aq.asq.r.asq_bi = (struct i40e_dma_mem *)hw->aq.asq.dma_head.va; in i40e_alloc_asq_bufs()
195 for (i = 0; i < hw->aq.num_asq_entries; i++) { in i40e_alloc_asq_bufs()
196 bi = &hw->aq.asq.r.asq_bi[i]; in i40e_alloc_asq_bufs()
197 ret_code = i40e_allocate_dma_mem(hw, bi, in i40e_alloc_asq_bufs()
198 hw->aq.asq_buf_size, in i40e_alloc_asq_bufs()
210 i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); in i40e_alloc_asq_bufs()
211 i40e_free_virt_mem(hw, &hw->aq.asq.dma_head); in i40e_alloc_asq_bufs()
218 * @hw: pointer to the hardware structure
220 static void i40e_free_arq_bufs(struct i40e_hw *hw) in i40e_free_arq_bufs() argument
225 for (i = 0; i < hw->aq.num_arq_entries; i++) in i40e_free_arq_bufs()
226 i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); in i40e_free_arq_bufs()
229 i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf); in i40e_free_arq_bufs()
232 i40e_free_virt_mem(hw, &hw->aq.arq.dma_head); in i40e_free_arq_bufs()
237 * @hw: pointer to the hardware structure
239 static void i40e_free_asq_bufs(struct i40e_hw *hw) in i40e_free_asq_bufs() argument
244 for (i = 0; i < hw->aq.num_asq_entries; i++) in i40e_free_asq_bufs()
245 if (hw->aq.asq.r.asq_bi[i].pa) in i40e_free_asq_bufs()
246 i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); in i40e_free_asq_bufs()
249 i40e_free_virt_mem(hw, &hw->aq.asq.cmd_buf); in i40e_free_asq_bufs()
252 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_free_asq_bufs()
255 i40e_free_virt_mem(hw, &hw->aq.asq.dma_head); in i40e_free_asq_bufs()
260 * @hw: pointer to the hardware structure
264 static int i40e_config_asq_regs(struct i40e_hw *hw) in i40e_config_asq_regs() argument
270 wr32(hw, hw->aq.asq.head, 0); in i40e_config_asq_regs()
271 wr32(hw, hw->aq.asq.tail, 0); in i40e_config_asq_regs()
274 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in i40e_config_asq_regs()
276 wr32(hw, hw->aq.asq.bal, lower_32_bits(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs()
277 wr32(hw, hw->aq.asq.bah, upper_32_bits(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs()
280 reg = rd32(hw, hw->aq.asq.bal); in i40e_config_asq_regs()
281 if (reg != lower_32_bits(hw->aq.asq.desc_buf.pa)) in i40e_config_asq_regs()
289 * @hw: pointer to the hardware structure
293 static int i40e_config_arq_regs(struct i40e_hw *hw) in i40e_config_arq_regs() argument
299 wr32(hw, hw->aq.arq.head, 0); in i40e_config_arq_regs()
300 wr32(hw, hw->aq.arq.tail, 0); in i40e_config_arq_regs()
303 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in i40e_config_arq_regs()
305 wr32(hw, hw->aq.arq.bal, lower_32_bits(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs()
306 wr32(hw, hw->aq.arq.bah, upper_32_bits(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs()
308 /* Update tail in the HW to post pre-allocated buffers */ in i40e_config_arq_regs()
309 wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1); in i40e_config_arq_regs()
312 reg = rd32(hw, hw->aq.arq.bal); in i40e_config_arq_regs()
313 if (reg != lower_32_bits(hw->aq.arq.desc_buf.pa)) in i40e_config_arq_regs()
321 * @hw: pointer to the hardware structure
325 * in the hw->aq structure:
326 * - hw->aq.num_asq_entries
327 * - hw->aq.arq_buf_size
332 static int i40e_init_asq(struct i40e_hw *hw) in i40e_init_asq() argument
336 if (hw->aq.asq.count > 0) { in i40e_init_asq()
343 if ((hw->aq.num_asq_entries == 0) || in i40e_init_asq()
344 (hw->aq.asq_buf_size == 0)) { in i40e_init_asq()
349 hw->aq.asq.next_to_use = 0; in i40e_init_asq()
350 hw->aq.asq.next_to_clean = 0; in i40e_init_asq()
353 ret_code = i40e_alloc_adminq_asq_ring(hw); in i40e_init_asq()
358 ret_code = i40e_alloc_asq_bufs(hw); in i40e_init_asq()
363 ret_code = i40e_config_asq_regs(hw); in i40e_init_asq()
368 hw->aq.asq.count = hw->aq.num_asq_entries; in i40e_init_asq()
372 i40e_free_adminq_asq(hw); in i40e_init_asq()
380 * @hw: pointer to the hardware structure
384 * in the hw->aq structure:
385 * - hw->aq.num_asq_entries
386 * - hw->aq.arq_buf_size
391 static int i40e_init_arq(struct i40e_hw *hw) in i40e_init_arq() argument
395 if (hw->aq.arq.count > 0) { in i40e_init_arq()
402 if ((hw->aq.num_arq_entries == 0) || in i40e_init_arq()
403 (hw->aq.arq_buf_size == 0)) { in i40e_init_arq()
408 hw->aq.arq.next_to_use = 0; in i40e_init_arq()
409 hw->aq.arq.next_to_clean = 0; in i40e_init_arq()
412 ret_code = i40e_alloc_adminq_arq_ring(hw); in i40e_init_arq()
417 ret_code = i40e_alloc_arq_bufs(hw); in i40e_init_arq()
422 ret_code = i40e_config_arq_regs(hw); in i40e_init_arq()
427 hw->aq.arq.count = hw->aq.num_arq_entries; in i40e_init_arq()
431 i40e_free_adminq_arq(hw); in i40e_init_arq()
439 * @hw: pointer to the hardware structure
443 static int i40e_shutdown_asq(struct i40e_hw *hw) in i40e_shutdown_asq() argument
447 mutex_lock(&hw->aq.asq_mutex); in i40e_shutdown_asq()
449 if (hw->aq.asq.count == 0) { in i40e_shutdown_asq()
455 wr32(hw, hw->aq.asq.head, 0); in i40e_shutdown_asq()
456 wr32(hw, hw->aq.asq.tail, 0); in i40e_shutdown_asq()
457 wr32(hw, hw->aq.asq.len, 0); in i40e_shutdown_asq()
458 wr32(hw, hw->aq.asq.bal, 0); in i40e_shutdown_asq()
459 wr32(hw, hw->aq.asq.bah, 0); in i40e_shutdown_asq()
461 hw->aq.asq.count = 0; /* to indicate uninitialized queue */ in i40e_shutdown_asq()
464 i40e_free_asq_bufs(hw); in i40e_shutdown_asq()
467 mutex_unlock(&hw->aq.asq_mutex); in i40e_shutdown_asq()
473 * @hw: pointer to the hardware structure
477 static int i40e_shutdown_arq(struct i40e_hw *hw) in i40e_shutdown_arq() argument
481 mutex_lock(&hw->aq.arq_mutex); in i40e_shutdown_arq()
483 if (hw->aq.arq.count == 0) { in i40e_shutdown_arq()
489 wr32(hw, hw->aq.arq.head, 0); in i40e_shutdown_arq()
490 wr32(hw, hw->aq.arq.tail, 0); in i40e_shutdown_arq()
491 wr32(hw, hw->aq.arq.len, 0); in i40e_shutdown_arq()
492 wr32(hw, hw->aq.arq.bal, 0); in i40e_shutdown_arq()
493 wr32(hw, hw->aq.arq.bah, 0); in i40e_shutdown_arq()
495 hw->aq.arq.count = 0; /* to indicate uninitialized queue */ in i40e_shutdown_arq()
498 i40e_free_arq_bufs(hw); in i40e_shutdown_arq()
501 mutex_unlock(&hw->aq.arq_mutex); in i40e_shutdown_arq()
506 * i40e_set_hw_flags - set HW flags
507 * @hw: pointer to the hardware structure
509 static void i40e_set_hw_flags(struct i40e_hw *hw) in i40e_set_hw_flags() argument
511 struct i40e_adminq_info *aq = &hw->aq; in i40e_set_hw_flags()
513 hw->flags = 0; in i40e_set_hw_flags()
515 switch (hw->mac.type) { in i40e_set_hw_flags()
520 hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE; in i40e_set_hw_flags()
521 hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE; in i40e_set_hw_flags()
523 hw->flags |= I40E_HW_FLAG_802_1AD_CAPABLE; in i40e_set_hw_flags()
527 hw->flags |= I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE | in i40e_set_hw_flags()
533 hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE; in i40e_set_hw_flags()
538 hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE; in i40e_set_hw_flags()
543 hw->flags |= I40E_HW_FLAG_X722_FEC_REQUEST_CAPABLE; in i40e_set_hw_flags()
554 hw->flags |= I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK; in i40e_set_hw_flags()
559 hw->flags |= I40E_HW_FLAG_FW_LLDP_PERSISTENT; in i40e_set_hw_flags()
560 hw->flags |= I40E_HW_FLAG_DROP_MODE; in i40e_set_hw_flags()
566 hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_EXTENDED; in i40e_set_hw_flags()
571 * @hw: pointer to the hardware structure
574 * in the hw->aq structure:
575 * - hw->aq.num_asq_entries
576 * - hw->aq.num_arq_entries
577 * - hw->aq.arq_buf_size
578 * - hw->aq.asq_buf_size
580 int i40e_init_adminq(struct i40e_hw *hw) in i40e_init_adminq() argument
588 if ((hw->aq.num_arq_entries == 0) || in i40e_init_adminq()
589 (hw->aq.num_asq_entries == 0) || in i40e_init_adminq()
590 (hw->aq.arq_buf_size == 0) || in i40e_init_adminq()
591 (hw->aq.asq_buf_size == 0)) { in i40e_init_adminq()
597 i40e_adminq_init_regs(hw); in i40e_init_adminq()
600 hw->aq.asq_cmd_timeout = I40E_ASQ_CMD_TIMEOUT; in i40e_init_adminq()
603 ret_code = i40e_init_asq(hw); in i40e_init_adminq()
608 ret_code = i40e_init_arq(hw); in i40e_init_adminq()
617 ret_code = i40e_aq_get_firmware_version(hw, in i40e_init_adminq()
618 &hw->aq.fw_maj_ver, in i40e_init_adminq()
619 &hw->aq.fw_min_ver, in i40e_init_adminq()
620 &hw->aq.fw_build, in i40e_init_adminq()
621 &hw->aq.api_maj_ver, in i40e_init_adminq()
622 &hw->aq.api_min_ver, in i40e_init_adminq()
628 i40e_resume_aq(hw); in i40e_init_adminq()
636 i40e_set_hw_flags(hw); in i40e_init_adminq()
639 i40e_read_nvm_word(hw, I40E_SR_NVM_DEV_STARTER_VERSION, in i40e_init_adminq()
640 &hw->nvm.version); in i40e_init_adminq()
641 i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_LO, &eetrack_lo); in i40e_init_adminq()
642 i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_HI, &eetrack_hi); in i40e_init_adminq()
643 hw->nvm.eetrack = (eetrack_hi << 16) | eetrack_lo; in i40e_init_adminq()
644 i40e_read_nvm_word(hw, I40E_SR_BOOT_CONFIG_PTR, &cfg_ptr); in i40e_init_adminq()
645 i40e_read_nvm_word(hw, (cfg_ptr + I40E_NVM_OEM_VER_OFF), in i40e_init_adminq()
647 i40e_read_nvm_word(hw, (cfg_ptr + (I40E_NVM_OEM_VER_OFF + 1)), in i40e_init_adminq()
649 hw->nvm.oem_ver = ((u32)oem_hi << 16) | oem_lo; in i40e_init_adminq()
651 if (hw->mac.type == I40E_MAC_XL710 && in i40e_init_adminq()
652 hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && in i40e_init_adminq()
653 hw->aq.api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_XL710) { in i40e_init_adminq()
654 hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE; in i40e_init_adminq()
655 hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE; in i40e_init_adminq()
657 if (hw->mac.type == I40E_MAC_X722 && in i40e_init_adminq()
658 hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && in i40e_init_adminq()
659 hw->aq.api_min_ver >= I40E_MINOR_VER_FW_LLDP_STOPPABLE_X722) { in i40e_init_adminq()
660 hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE; in i40e_init_adminq()
664 if (hw->aq.api_maj_ver > 1 || in i40e_init_adminq()
665 (hw->aq.api_maj_ver == 1 && in i40e_init_adminq()
666 hw->aq.api_min_ver >= 7)) in i40e_init_adminq()
667 hw->flags |= I40E_HW_FLAG_802_1AD_CAPABLE; in i40e_init_adminq()
669 if (hw->aq.api_maj_ver > I40E_FW_API_VERSION_MAJOR) { in i40e_init_adminq()
675 i40e_aq_release_resource(hw, I40E_NVM_RESOURCE_ID, 0, NULL); in i40e_init_adminq()
676 hw->nvm_release_on_done = false; in i40e_init_adminq()
677 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_init_adminq()
685 i40e_shutdown_arq(hw); in i40e_init_adminq()
687 i40e_shutdown_asq(hw); in i40e_init_adminq()
696 * @hw: pointer to the hardware structure
698 void i40e_shutdown_adminq(struct i40e_hw *hw) in i40e_shutdown_adminq() argument
700 if (i40e_check_asq_alive(hw)) in i40e_shutdown_adminq()
701 i40e_aq_queue_shutdown(hw, true); in i40e_shutdown_adminq()
703 i40e_shutdown_asq(hw); in i40e_shutdown_adminq()
704 i40e_shutdown_arq(hw); in i40e_shutdown_adminq()
706 if (hw->nvm_buff.va) in i40e_shutdown_adminq()
707 i40e_free_virt_mem(hw, &hw->nvm_buff); in i40e_shutdown_adminq()
712 * @hw: pointer to the hardware structure
716 static u16 i40e_clean_asq(struct i40e_hw *hw) in i40e_clean_asq() argument
718 struct i40e_adminq_ring *asq = &(hw->aq.asq); in i40e_clean_asq()
726 while (rd32(hw, hw->aq.asq.head) != ntc) { in i40e_clean_asq()
727 i40e_debug(hw, I40E_DEBUG_AQ_COMMAND, in i40e_clean_asq()
728 "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head)); in i40e_clean_asq()
734 cb_func(hw, &desc_cb); in i40e_clean_asq()
752 * @hw: pointer to the hw struct
757 static bool i40e_asq_done(struct i40e_hw *hw) in i40e_asq_done() argument
762 return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use; in i40e_asq_done()
768 * @hw: pointer to the hw struct
779 i40e_asq_send_command_atomic_exec(struct i40e_hw *hw, in i40e_asq_send_command_atomic_exec() argument
794 if (hw->aq.asq.count == 0) { in i40e_asq_send_command_atomic_exec()
795 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, in i40e_asq_send_command_atomic_exec()
801 hw->aq.asq_last_status = I40E_AQ_RC_OK; in i40e_asq_send_command_atomic_exec()
803 val = rd32(hw, hw->aq.asq.head); in i40e_asq_send_command_atomic_exec()
804 if (val >= hw->aq.num_asq_entries) { in i40e_asq_send_command_atomic_exec()
805 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, in i40e_asq_send_command_atomic_exec()
811 details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use); in i40e_asq_send_command_atomic_exec()
833 if (buff_size > hw->aq.asq_buf_size) { in i40e_asq_send_command_atomic_exec()
834 i40e_debug(hw, in i40e_asq_send_command_atomic_exec()
843 i40e_debug(hw, in i40e_asq_send_command_atomic_exec()
857 if (i40e_clean_asq(hw) == 0) { in i40e_asq_send_command_atomic_exec()
858 i40e_debug(hw, in i40e_asq_send_command_atomic_exec()
866 desc_on_ring = I40E_ADMINQ_DESC(hw->aq.asq, hw->aq.asq.next_to_use); in i40e_asq_send_command_atomic_exec()
873 dma_buff = &(hw->aq.asq.r.asq_bi[hw->aq.asq.next_to_use]); in i40e_asq_send_command_atomic_exec()
888 i40e_debug(hw, I40E_DEBUG_AQ_COMMAND, "AQTX: desc and buffer:\n"); in i40e_asq_send_command_atomic_exec()
889 i40e_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc_on_ring, in i40e_asq_send_command_atomic_exec()
891 (hw->aq.asq.next_to_use)++; in i40e_asq_send_command_atomic_exec()
892 if (hw->aq.asq.next_to_use == hw->aq.asq.count) in i40e_asq_send_command_atomic_exec()
893 hw->aq.asq.next_to_use = 0; in i40e_asq_send_command_atomic_exec()
895 wr32(hw, hw->aq.asq.tail, hw->aq.asq.next_to_use); in i40e_asq_send_command_atomic_exec()
907 if (i40e_asq_done(hw)) in i40e_asq_send_command_atomic_exec()
916 } while (total_delay < hw->aq.asq_cmd_timeout); in i40e_asq_send_command_atomic_exec()
920 if (i40e_asq_done(hw)) { in i40e_asq_send_command_atomic_exec()
926 i40e_debug(hw, in i40e_asq_send_command_atomic_exec()
941 hw->aq.asq_last_status = (enum i40e_admin_queue_err)retval; in i40e_asq_send_command_atomic_exec()
944 i40e_debug(hw, I40E_DEBUG_AQ_COMMAND, in i40e_asq_send_command_atomic_exec()
946 i40e_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, buff, buff_size); in i40e_asq_send_command_atomic_exec()
955 if (rd32(hw, hw->aq.asq.len) & I40E_GL_ATQLEN_ATQCRIT_MASK) { in i40e_asq_send_command_atomic_exec()
956 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, in i40e_asq_send_command_atomic_exec()
960 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, in i40e_asq_send_command_atomic_exec()
972 * @hw: pointer to the hw struct
983 i40e_asq_send_command_atomic(struct i40e_hw *hw, in i40e_asq_send_command_atomic() argument
992 mutex_lock(&hw->aq.asq_mutex); in i40e_asq_send_command_atomic()
993 status = i40e_asq_send_command_atomic_exec(hw, desc, buff, buff_size, in i40e_asq_send_command_atomic()
997 mutex_unlock(&hw->aq.asq_mutex); in i40e_asq_send_command_atomic()
1002 i40e_asq_send_command(struct i40e_hw *hw, struct i40e_aq_desc *desc, in i40e_asq_send_command() argument
1006 return i40e_asq_send_command_atomic(hw, desc, buff, buff_size, in i40e_asq_send_command()
1012 * @hw: pointer to the hw struct
1022 * to avoid race conditions in access to hw->aq.asq_last_status.
1025 i40e_asq_send_command_atomic_v2(struct i40e_hw *hw, in i40e_asq_send_command_atomic_v2() argument
1035 mutex_lock(&hw->aq.asq_mutex); in i40e_asq_send_command_atomic_v2()
1036 status = i40e_asq_send_command_atomic_exec(hw, desc, buff, in i40e_asq_send_command_atomic_v2()
1041 *aq_status = hw->aq.asq_last_status; in i40e_asq_send_command_atomic_v2()
1042 mutex_unlock(&hw->aq.asq_mutex); in i40e_asq_send_command_atomic_v2()
1047 i40e_asq_send_command_v2(struct i40e_hw *hw, struct i40e_aq_desc *desc, in i40e_asq_send_command_v2() argument
1052 return i40e_asq_send_command_atomic_v2(hw, desc, buff, buff_size, in i40e_asq_send_command_v2()
1074 * @hw: pointer to the hw struct
1082 int i40e_clean_arq_element(struct i40e_hw *hw, in i40e_clean_arq_element() argument
1086 u16 ntc = hw->aq.arq.next_to_clean; in i40e_clean_arq_element()
1099 mutex_lock(&hw->aq.arq_mutex); in i40e_clean_arq_element()
1101 if (hw->aq.arq.count == 0) { in i40e_clean_arq_element()
1102 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, in i40e_clean_arq_element()
1109 ntu = rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK; in i40e_clean_arq_element()
1117 desc = I40E_ADMINQ_DESC(hw->aq.arq, ntc); in i40e_clean_arq_element()
1120 hw->aq.arq_last_status = in i40e_clean_arq_element()
1125 i40e_debug(hw, in i40e_clean_arq_element()
1128 hw->aq.arq_last_status); in i40e_clean_arq_element()
1135 memcpy(e->msg_buf, hw->aq.arq.r.arq_bi[desc_idx].va, in i40e_clean_arq_element()
1138 i40e_debug(hw, I40E_DEBUG_AQ_COMMAND, "AQRX: desc and buffer:\n"); in i40e_clean_arq_element()
1139 i40e_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, e->msg_buf, in i40e_clean_arq_element()
1140 hw->aq.arq_buf_size); in i40e_clean_arq_element()
1146 bi = &hw->aq.arq.r.arq_bi[ntc]; in i40e_clean_arq_element()
1150 if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF) in i40e_clean_arq_element()
1157 wr32(hw, hw->aq.arq.tail, ntc); in i40e_clean_arq_element()
1160 if (ntc == hw->aq.num_arq_entries) in i40e_clean_arq_element()
1162 hw->aq.arq.next_to_clean = ntc; in i40e_clean_arq_element()
1163 hw->aq.arq.next_to_use = ntu; in i40e_clean_arq_element()
1165 i40e_nvmupd_check_wait_event(hw, le16_to_cpu(e->desc.opcode), &e->desc); in i40e_clean_arq_element()
1169 *pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc); in i40e_clean_arq_element()
1171 mutex_unlock(&hw->aq.arq_mutex); in i40e_clean_arq_element()
1176 static void i40e_resume_aq(struct i40e_hw *hw) in i40e_resume_aq() argument
1179 hw->aq.asq.next_to_use = 0; in i40e_resume_aq()
1180 hw->aq.asq.next_to_clean = 0; in i40e_resume_aq()
1182 i40e_config_asq_regs(hw); in i40e_resume_aq()
1184 hw->aq.arq.next_to_use = 0; in i40e_resume_aq()
1185 hw->aq.arq.next_to_clean = 0; in i40e_resume_aq()
1187 i40e_config_arq_regs(hw); in i40e_resume_aq()