Lines Matching refs:hnae3_get_field

1203 	cfg->tc_num = hnae3_get_field(__le32_to_cpu(req->param[0]),  in hclge_parse_cfg()
1205 cfg->tqp_desc_num = hnae3_get_field(__le32_to_cpu(req->param[0]), in hclge_parse_cfg()
1209 cfg->phy_addr = hnae3_get_field(__le32_to_cpu(req->param[1]), in hclge_parse_cfg()
1212 cfg->media_type = hnae3_get_field(__le32_to_cpu(req->param[1]), in hclge_parse_cfg()
1215 cfg->rx_buf_len = hnae3_get_field(__le32_to_cpu(req->param[1]), in hclge_parse_cfg()
1220 mac_addr_tmp_high = hnae3_get_field(__le32_to_cpu(req->param[3]), in hclge_parse_cfg()
1226 cfg->default_speed = hnae3_get_field(__le32_to_cpu(req->param[3]), in hclge_parse_cfg()
1229 cfg->vf_rss_size_max = hnae3_get_field(__le32_to_cpu(req->param[3]), in hclge_parse_cfg()
1239 cfg->speed_ability = hnae3_get_field(__le32_to_cpu(req->param[1]), in hclge_parse_cfg()
1242 speed_ability_ext = hnae3_get_field(__le32_to_cpu(req->param[1]), in hclge_parse_cfg()
1247 cfg->vlan_fliter_cap = hnae3_get_field(__le32_to_cpu(req->param[1]), in hclge_parse_cfg()
1251 cfg->umv_space = hnae3_get_field(__le32_to_cpu(req->param[1]), in hclge_parse_cfg()
1255 cfg->pf_rss_size_max = hnae3_get_field(__le32_to_cpu(req->param[2]), in hclge_parse_cfg()
1274 cfg->tx_spare_buf_size = hnae3_get_field(__le32_to_cpu(req->param[2]), in hclge_parse_cfg()
4917 req->int_vector_id_l = hnae3_get_field(vector_id, in hclge_bind_ring_with_vector()
4920 req->int_vector_id_h = hnae3_get_field(vector_id, in hclge_bind_ring_with_vector()
4934 hnae3_get_field(node->int_gl_idx, in hclge_bind_ring_with_vector()
4955 hnae3_get_field(vector_id, in hclge_bind_ring_with_vector()
4959 hnae3_get_field(vector_id, in hclge_bind_ring_with_vector()
11039 mdix_ctrl = hnae3_get_field(retval, HCLGE_PHY_MDIX_CTRL_M, in hclge_get_mdix_mode()