Lines Matching refs:mdio_ctl
34 __be32 mdio_ctl; /* MDIO control */ member
138 u32 mdio_ctl, mdio_stat; in xgmac_mdio_write_c22() local
150 mdio_ctl = MDIO_CTL_PORT_ADDR(phy_id) | MDIO_CTL_DEV_ADDR(dev_addr); in xgmac_mdio_write_c22()
151 xgmac_write32(mdio_ctl, ®s->mdio_ctl, endian); in xgmac_mdio_write_c22()
169 u32 mdio_ctl, mdio_stat; in xgmac_mdio_write_c45() local
182 mdio_ctl = MDIO_CTL_PORT_ADDR(phy_id) | MDIO_CTL_DEV_ADDR(dev_addr); in xgmac_mdio_write_c45()
183 xgmac_write32(mdio_ctl, ®s->mdio_ctl, endian); in xgmac_mdio_write_c45()
214 uint32_t mdio_ctl; in xgmac_mdio_read_c22() local
226 mdio_ctl = MDIO_CTL_PORT_ADDR(phy_id) | MDIO_CTL_DEV_ADDR(dev_addr); in xgmac_mdio_read_c22()
227 xgmac_write32(mdio_ctl, ®s->mdio_ctl, endian); in xgmac_mdio_read_c22()
236 xgmac_write32(mdio_ctl | MDIO_CTL_READ, ®s->mdio_ctl, endian); in xgmac_mdio_read_c22()
271 u32 mdio_stat, mdio_ctl; in xgmac_mdio_read_c45() local
285 mdio_ctl = MDIO_CTL_PORT_ADDR(phy_id) | MDIO_CTL_DEV_ADDR(dev_addr); in xgmac_mdio_read_c45()
286 xgmac_write32(mdio_ctl, ®s->mdio_ctl, endian); in xgmac_mdio_read_c45()
302 xgmac_write32(mdio_ctl | MDIO_CTL_READ, ®s->mdio_ctl, endian); in xgmac_mdio_read_c45()