Lines Matching defs:ucc_geth_scheduler
449 struct ucc_geth_scheduler { struct
450 u16 cpucount0; /* CPU packet counter */
451 u16 cpucount1; /* CPU packet counter */
452 u16 cecount0; /* QE packet counter */
453 u16 cecount1; /* QE packet counter */
454 u16 cpucount2; /* CPU packet counter */
455 u16 cpucount3; /* CPU packet counter */
456 u16 cecount2; /* QE packet counter */
457 u16 cecount3; /* QE packet counter */
458 u16 cpucount4; /* CPU packet counter */
459 u16 cpucount5; /* CPU packet counter */
460 u16 cecount4; /* QE packet counter */
461 u16 cecount5; /* QE packet counter */
462 u16 cpucount6; /* CPU packet counter */
463 u16 cpucount7; /* CPU packet counter */
464 u16 cecount6; /* QE packet counter */
465 u16 cecount7; /* QE packet counter */
466 u32 weightstatus[NUM_TX_QUEUES]; /* accumulated weight factor */
467 u32 rtsrshadow; /* temporary variable handled by QE */
468 u32 time; /* temporary variable handled by QE */
469 u32 ttl; /* temporary variable handled by QE */
470 u32 mblinterval; /* max burst length interval */
471 u16 nortsrbytetime; /* normalized value of byte time in tsr units */
472 u8 fracsiz; /* radix 2 log value of denom. of
474 u8 res0[1];
475 u8 strictpriorityq; /* Strict Priority Mask register */
476 u8 txasap; /* Transmit ASAP register */
477 u8 extrabw; /* Extra BandWidth register */
478 u8 oldwfqmask; /* temporary variable handled by QE */
479 u8 weightfactor[NUM_TX_QUEUES];
481 u32 minw; /* temporary variable handled by QE */
482 u8 res1[0x70 - 0x64];