Lines Matching +full:bd +full:- +full:address
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2006-2009 Freescale Semicondutor, Inc. All rights reserved.
26 #include <linux/dma-mapping.h>
62 #define UGETH_MSG_DEFAULT (NETIF_MSG_IFUP << 1 ) - 1
69 } debug = { -1 };
102 /* adjusted at startup if max-speed 1000 */
215 struct list_head *node = lh->next; in dequeue()
226 u8 __iomem *bd) in get_new_skb() argument
230 skb = netdev_alloc_skb(ugeth->ndev, in get_new_skb()
231 ugeth->ug_info->uf_info.max_rx_buf_length + in get_new_skb()
240 UCC_GETH_RX_DATA_BUF_ALIGNMENT - in get_new_skb()
241 (((unsigned)skb->data) & (UCC_GETH_RX_DATA_BUF_ALIGNMENT - in get_new_skb()
244 out_be32(&((struct qe_bd __iomem *)bd)->buf, in get_new_skb()
245 dma_map_single(ugeth->dev, in get_new_skb()
246 skb->data, in get_new_skb()
247 ugeth->ug_info->uf_info.max_rx_buf_length + in get_new_skb()
251 out_be32((u32 __iomem *)bd, in get_new_skb()
252 (R_E | R_I | (in_be32((u32 __iomem*)bd) & R_W))); in get_new_skb()
259 u8 __iomem *bd; in rx_bd_buffer_set() local
264 bd = ugeth->p_rx_bd_ring[rxQ]; in rx_bd_buffer_set()
268 bd_status = in_be32((u32 __iomem *)bd); in rx_bd_buffer_set()
269 skb = get_new_skb(ugeth, bd); in rx_bd_buffer_set()
273 return -ENOMEM; in rx_bd_buffer_set()
275 ugeth->rx_skbuff[rxQ][i] = skb; in rx_bd_buffer_set()
277 /* advance the BD pointer */ in rx_bd_buffer_set()
278 bd += sizeof(struct qe_bd); in rx_bd_buffer_set()
313 return -ENOMEM; in fill_init_enet_entries()
337 /* Check that this entry was actually valid -- in return_init_enet_entries()
372 /* Check that this entry was actually valid -- in dump_init_enet_entries()
385 pr_info("Base address: 0x%08x\n", in dump_init_enet_entries()
416 return -EINVAL; in hw_clear_addr_in_paddr()
420 (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth->p_rx_glbl_pram-> in hw_clear_addr_in_paddr()
423 /* Writing address ff.ff.ff.ff.ff.ff disables address in hw_clear_addr_in_paddr()
425 out_be16(&p_82xx_addr_filt->paddr[paddr_num].h, 0xffff); in hw_clear_addr_in_paddr()
426 out_be16(&p_82xx_addr_filt->paddr[paddr_num].m, 0xffff); in hw_clear_addr_in_paddr()
427 out_be16(&p_82xx_addr_filt->paddr[paddr_num].l, 0xffff); in hw_clear_addr_in_paddr()
439 (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth->p_rx_glbl_pram-> in hw_add_addr_in_hash()
443 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); in hw_add_addr_in_hash()
447 /* the address to the hash (Big Endian mode), we reverse the bytes.*/ in hw_add_addr_in_hash()
449 set_mac_addr(&p_82xx_addr_filt->taddr.h, p_enet_addr); in hw_add_addr_in_hash()
468 ug_regs = ugeth->ug_regs; in get_statistics()
470 p_tx_fw_statistics_pram = ugeth->p_tx_fw_statistics_pram; in get_statistics()
471 p_rx_fw_statistics_pram = ugeth->p_rx_fw_statistics_pram; in get_statistics()
476 tx_firmware_statistics->sicoltx = in get_statistics()
477 in_be32(&p_tx_fw_statistics_pram->sicoltx); in get_statistics()
478 tx_firmware_statistics->mulcoltx = in get_statistics()
479 in_be32(&p_tx_fw_statistics_pram->mulcoltx); in get_statistics()
480 tx_firmware_statistics->latecoltxfr = in get_statistics()
481 in_be32(&p_tx_fw_statistics_pram->latecoltxfr); in get_statistics()
482 tx_firmware_statistics->frabortduecol = in get_statistics()
483 in_be32(&p_tx_fw_statistics_pram->frabortduecol); in get_statistics()
484 tx_firmware_statistics->frlostinmactxer = in get_statistics()
485 in_be32(&p_tx_fw_statistics_pram->frlostinmactxer); in get_statistics()
486 tx_firmware_statistics->carriersenseertx = in get_statistics()
487 in_be32(&p_tx_fw_statistics_pram->carriersenseertx); in get_statistics()
488 tx_firmware_statistics->frtxok = in get_statistics()
489 in_be32(&p_tx_fw_statistics_pram->frtxok); in get_statistics()
490 tx_firmware_statistics->txfrexcessivedefer = in get_statistics()
491 in_be32(&p_tx_fw_statistics_pram->txfrexcessivedefer); in get_statistics()
492 tx_firmware_statistics->txpkts256 = in get_statistics()
493 in_be32(&p_tx_fw_statistics_pram->txpkts256); in get_statistics()
494 tx_firmware_statistics->txpkts512 = in get_statistics()
495 in_be32(&p_tx_fw_statistics_pram->txpkts512); in get_statistics()
496 tx_firmware_statistics->txpkts1024 = in get_statistics()
497 in_be32(&p_tx_fw_statistics_pram->txpkts1024); in get_statistics()
498 tx_firmware_statistics->txpktsjumbo = in get_statistics()
499 in_be32(&p_tx_fw_statistics_pram->txpktsjumbo); in get_statistics()
506 rx_firmware_statistics->frrxfcser = in get_statistics()
507 in_be32(&p_rx_fw_statistics_pram->frrxfcser); in get_statistics()
508 rx_firmware_statistics->fraligner = in get_statistics()
509 in_be32(&p_rx_fw_statistics_pram->fraligner); in get_statistics()
510 rx_firmware_statistics->inrangelenrxer = in get_statistics()
511 in_be32(&p_rx_fw_statistics_pram->inrangelenrxer); in get_statistics()
512 rx_firmware_statistics->outrangelenrxer = in get_statistics()
513 in_be32(&p_rx_fw_statistics_pram->outrangelenrxer); in get_statistics()
514 rx_firmware_statistics->frtoolong = in get_statistics()
515 in_be32(&p_rx_fw_statistics_pram->frtoolong); in get_statistics()
516 rx_firmware_statistics->runt = in get_statistics()
517 in_be32(&p_rx_fw_statistics_pram->runt); in get_statistics()
518 rx_firmware_statistics->verylongevent = in get_statistics()
519 in_be32(&p_rx_fw_statistics_pram->verylongevent); in get_statistics()
520 rx_firmware_statistics->symbolerror = in get_statistics()
521 in_be32(&p_rx_fw_statistics_pram->symbolerror); in get_statistics()
522 rx_firmware_statistics->dropbsy = in get_statistics()
523 in_be32(&p_rx_fw_statistics_pram->dropbsy); in get_statistics()
525 rx_firmware_statistics->res0[i] = in get_statistics()
526 p_rx_fw_statistics_pram->res0[i]; in get_statistics()
527 rx_firmware_statistics->mismatchdrop = in get_statistics()
528 in_be32(&p_rx_fw_statistics_pram->mismatchdrop); in get_statistics()
529 rx_firmware_statistics->underpkts = in get_statistics()
530 in_be32(&p_rx_fw_statistics_pram->underpkts); in get_statistics()
531 rx_firmware_statistics->pkts256 = in get_statistics()
532 in_be32(&p_rx_fw_statistics_pram->pkts256); in get_statistics()
533 rx_firmware_statistics->pkts512 = in get_statistics()
534 in_be32(&p_rx_fw_statistics_pram->pkts512); in get_statistics()
535 rx_firmware_statistics->pkts1024 = in get_statistics()
536 in_be32(&p_rx_fw_statistics_pram->pkts1024); in get_statistics()
537 rx_firmware_statistics->pktsjumbo = in get_statistics()
538 in_be32(&p_rx_fw_statistics_pram->pktsjumbo); in get_statistics()
539 rx_firmware_statistics->frlossinmacer = in get_statistics()
540 in_be32(&p_rx_fw_statistics_pram->frlossinmacer); in get_statistics()
541 rx_firmware_statistics->pausefr = in get_statistics()
542 in_be32(&p_rx_fw_statistics_pram->pausefr); in get_statistics()
544 rx_firmware_statistics->res1[i] = in get_statistics()
545 p_rx_fw_statistics_pram->res1[i]; in get_statistics()
546 rx_firmware_statistics->removevlan = in get_statistics()
547 in_be32(&p_rx_fw_statistics_pram->removevlan); in get_statistics()
548 rx_firmware_statistics->replacevlan = in get_statistics()
549 in_be32(&p_rx_fw_statistics_pram->replacevlan); in get_statistics()
550 rx_firmware_statistics->insertvlan = in get_statistics()
551 in_be32(&p_rx_fw_statistics_pram->insertvlan); in get_statistics()
557 (in_be32(&uf_regs->upsmr) & UCC_GETH_UPSMR_HSE)) { in get_statistics()
558 hardware_statistics->tx64 = in_be32(&ug_regs->tx64); in get_statistics()
559 hardware_statistics->tx127 = in_be32(&ug_regs->tx127); in get_statistics()
560 hardware_statistics->tx255 = in_be32(&ug_regs->tx255); in get_statistics()
561 hardware_statistics->rx64 = in_be32(&ug_regs->rx64); in get_statistics()
562 hardware_statistics->rx127 = in_be32(&ug_regs->rx127); in get_statistics()
563 hardware_statistics->rx255 = in_be32(&ug_regs->rx255); in get_statistics()
564 hardware_statistics->txok = in_be32(&ug_regs->txok); in get_statistics()
565 hardware_statistics->txcf = in_be16(&ug_regs->txcf); in get_statistics()
566 hardware_statistics->tmca = in_be32(&ug_regs->tmca); in get_statistics()
567 hardware_statistics->tbca = in_be32(&ug_regs->tbca); in get_statistics()
568 hardware_statistics->rxfok = in_be32(&ug_regs->rxfok); in get_statistics()
569 hardware_statistics->rxbok = in_be32(&ug_regs->rxbok); in get_statistics()
570 hardware_statistics->rbyt = in_be32(&ug_regs->rbyt); in get_statistics()
571 hardware_statistics->rmca = in_be32(&ug_regs->rmca); in get_statistics()
572 hardware_statistics->rbca = in_be32(&ug_regs->rbca); in get_statistics()
581 for (i = 0; i < ucc_geth_tx_queues(ugeth->ug_info); i++) { in dump_bds()
582 if (ugeth->p_tx_bd_ring[i]) { in dump_bds()
584 (ugeth->ug_info->bdRingLenTx[i] * in dump_bds()
587 mem_disp(ugeth->p_tx_bd_ring[i], length); in dump_bds()
590 for (i = 0; i < ucc_geth_rx_queues(ugeth->ug_info); i++) { in dump_bds()
591 if (ugeth->p_rx_bd_ring[i]) { in dump_bds()
593 (ugeth->ug_info->bdRingLenRx[i] * in dump_bds()
596 mem_disp(ugeth->p_rx_bd_ring[i], length); in dump_bds()
605 pr_info("UCC%d Geth registers:\n", ugeth->ug_info->uf_info.ucc_num + 1); in dump_regs()
606 pr_info("Base address: 0x%08x\n", (u32)ugeth->ug_regs); in dump_regs()
608 pr_info("maccfg1 : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
609 (u32)&ugeth->ug_regs->maccfg1, in dump_regs()
610 in_be32(&ugeth->ug_regs->maccfg1)); in dump_regs()
611 pr_info("maccfg2 : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
612 (u32)&ugeth->ug_regs->maccfg2, in dump_regs()
613 in_be32(&ugeth->ug_regs->maccfg2)); in dump_regs()
614 pr_info("ipgifg : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
615 (u32)&ugeth->ug_regs->ipgifg, in dump_regs()
616 in_be32(&ugeth->ug_regs->ipgifg)); in dump_regs()
617 pr_info("hafdup : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
618 (u32)&ugeth->ug_regs->hafdup, in dump_regs()
619 in_be32(&ugeth->ug_regs->hafdup)); in dump_regs()
620 pr_info("ifctl : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
621 (u32)&ugeth->ug_regs->ifctl, in dump_regs()
622 in_be32(&ugeth->ug_regs->ifctl)); in dump_regs()
623 pr_info("ifstat : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
624 (u32)&ugeth->ug_regs->ifstat, in dump_regs()
625 in_be32(&ugeth->ug_regs->ifstat)); in dump_regs()
626 pr_info("macstnaddr1: addr - 0x%08x, val - 0x%08x\n", in dump_regs()
627 (u32)&ugeth->ug_regs->macstnaddr1, in dump_regs()
628 in_be32(&ugeth->ug_regs->macstnaddr1)); in dump_regs()
629 pr_info("macstnaddr2: addr - 0x%08x, val - 0x%08x\n", in dump_regs()
630 (u32)&ugeth->ug_regs->macstnaddr2, in dump_regs()
631 in_be32(&ugeth->ug_regs->macstnaddr2)); in dump_regs()
632 pr_info("uempr : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
633 (u32)&ugeth->ug_regs->uempr, in dump_regs()
634 in_be32(&ugeth->ug_regs->uempr)); in dump_regs()
635 pr_info("utbipar : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
636 (u32)&ugeth->ug_regs->utbipar, in dump_regs()
637 in_be32(&ugeth->ug_regs->utbipar)); in dump_regs()
638 pr_info("uescr : addr - 0x%08x, val - 0x%04x\n", in dump_regs()
639 (u32)&ugeth->ug_regs->uescr, in dump_regs()
640 in_be16(&ugeth->ug_regs->uescr)); in dump_regs()
641 pr_info("tx64 : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
642 (u32)&ugeth->ug_regs->tx64, in dump_regs()
643 in_be32(&ugeth->ug_regs->tx64)); in dump_regs()
644 pr_info("tx127 : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
645 (u32)&ugeth->ug_regs->tx127, in dump_regs()
646 in_be32(&ugeth->ug_regs->tx127)); in dump_regs()
647 pr_info("tx255 : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
648 (u32)&ugeth->ug_regs->tx255, in dump_regs()
649 in_be32(&ugeth->ug_regs->tx255)); in dump_regs()
650 pr_info("rx64 : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
651 (u32)&ugeth->ug_regs->rx64, in dump_regs()
652 in_be32(&ugeth->ug_regs->rx64)); in dump_regs()
653 pr_info("rx127 : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
654 (u32)&ugeth->ug_regs->rx127, in dump_regs()
655 in_be32(&ugeth->ug_regs->rx127)); in dump_regs()
656 pr_info("rx255 : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
657 (u32)&ugeth->ug_regs->rx255, in dump_regs()
658 in_be32(&ugeth->ug_regs->rx255)); in dump_regs()
659 pr_info("txok : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
660 (u32)&ugeth->ug_regs->txok, in dump_regs()
661 in_be32(&ugeth->ug_regs->txok)); in dump_regs()
662 pr_info("txcf : addr - 0x%08x, val - 0x%04x\n", in dump_regs()
663 (u32)&ugeth->ug_regs->txcf, in dump_regs()
664 in_be16(&ugeth->ug_regs->txcf)); in dump_regs()
665 pr_info("tmca : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
666 (u32)&ugeth->ug_regs->tmca, in dump_regs()
667 in_be32(&ugeth->ug_regs->tmca)); in dump_regs()
668 pr_info("tbca : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
669 (u32)&ugeth->ug_regs->tbca, in dump_regs()
670 in_be32(&ugeth->ug_regs->tbca)); in dump_regs()
671 pr_info("rxfok : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
672 (u32)&ugeth->ug_regs->rxfok, in dump_regs()
673 in_be32(&ugeth->ug_regs->rxfok)); in dump_regs()
674 pr_info("rxbok : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
675 (u32)&ugeth->ug_regs->rxbok, in dump_regs()
676 in_be32(&ugeth->ug_regs->rxbok)); in dump_regs()
677 pr_info("rbyt : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
678 (u32)&ugeth->ug_regs->rbyt, in dump_regs()
679 in_be32(&ugeth->ug_regs->rbyt)); in dump_regs()
680 pr_info("rmca : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
681 (u32)&ugeth->ug_regs->rmca, in dump_regs()
682 in_be32(&ugeth->ug_regs->rmca)); in dump_regs()
683 pr_info("rbca : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
684 (u32)&ugeth->ug_regs->rbca, in dump_regs()
685 in_be32(&ugeth->ug_regs->rbca)); in dump_regs()
686 pr_info("scar : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
687 (u32)&ugeth->ug_regs->scar, in dump_regs()
688 in_be32(&ugeth->ug_regs->scar)); in dump_regs()
689 pr_info("scam : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
690 (u32)&ugeth->ug_regs->scam, in dump_regs()
691 in_be32(&ugeth->ug_regs->scam)); in dump_regs()
693 if (ugeth->p_thread_data_tx) { in dump_regs()
694 int count = ucc_geth_thread_count(ugeth->ug_info->numThreadsTx); in dump_regs()
697 pr_info("Base address: 0x%08x\n", in dump_regs()
698 (u32)ugeth->p_thread_data_tx); in dump_regs()
701 pr_info("Base address: 0x%08x\n", in dump_regs()
702 (u32)&ugeth->p_thread_data_tx[i]); in dump_regs()
703 mem_disp((u8 *) & ugeth->p_thread_data_tx[i], in dump_regs()
707 if (ugeth->p_thread_data_rx) { in dump_regs()
708 int count = ucc_geth_thread_count(ugeth->ug_info->numThreadsRx); in dump_regs()
711 pr_info("Base address: 0x%08x\n", in dump_regs()
712 (u32)ugeth->p_thread_data_rx); in dump_regs()
715 pr_info("Base address: 0x%08x\n", in dump_regs()
716 (u32)&ugeth->p_thread_data_rx[i]); in dump_regs()
717 mem_disp((u8 *) & ugeth->p_thread_data_rx[i], in dump_regs()
721 if (ugeth->p_exf_glbl_param) { in dump_regs()
723 pr_info("Base address: 0x%08x\n", in dump_regs()
724 (u32)ugeth->p_exf_glbl_param); in dump_regs()
725 mem_disp((u8 *) ugeth->p_exf_glbl_param, in dump_regs()
726 sizeof(*ugeth->p_exf_glbl_param)); in dump_regs()
728 if (ugeth->p_tx_glbl_pram) { in dump_regs()
730 pr_info("Base address: 0x%08x\n", (u32)ugeth->p_tx_glbl_pram); in dump_regs()
731 pr_info("temoder : addr - 0x%08x, val - 0x%04x\n", in dump_regs()
732 (u32)&ugeth->p_tx_glbl_pram->temoder, in dump_regs()
733 in_be16(&ugeth->p_tx_glbl_pram->temoder)); in dump_regs()
734 pr_info("sqptr : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
735 (u32)&ugeth->p_tx_glbl_pram->sqptr, in dump_regs()
736 in_be32(&ugeth->p_tx_glbl_pram->sqptr)); in dump_regs()
737 pr_info("schedulerbasepointer: addr - 0x%08x, val - 0x%08x\n", in dump_regs()
738 (u32)&ugeth->p_tx_glbl_pram->schedulerbasepointer, in dump_regs()
739 in_be32(&ugeth->p_tx_glbl_pram->schedulerbasepointer)); in dump_regs()
740 pr_info("txrmonbaseptr: addr - 0x%08x, val - 0x%08x\n", in dump_regs()
741 (u32)&ugeth->p_tx_glbl_pram->txrmonbaseptr, in dump_regs()
742 in_be32(&ugeth->p_tx_glbl_pram->txrmonbaseptr)); in dump_regs()
743 pr_info("tstate : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
744 (u32)&ugeth->p_tx_glbl_pram->tstate, in dump_regs()
745 in_be32(&ugeth->p_tx_glbl_pram->tstate)); in dump_regs()
746 pr_info("iphoffset[0] : addr - 0x%08x, val - 0x%02x\n", in dump_regs()
747 (u32)&ugeth->p_tx_glbl_pram->iphoffset[0], in dump_regs()
748 ugeth->p_tx_glbl_pram->iphoffset[0]); in dump_regs()
749 pr_info("iphoffset[1] : addr - 0x%08x, val - 0x%02x\n", in dump_regs()
750 (u32)&ugeth->p_tx_glbl_pram->iphoffset[1], in dump_regs()
751 ugeth->p_tx_glbl_pram->iphoffset[1]); in dump_regs()
752 pr_info("iphoffset[2] : addr - 0x%08x, val - 0x%02x\n", in dump_regs()
753 (u32)&ugeth->p_tx_glbl_pram->iphoffset[2], in dump_regs()
754 ugeth->p_tx_glbl_pram->iphoffset[2]); in dump_regs()
755 pr_info("iphoffset[3] : addr - 0x%08x, val - 0x%02x\n", in dump_regs()
756 (u32)&ugeth->p_tx_glbl_pram->iphoffset[3], in dump_regs()
757 ugeth->p_tx_glbl_pram->iphoffset[3]); in dump_regs()
758 pr_info("iphoffset[4] : addr - 0x%08x, val - 0x%02x\n", in dump_regs()
759 (u32)&ugeth->p_tx_glbl_pram->iphoffset[4], in dump_regs()
760 ugeth->p_tx_glbl_pram->iphoffset[4]); in dump_regs()
761 pr_info("iphoffset[5] : addr - 0x%08x, val - 0x%02x\n", in dump_regs()
762 (u32)&ugeth->p_tx_glbl_pram->iphoffset[5], in dump_regs()
763 ugeth->p_tx_glbl_pram->iphoffset[5]); in dump_regs()
764 pr_info("iphoffset[6] : addr - 0x%08x, val - 0x%02x\n", in dump_regs()
765 (u32)&ugeth->p_tx_glbl_pram->iphoffset[6], in dump_regs()
766 ugeth->p_tx_glbl_pram->iphoffset[6]); in dump_regs()
767 pr_info("iphoffset[7] : addr - 0x%08x, val - 0x%02x\n", in dump_regs()
768 (u32)&ugeth->p_tx_glbl_pram->iphoffset[7], in dump_regs()
769 ugeth->p_tx_glbl_pram->iphoffset[7]); in dump_regs()
770 pr_info("vtagtable[0] : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
771 (u32)&ugeth->p_tx_glbl_pram->vtagtable[0], in dump_regs()
772 in_be32(&ugeth->p_tx_glbl_pram->vtagtable[0])); in dump_regs()
773 pr_info("vtagtable[1] : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
774 (u32)&ugeth->p_tx_glbl_pram->vtagtable[1], in dump_regs()
775 in_be32(&ugeth->p_tx_glbl_pram->vtagtable[1])); in dump_regs()
776 pr_info("vtagtable[2] : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
777 (u32)&ugeth->p_tx_glbl_pram->vtagtable[2], in dump_regs()
778 in_be32(&ugeth->p_tx_glbl_pram->vtagtable[2])); in dump_regs()
779 pr_info("vtagtable[3] : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
780 (u32)&ugeth->p_tx_glbl_pram->vtagtable[3], in dump_regs()
781 in_be32(&ugeth->p_tx_glbl_pram->vtagtable[3])); in dump_regs()
782 pr_info("vtagtable[4] : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
783 (u32)&ugeth->p_tx_glbl_pram->vtagtable[4], in dump_regs()
784 in_be32(&ugeth->p_tx_glbl_pram->vtagtable[4])); in dump_regs()
785 pr_info("vtagtable[5] : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
786 (u32)&ugeth->p_tx_glbl_pram->vtagtable[5], in dump_regs()
787 in_be32(&ugeth->p_tx_glbl_pram->vtagtable[5])); in dump_regs()
788 pr_info("vtagtable[6] : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
789 (u32)&ugeth->p_tx_glbl_pram->vtagtable[6], in dump_regs()
790 in_be32(&ugeth->p_tx_glbl_pram->vtagtable[6])); in dump_regs()
791 pr_info("vtagtable[7] : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
792 (u32)&ugeth->p_tx_glbl_pram->vtagtable[7], in dump_regs()
793 in_be32(&ugeth->p_tx_glbl_pram->vtagtable[7])); in dump_regs()
794 pr_info("tqptr : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
795 (u32)&ugeth->p_tx_glbl_pram->tqptr, in dump_regs()
796 in_be32(&ugeth->p_tx_glbl_pram->tqptr)); in dump_regs()
798 if (ugeth->p_rx_glbl_pram) { in dump_regs()
800 pr_info("Base address: 0x%08x\n", (u32)ugeth->p_rx_glbl_pram); in dump_regs()
801 pr_info("remoder : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
802 (u32)&ugeth->p_rx_glbl_pram->remoder, in dump_regs()
803 in_be32(&ugeth->p_rx_glbl_pram->remoder)); in dump_regs()
804 pr_info("rqptr : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
805 (u32)&ugeth->p_rx_glbl_pram->rqptr, in dump_regs()
806 in_be32(&ugeth->p_rx_glbl_pram->rqptr)); in dump_regs()
807 pr_info("typeorlen : addr - 0x%08x, val - 0x%04x\n", in dump_regs()
808 (u32)&ugeth->p_rx_glbl_pram->typeorlen, in dump_regs()
809 in_be16(&ugeth->p_rx_glbl_pram->typeorlen)); in dump_regs()
810 pr_info("rxgstpack : addr - 0x%08x, val - 0x%02x\n", in dump_regs()
811 (u32)&ugeth->p_rx_glbl_pram->rxgstpack, in dump_regs()
812 ugeth->p_rx_glbl_pram->rxgstpack); in dump_regs()
813 pr_info("rxrmonbaseptr : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
814 (u32)&ugeth->p_rx_glbl_pram->rxrmonbaseptr, in dump_regs()
815 in_be32(&ugeth->p_rx_glbl_pram->rxrmonbaseptr)); in dump_regs()
816 pr_info("intcoalescingptr: addr - 0x%08x, val - 0x%08x\n", in dump_regs()
817 (u32)&ugeth->p_rx_glbl_pram->intcoalescingptr, in dump_regs()
818 in_be32(&ugeth->p_rx_glbl_pram->intcoalescingptr)); in dump_regs()
819 pr_info("rstate : addr - 0x%08x, val - 0x%02x\n", in dump_regs()
820 (u32)&ugeth->p_rx_glbl_pram->rstate, in dump_regs()
821 ugeth->p_rx_glbl_pram->rstate); in dump_regs()
822 pr_info("mrblr : addr - 0x%08x, val - 0x%04x\n", in dump_regs()
823 (u32)&ugeth->p_rx_glbl_pram->mrblr, in dump_regs()
824 in_be16(&ugeth->p_rx_glbl_pram->mrblr)); in dump_regs()
825 pr_info("rbdqptr : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
826 (u32)&ugeth->p_rx_glbl_pram->rbdqptr, in dump_regs()
827 in_be32(&ugeth->p_rx_glbl_pram->rbdqptr)); in dump_regs()
828 pr_info("mflr : addr - 0x%08x, val - 0x%04x\n", in dump_regs()
829 (u32)&ugeth->p_rx_glbl_pram->mflr, in dump_regs()
830 in_be16(&ugeth->p_rx_glbl_pram->mflr)); in dump_regs()
831 pr_info("minflr : addr - 0x%08x, val - 0x%04x\n", in dump_regs()
832 (u32)&ugeth->p_rx_glbl_pram->minflr, in dump_regs()
833 in_be16(&ugeth->p_rx_glbl_pram->minflr)); in dump_regs()
834 pr_info("maxd1 : addr - 0x%08x, val - 0x%04x\n", in dump_regs()
835 (u32)&ugeth->p_rx_glbl_pram->maxd1, in dump_regs()
836 in_be16(&ugeth->p_rx_glbl_pram->maxd1)); in dump_regs()
837 pr_info("maxd2 : addr - 0x%08x, val - 0x%04x\n", in dump_regs()
838 (u32)&ugeth->p_rx_glbl_pram->maxd2, in dump_regs()
839 in_be16(&ugeth->p_rx_glbl_pram->maxd2)); in dump_regs()
840 pr_info("ecamptr : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
841 (u32)&ugeth->p_rx_glbl_pram->ecamptr, in dump_regs()
842 in_be32(&ugeth->p_rx_glbl_pram->ecamptr)); in dump_regs()
843 pr_info("l2qt : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
844 (u32)&ugeth->p_rx_glbl_pram->l2qt, in dump_regs()
845 in_be32(&ugeth->p_rx_glbl_pram->l2qt)); in dump_regs()
846 pr_info("l3qt[0] : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
847 (u32)&ugeth->p_rx_glbl_pram->l3qt[0], in dump_regs()
848 in_be32(&ugeth->p_rx_glbl_pram->l3qt[0])); in dump_regs()
849 pr_info("l3qt[1] : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
850 (u32)&ugeth->p_rx_glbl_pram->l3qt[1], in dump_regs()
851 in_be32(&ugeth->p_rx_glbl_pram->l3qt[1])); in dump_regs()
852 pr_info("l3qt[2] : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
853 (u32)&ugeth->p_rx_glbl_pram->l3qt[2], in dump_regs()
854 in_be32(&ugeth->p_rx_glbl_pram->l3qt[2])); in dump_regs()
855 pr_info("l3qt[3] : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
856 (u32)&ugeth->p_rx_glbl_pram->l3qt[3], in dump_regs()
857 in_be32(&ugeth->p_rx_glbl_pram->l3qt[3])); in dump_regs()
858 pr_info("l3qt[4] : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
859 (u32)&ugeth->p_rx_glbl_pram->l3qt[4], in dump_regs()
860 in_be32(&ugeth->p_rx_glbl_pram->l3qt[4])); in dump_regs()
861 pr_info("l3qt[5] : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
862 (u32)&ugeth->p_rx_glbl_pram->l3qt[5], in dump_regs()
863 in_be32(&ugeth->p_rx_glbl_pram->l3qt[5])); in dump_regs()
864 pr_info("l3qt[6] : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
865 (u32)&ugeth->p_rx_glbl_pram->l3qt[6], in dump_regs()
866 in_be32(&ugeth->p_rx_glbl_pram->l3qt[6])); in dump_regs()
867 pr_info("l3qt[7] : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
868 (u32)&ugeth->p_rx_glbl_pram->l3qt[7], in dump_regs()
869 in_be32(&ugeth->p_rx_glbl_pram->l3qt[7])); in dump_regs()
870 pr_info("vlantype : addr - 0x%08x, val - 0x%04x\n", in dump_regs()
871 (u32)&ugeth->p_rx_glbl_pram->vlantype, in dump_regs()
872 in_be16(&ugeth->p_rx_glbl_pram->vlantype)); in dump_regs()
873 pr_info("vlantci : addr - 0x%08x, val - 0x%04x\n", in dump_regs()
874 (u32)&ugeth->p_rx_glbl_pram->vlantci, in dump_regs()
875 in_be16(&ugeth->p_rx_glbl_pram->vlantci)); in dump_regs()
877 pr_info("addressfiltering[%d]: addr - 0x%08x, val - 0x%02x\n", in dump_regs()
879 (u32)&ugeth->p_rx_glbl_pram->addressfiltering[i], in dump_regs()
880 ugeth->p_rx_glbl_pram->addressfiltering[i]); in dump_regs()
881 pr_info("exfGlobalParam : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
882 (u32)&ugeth->p_rx_glbl_pram->exfGlobalParam, in dump_regs()
883 in_be32(&ugeth->p_rx_glbl_pram->exfGlobalParam)); in dump_regs()
885 if (ugeth->p_send_q_mem_reg) { in dump_regs()
887 pr_info("Base address: 0x%08x\n", (u32)ugeth->p_send_q_mem_reg); in dump_regs()
888 for (i = 0; i < ucc_geth_tx_queues(ugeth->ug_info); i++) { in dump_regs()
890 pr_info("Base address: 0x%08x\n", in dump_regs()
891 (u32)&ugeth->p_send_q_mem_reg->sqqd[i]); in dump_regs()
892 mem_disp((u8 *) & ugeth->p_send_q_mem_reg->sqqd[i], in dump_regs()
896 if (ugeth->p_scheduler) { in dump_regs()
898 pr_info("Base address: 0x%08x\n", (u32)ugeth->p_scheduler); in dump_regs()
899 mem_disp((u8 *) ugeth->p_scheduler, in dump_regs()
900 sizeof(*ugeth->p_scheduler)); in dump_regs()
902 if (ugeth->p_tx_fw_statistics_pram) { in dump_regs()
904 pr_info("Base address: 0x%08x\n", in dump_regs()
905 (u32)ugeth->p_tx_fw_statistics_pram); in dump_regs()
906 mem_disp((u8 *) ugeth->p_tx_fw_statistics_pram, in dump_regs()
907 sizeof(*ugeth->p_tx_fw_statistics_pram)); in dump_regs()
909 if (ugeth->p_rx_fw_statistics_pram) { in dump_regs()
911 pr_info("Base address: 0x%08x\n", in dump_regs()
912 (u32)ugeth->p_rx_fw_statistics_pram); in dump_regs()
913 mem_disp((u8 *) ugeth->p_rx_fw_statistics_pram, in dump_regs()
914 sizeof(*ugeth->p_rx_fw_statistics_pram)); in dump_regs()
916 if (ugeth->p_rx_irq_coalescing_tbl) { in dump_regs()
918 pr_info("Base address: 0x%08x\n", in dump_regs()
919 (u32)ugeth->p_rx_irq_coalescing_tbl); in dump_regs()
920 for (i = 0; i < ucc_geth_rx_queues(ugeth->ug_info); i++) { in dump_regs()
922 pr_info("Base address: 0x%08x\n", in dump_regs()
923 (u32)&ugeth->p_rx_irq_coalescing_tbl-> in dump_regs()
925 pr_info("interruptcoalescingmaxvalue: addr - 0x%08x, val - 0x%08x\n", in dump_regs()
926 (u32)&ugeth->p_rx_irq_coalescing_tbl-> in dump_regs()
928 in_be32(&ugeth->p_rx_irq_coalescing_tbl-> in dump_regs()
931 pr_info("interruptcoalescingcounter : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
932 (u32)&ugeth->p_rx_irq_coalescing_tbl-> in dump_regs()
934 in_be32(&ugeth->p_rx_irq_coalescing_tbl-> in dump_regs()
939 if (ugeth->p_rx_bd_qs_tbl) { in dump_regs()
940 pr_info("RX BD QS tables:\n"); in dump_regs()
941 pr_info("Base address: 0x%08x\n", (u32)ugeth->p_rx_bd_qs_tbl); in dump_regs()
942 for (i = 0; i < ucc_geth_rx_queues(ugeth->ug_info); i++) { in dump_regs()
943 pr_info("RX BD QS table[%d]:\n", i); in dump_regs()
944 pr_info("Base address: 0x%08x\n", in dump_regs()
945 (u32)&ugeth->p_rx_bd_qs_tbl[i]); in dump_regs()
946 pr_info("bdbaseptr : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
947 (u32)&ugeth->p_rx_bd_qs_tbl[i].bdbaseptr, in dump_regs()
948 in_be32(&ugeth->p_rx_bd_qs_tbl[i].bdbaseptr)); in dump_regs()
949 pr_info("bdptr : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
950 (u32)&ugeth->p_rx_bd_qs_tbl[i].bdptr, in dump_regs()
951 in_be32(&ugeth->p_rx_bd_qs_tbl[i].bdptr)); in dump_regs()
952 pr_info("externalbdbaseptr: addr - 0x%08x, val - 0x%08x\n", in dump_regs()
953 (u32)&ugeth->p_rx_bd_qs_tbl[i].externalbdbaseptr, in dump_regs()
954 in_be32(&ugeth->p_rx_bd_qs_tbl[i]. in dump_regs()
956 pr_info("externalbdptr : addr - 0x%08x, val - 0x%08x\n", in dump_regs()
957 (u32)&ugeth->p_rx_bd_qs_tbl[i].externalbdptr, in dump_regs()
958 in_be32(&ugeth->p_rx_bd_qs_tbl[i].externalbdptr)); in dump_regs()
960 pr_info("Base address: 0x%08x\n", in dump_regs()
962 (&ugeth->p_rx_bd_qs_tbl[i]. in dump_regs()
966 (&ugeth->p_rx_bd_qs_tbl[i]. in dump_regs()
971 if (ugeth->p_init_enet_param_shadow) { in dump_regs()
974 pr_info("Base address: 0x%08x\n", in dump_regs()
975 (u32) ugeth->p_init_enet_param_shadow); in dump_regs()
976 mem_disp((u8 *) ugeth->p_init_enet_param_shadow, in dump_regs()
977 sizeof(*ugeth->p_init_enet_param_shadow)); in dump_regs()
980 if (ugeth->ug_info->rxExtendedFiltering) { in dump_regs()
983 if (ugeth->ug_info->largestexternallookupkeysize == in dump_regs()
987 if (ugeth->ug_info->largestexternallookupkeysize == in dump_regs()
994 &(ugeth->p_init_enet_param_shadow-> in dump_regs()
998 ugeth->ug_info->riscTx, 0); in dump_regs()
1000 &(ugeth->p_init_enet_param_shadow-> in dump_regs()
1003 ugeth->ug_info->riscRx, 1); in dump_regs()
1031 return -EINVAL; in init_half_duplex_params()
1060 /* Non-Back-to-back IPG part 1 should be <= Non-Back-to-back in init_inter_frame_gap_params()
1063 return -EINVAL; in init_inter_frame_gap_params()
1069 return -EINVAL; in init_inter_frame_gap_params()
1177 /* Example: for a station address of 0x12345678ABCD, */ in init_mac_station_addr_regs()
1183 /* station address byte 5 station address byte 4 */ in init_mac_station_addr_regs()
1185 /* station address byte 3 station address byte 2 */ in init_mac_station_addr_regs()
1196 /* station address byte 1 station address byte 0 */ in init_mac_station_addr_regs()
1228 return -EINVAL; in init_preamble_length()
1270 return -EINVAL; in init_max_rx_buff_len()
1283 if (min_frame_length >= (mrblr_value - 4)) in init_min_frame_len()
1284 return -EINVAL; in init_min_frame_len()
1301 ug_info = ugeth->ug_info; in adjust_enet_interface()
1302 ug_regs = ugeth->ug_regs; in adjust_enet_interface()
1303 uf_regs = ugeth->uccf->uf_regs; in adjust_enet_interface()
1306 maccfg2 = in_be32(&ug_regs->maccfg2); in adjust_enet_interface()
1308 if ((ugeth->max_speed == SPEED_10) || in adjust_enet_interface()
1309 (ugeth->max_speed == SPEED_100)) in adjust_enet_interface()
1311 else if (ugeth->max_speed == SPEED_1000) in adjust_enet_interface()
1313 maccfg2 |= ug_info->padAndCrc; in adjust_enet_interface()
1314 out_be32(&ug_regs->maccfg2, maccfg2); in adjust_enet_interface()
1317 upsmr = in_be32(&uf_regs->upsmr); in adjust_enet_interface()
1320 if ((ugeth->phy_interface == PHY_INTERFACE_MODE_RMII) || in adjust_enet_interface()
1321 (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII) || in adjust_enet_interface()
1322 (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) || in adjust_enet_interface()
1323 (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID) || in adjust_enet_interface()
1324 (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) || in adjust_enet_interface()
1325 (ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) { in adjust_enet_interface()
1326 if (ugeth->phy_interface != PHY_INTERFACE_MODE_RMII) in adjust_enet_interface()
1328 switch (ugeth->max_speed) { in adjust_enet_interface()
1333 if (ugeth->phy_interface != PHY_INTERFACE_MODE_RTBI) in adjust_enet_interface()
1337 if ((ugeth->phy_interface == PHY_INTERFACE_MODE_TBI) || in adjust_enet_interface()
1338 (ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) { in adjust_enet_interface()
1341 if (ugeth->phy_interface == PHY_INTERFACE_MODE_SGMII) in adjust_enet_interface()
1344 out_be32(&uf_regs->upsmr, upsmr); in adjust_enet_interface()
1349 if ((ugeth->phy_interface == PHY_INTERFACE_MODE_TBI) || in adjust_enet_interface()
1350 (ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) { in adjust_enet_interface()
1351 struct ucc_geth_info *ug_info = ugeth->ug_info; in adjust_enet_interface()
1354 if (!ug_info->tbi_node) in adjust_enet_interface()
1355 pr_warn("TBI mode requires that the device tree specify a tbi-handle\n"); in adjust_enet_interface()
1357 tbiphy = of_phy_find_device(ug_info->tbi_node); in adjust_enet_interface()
1365 put_device(&tbiphy->mdio.dev); in adjust_enet_interface()
1368 init_check_frame_length_mode(ug_info->lengthCheckRx, &ug_regs->maccfg2); in adjust_enet_interface()
1370 ret_val = init_preamble_length(ug_info->prel, &ug_regs->maccfg2); in adjust_enet_interface()
1387 uccf = ugeth->uccf; in ugeth_graceful_stop_tx()
1390 clrbits32(uccf->p_uccm, UCC_GETH_UCCE_GRA); in ugeth_graceful_stop_tx()
1391 out_be32(uccf->p_ucce, UCC_GETH_UCCE_GRA); /* clear by writing 1 */ in ugeth_graceful_stop_tx()
1395 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); in ugeth_graceful_stop_tx()
1402 temp = in_be32(uccf->p_ucce); in ugeth_graceful_stop_tx()
1403 } while (!(temp & UCC_GETH_UCCE_GRA) && --i); in ugeth_graceful_stop_tx()
1405 uccf->stopped_tx = 1; in ugeth_graceful_stop_tx()
1417 uccf = ugeth->uccf; in ugeth_graceful_stop_rx()
1420 temp = in_8(&ugeth->p_rx_glbl_pram->rxgstpack); in ugeth_graceful_stop_rx()
1422 out_8(&ugeth->p_rx_glbl_pram->rxgstpack, temp); in ugeth_graceful_stop_rx()
1429 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info. in ugeth_graceful_stop_rx()
1434 temp = in_8(&ugeth->p_rx_glbl_pram->rxgstpack); in ugeth_graceful_stop_rx()
1435 } while (!(temp & GRACEFUL_STOP_ACKNOWLEDGE_RX) && --i); in ugeth_graceful_stop_rx()
1437 uccf->stopped_rx = 1; in ugeth_graceful_stop_rx()
1447 uccf = ugeth->uccf; in ugeth_restart_tx()
1450 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); in ugeth_restart_tx()
1452 uccf->stopped_tx = 0; in ugeth_restart_tx()
1462 uccf = ugeth->uccf; in ugeth_restart_rx()
1465 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); in ugeth_restart_rx()
1468 uccf->stopped_rx = 0; in ugeth_restart_rx()
1478 uccf = ugeth->uccf; in ugeth_enable()
1481 if (ugeth->ug_info->uf_info.ucc_num >= UCC_MAX_NUM) { in ugeth_enable()
1484 return -EINVAL; in ugeth_enable()
1487 enabled_tx = uccf->enabled_tx; in ugeth_enable()
1488 enabled_rx = uccf->enabled_rx; in ugeth_enable()
1492 if ((mode & COMM_DIR_TX) && (!enabled_tx) && uccf->stopped_tx) in ugeth_enable()
1494 if ((mode & COMM_DIR_RX) && (!enabled_rx) && uccf->stopped_rx) in ugeth_enable()
1507 uccf = ugeth->uccf; in ugeth_disable()
1510 if (ugeth->ug_info->uf_info.ucc_num >= UCC_MAX_NUM) { in ugeth_disable()
1513 return -EINVAL; in ugeth_disable()
1517 if ((mode & COMM_DIR_TX) && uccf->enabled_tx && !uccf->stopped_tx) in ugeth_disable()
1521 if ((mode & COMM_DIR_RX) && uccf->enabled_rx && !uccf->stopped_rx) in ugeth_disable()
1524 ucc_fast_disable(ugeth->uccf, mode); /* OK to do even if not enabled */ in ugeth_disable()
1532 netif_tx_stop_all_queues(ugeth->ndev); in ugeth_quiesce()
1535 disable_irq(ugeth->ug_info->uf_info.irq); in ugeth_quiesce()
1538 napi_disable(&ugeth->napi); in ugeth_quiesce()
1543 napi_enable(&ugeth->napi); in ugeth_activate()
1544 enable_irq(ugeth->ug_info->uf_info.irq); in ugeth_activate()
1547 netif_tx_wake_all_queues(ugeth->ndev); in ugeth_activate()
1548 __netdev_watchdog_up(ugeth->ndev); in ugeth_activate()
1563 struct phy_device *phydev = ugeth->phydev; in adjust_link()
1566 ug_regs = ugeth->ug_regs; in adjust_link()
1567 uf_regs = ugeth->uccf->uf_regs; in adjust_link()
1569 if (phydev->link) { in adjust_link()
1570 u32 tempval = in_be32(&ug_regs->maccfg2); in adjust_link()
1571 u32 upsmr = in_be32(&uf_regs->upsmr); in adjust_link()
1573 * If not, we operate in half-duplex mode. */ in adjust_link()
1574 if (phydev->duplex != ugeth->oldduplex) { in adjust_link()
1576 if (!(phydev->duplex)) in adjust_link()
1580 ugeth->oldduplex = phydev->duplex; in adjust_link()
1583 if (phydev->speed != ugeth->oldspeed) { in adjust_link()
1585 switch (phydev->speed) { in adjust_link()
1596 /* if reduced mode, re-set UPSMR.R10M */ in adjust_link()
1597 if ((ugeth->phy_interface == PHY_INTERFACE_MODE_RMII) || in adjust_link()
1598 (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII) || in adjust_link()
1599 (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) || in adjust_link()
1600 (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID) || in adjust_link()
1601 (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) || in adjust_link()
1602 (ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) { in adjust_link()
1603 if (phydev->speed == SPEED_10) in adjust_link()
1613 dev->name, phydev->speed); in adjust_link()
1616 ugeth->oldspeed = phydev->speed; in adjust_link()
1619 if (!ugeth->oldlink) { in adjust_link()
1621 ugeth->oldlink = 1; in adjust_link()
1628 * ugeth->lock, which is a bad idea since 'graceful in adjust_link()
1635 out_be32(&ug_regs->maccfg2, tempval); in adjust_link()
1636 out_be32(&uf_regs->upsmr, upsmr); in adjust_link()
1641 } else if (ugeth->oldlink) { in adjust_link()
1643 ugeth->oldlink = 0; in adjust_link()
1644 ugeth->oldspeed = 0; in adjust_link()
1645 ugeth->oldduplex = -1; in adjust_link()
1655 * "normal" PHY at the address found in the UTBIPA register. We assume
1663 struct ucc_geth_info *ug_info = ugeth->ug_info; in uec_configure_serdes()
1666 if (!ug_info->tbi_node) { in uec_configure_serdes()
1667 dev_warn(&dev->dev, "SGMII mode requires that the device " in uec_configure_serdes()
1668 "tree specify a tbi-handle\n"); in uec_configure_serdes()
1672 tbiphy = of_phy_find_device(ug_info->tbi_node); in uec_configure_serdes()
1674 dev_err(&dev->dev, "error: Could not get TBI device\n"); in uec_configure_serdes()
1680 * configure and reset the TBI<->SerDes link. Maybe U-Boot configured in uec_configure_serdes()
1685 put_device(&tbiphy->mdio.dev); in uec_configure_serdes()
1696 put_device(&tbiphy->mdio.dev); in uec_configure_serdes()
1700 * returns 0 if success. -1 if failure
1705 struct ucc_geth_info *ug_info = priv->ug_info; in init_phy()
1708 priv->oldlink = 0; in init_phy()
1709 priv->oldspeed = 0; in init_phy()
1710 priv->oldduplex = -1; in init_phy()
1712 phydev = of_phy_connect(dev, ug_info->phy_node, &adjust_link, 0, in init_phy()
1713 priv->phy_interface); in init_phy()
1715 dev_err(&dev->dev, "Could not attach to PHY\n"); in init_phy()
1716 return -ENODEV; in init_phy()
1719 if (priv->phy_interface == PHY_INTERFACE_MODE_SGMII) in init_phy()
1722 phy_set_max_speed(phydev, priv->max_speed); in init_phy()
1724 priv->phydev = phydev; in init_phy()
1732 ucc_fast_dump_regs(ugeth->uccf); in ugeth_dump_regs()
1752 uccf = ugeth->uccf; in ugeth_82xx_filtering_clear_all_addr_in_hash()
1756 ugeth->p_rx_glbl_pram->addressfiltering; in ugeth_82xx_filtering_clear_all_addr_in_hash()
1759 addr_h = &(p_82xx_addr_filt->gaddr_h); in ugeth_82xx_filtering_clear_all_addr_in_hash()
1760 addr_l = &(p_82xx_addr_filt->gaddr_l); in ugeth_82xx_filtering_clear_all_addr_in_hash()
1761 p_lh = &ugeth->group_hash_q; in ugeth_82xx_filtering_clear_all_addr_in_hash()
1762 p_counter = &(ugeth->numGroupAddrInHash); in ugeth_82xx_filtering_clear_all_addr_in_hash()
1764 addr_h = &(p_82xx_addr_filt->iaddr_h); in ugeth_82xx_filtering_clear_all_addr_in_hash()
1765 addr_l = &(p_82xx_addr_filt->iaddr_l); in ugeth_82xx_filtering_clear_all_addr_in_hash()
1766 p_lh = &ugeth->ind_hash_q; in ugeth_82xx_filtering_clear_all_addr_in_hash()
1767 p_counter = &(ugeth->numIndAddrInHash); in ugeth_82xx_filtering_clear_all_addr_in_hash()
1769 return -EINVAL; in ugeth_82xx_filtering_clear_all_addr_in_hash()
1772 if (uccf->enabled_tx) in ugeth_82xx_filtering_clear_all_addr_in_hash()
1774 if (uccf->enabled_rx) in ugeth_82xx_filtering_clear_all_addr_in_hash()
1803 ugeth->indAddrRegUsed[paddr_num] = 0; /* mark this paddr as not used */ in ugeth_82xx_filtering_clear_addr_in_paddr()
1812 u8 __iomem *bd; in ucc_geth_free_rx() local
1815 ug_info = ugeth->ug_info; in ucc_geth_free_rx()
1816 uf_info = &ug_info->uf_info; in ucc_geth_free_rx()
1818 for (i = 0; i < ucc_geth_rx_queues(ugeth->ug_info); i++) { in ucc_geth_free_rx()
1819 if (ugeth->p_rx_bd_ring[i]) { in ucc_geth_free_rx()
1821 bd = ugeth->p_rx_bd_ring[i]; in ucc_geth_free_rx()
1822 for (j = 0; j < ugeth->ug_info->bdRingLenRx[i]; j++) { in ucc_geth_free_rx()
1823 if (ugeth->rx_skbuff[i][j]) { in ucc_geth_free_rx()
1824 dma_unmap_single(ugeth->dev, in ucc_geth_free_rx()
1825 in_be32(&((struct qe_bd __iomem *)bd)->buf), in ucc_geth_free_rx()
1826 ugeth->ug_info-> in ucc_geth_free_rx()
1831 ugeth->rx_skbuff[i][j]); in ucc_geth_free_rx()
1832 ugeth->rx_skbuff[i][j] = NULL; in ucc_geth_free_rx()
1834 bd += sizeof(struct qe_bd); in ucc_geth_free_rx()
1837 kfree(ugeth->rx_skbuff[i]); in ucc_geth_free_rx()
1839 kfree(ugeth->p_rx_bd_ring[i]); in ucc_geth_free_rx()
1840 ugeth->p_rx_bd_ring[i] = NULL; in ucc_geth_free_rx()
1851 u8 __iomem *bd; in ucc_geth_free_tx() local
1853 netdev_reset_queue(ugeth->ndev); in ucc_geth_free_tx()
1855 ug_info = ugeth->ug_info; in ucc_geth_free_tx()
1856 uf_info = &ug_info->uf_info; in ucc_geth_free_tx()
1858 for (i = 0; i < ucc_geth_tx_queues(ugeth->ug_info); i++) { in ucc_geth_free_tx()
1859 bd = ugeth->p_tx_bd_ring[i]; in ucc_geth_free_tx()
1860 if (!bd) in ucc_geth_free_tx()
1862 for (j = 0; j < ugeth->ug_info->bdRingLenTx[i]; j++) { in ucc_geth_free_tx()
1863 if (ugeth->tx_skbuff[i][j]) { in ucc_geth_free_tx()
1864 dma_unmap_single(ugeth->dev, in ucc_geth_free_tx()
1865 in_be32(&((struct qe_bd __iomem *)bd)->buf), in ucc_geth_free_tx()
1866 (in_be32((u32 __iomem *)bd) & in ucc_geth_free_tx()
1869 dev_kfree_skb_any(ugeth->tx_skbuff[i][j]); in ucc_geth_free_tx()
1870 ugeth->tx_skbuff[i][j] = NULL; in ucc_geth_free_tx()
1874 kfree(ugeth->tx_skbuff[i]); in ucc_geth_free_tx()
1876 kfree(ugeth->p_tx_bd_ring[i]); in ucc_geth_free_tx()
1877 ugeth->p_tx_bd_ring[i] = NULL; in ucc_geth_free_tx()
1887 if (ugeth->uccf) { in ucc_geth_memclean()
1888 ucc_fast_free(ugeth->uccf); in ucc_geth_memclean()
1889 ugeth->uccf = NULL; in ucc_geth_memclean()
1892 qe_muram_free_addr(ugeth->p_thread_data_tx); in ucc_geth_memclean()
1893 ugeth->p_thread_data_tx = NULL; in ucc_geth_memclean()
1895 qe_muram_free_addr(ugeth->p_thread_data_rx); in ucc_geth_memclean()
1896 ugeth->p_thread_data_rx = NULL; in ucc_geth_memclean()
1898 qe_muram_free_addr(ugeth->p_exf_glbl_param); in ucc_geth_memclean()
1899 ugeth->p_exf_glbl_param = NULL; in ucc_geth_memclean()
1901 qe_muram_free_addr(ugeth->p_rx_glbl_pram); in ucc_geth_memclean()
1902 ugeth->p_rx_glbl_pram = NULL; in ucc_geth_memclean()
1904 qe_muram_free_addr(ugeth->p_tx_glbl_pram); in ucc_geth_memclean()
1905 ugeth->p_tx_glbl_pram = NULL; in ucc_geth_memclean()
1907 qe_muram_free_addr(ugeth->p_send_q_mem_reg); in ucc_geth_memclean()
1908 ugeth->p_send_q_mem_reg = NULL; in ucc_geth_memclean()
1910 qe_muram_free_addr(ugeth->p_scheduler); in ucc_geth_memclean()
1911 ugeth->p_scheduler = NULL; in ucc_geth_memclean()
1913 qe_muram_free_addr(ugeth->p_tx_fw_statistics_pram); in ucc_geth_memclean()
1914 ugeth->p_tx_fw_statistics_pram = NULL; in ucc_geth_memclean()
1916 qe_muram_free_addr(ugeth->p_rx_fw_statistics_pram); in ucc_geth_memclean()
1917 ugeth->p_rx_fw_statistics_pram = NULL; in ucc_geth_memclean()
1919 qe_muram_free_addr(ugeth->p_rx_irq_coalescing_tbl); in ucc_geth_memclean()
1920 ugeth->p_rx_irq_coalescing_tbl = NULL; in ucc_geth_memclean()
1922 qe_muram_free_addr(ugeth->p_rx_bd_qs_tbl); in ucc_geth_memclean()
1923 ugeth->p_rx_bd_qs_tbl = NULL; in ucc_geth_memclean()
1925 if (ugeth->p_init_enet_param_shadow) { in ucc_geth_memclean()
1927 &(ugeth->p_init_enet_param_shadow-> in ucc_geth_memclean()
1930 ugeth->ug_info->riscRx, 1); in ucc_geth_memclean()
1932 &(ugeth->p_init_enet_param_shadow-> in ucc_geth_memclean()
1935 ugeth->ug_info->riscTx, 0); in ucc_geth_memclean()
1936 kfree(ugeth->p_init_enet_param_shadow); in ucc_geth_memclean()
1937 ugeth->p_init_enet_param_shadow = NULL; in ucc_geth_memclean()
1941 while (!list_empty(&ugeth->group_hash_q)) in ucc_geth_memclean()
1943 (dequeue(&ugeth->group_hash_q))); in ucc_geth_memclean()
1944 while (!list_empty(&ugeth->ind_hash_q)) in ucc_geth_memclean()
1946 (dequeue(&ugeth->ind_hash_q))); in ucc_geth_memclean()
1947 if (ugeth->ug_regs) { in ucc_geth_memclean()
1948 iounmap(ugeth->ug_regs); in ucc_geth_memclean()
1949 ugeth->ug_regs = NULL; in ucc_geth_memclean()
1962 uf_regs = ugeth->uccf->uf_regs; in ucc_geth_set_multi()
1964 if (dev->flags & IFF_PROMISC) { in ucc_geth_set_multi()
1965 setbits32(&uf_regs->upsmr, UCC_GETH_UPSMR_PRO); in ucc_geth_set_multi()
1967 clrbits32(&uf_regs->upsmr, UCC_GETH_UPSMR_PRO); in ucc_geth_set_multi()
1970 (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth-> in ucc_geth_set_multi()
1971 p_rx_glbl_pram->addressfiltering; in ucc_geth_set_multi()
1973 if (dev->flags & IFF_ALLMULTI) { in ucc_geth_set_multi()
1977 out_be32(&p_82xx_addr_filt->gaddr_h, 0xffffffff); in ucc_geth_set_multi()
1978 out_be32(&p_82xx_addr_filt->gaddr_l, 0xffffffff); in ucc_geth_set_multi()
1982 out_be32(&p_82xx_addr_filt->gaddr_h, 0x0); in ucc_geth_set_multi()
1983 out_be32(&p_82xx_addr_filt->gaddr_l, 0x0); in ucc_geth_set_multi()
1989 hw_add_addr_in_hash(ugeth, ha->addr); in ucc_geth_set_multi()
1997 struct ucc_geth __iomem *ug_regs = ugeth->ug_regs; in ucc_geth_stop()
1998 struct phy_device *phydev = ugeth->phydev; in ucc_geth_stop()
2013 out_be32(ugeth->uccf->p_uccm, 0x00000000); in ucc_geth_stop()
2016 out_be32(ugeth->uccf->p_ucce, 0xffffffff); in ucc_geth_stop()
2019 clrbits32(&ug_regs->maccfg1, MACCFG1_ENABLE_RX | MACCFG1_ENABLE_TX); in ucc_geth_stop()
2030 ug_info = ugeth->ug_info; in ucc_struct_init()
2031 uf_info = &ug_info->uf_info; in ucc_struct_init()
2033 /* Rx BD lengths */ in ucc_struct_init()
2035 if ((ug_info->bdRingLenRx[i] < UCC_GETH_RX_BD_RING_SIZE_MIN) || in ucc_struct_init()
2036 (ug_info->bdRingLenRx[i] % in ucc_struct_init()
2039 pr_err("Rx BD ring length must be multiple of 4, no smaller than 8\n"); in ucc_struct_init()
2040 return -EINVAL; in ucc_struct_init()
2044 /* Tx BD lengths */ in ucc_struct_init()
2046 if (ug_info->bdRingLenTx[i] < UCC_GETH_TX_BD_RING_SIZE_MIN) { in ucc_struct_init()
2048 pr_err("Tx BD ring length must be no smaller than 2\n"); in ucc_struct_init()
2049 return -EINVAL; in ucc_struct_init()
2054 if ((uf_info->max_rx_buf_length == 0) || in ucc_struct_init()
2055 (uf_info->max_rx_buf_length % UCC_GETH_MRBLR_ALIGNMENT)) { in ucc_struct_init()
2057 pr_err("max_rx_buf_length must be non-zero multiple of 128\n"); in ucc_struct_init()
2058 return -EINVAL; in ucc_struct_init()
2065 return -EINVAL; in ucc_struct_init()
2072 return -EINVAL; in ucc_struct_init()
2077 if (ug_info->l2qt[i] >= ucc_geth_rx_queues(ug_info)) { in ucc_struct_init()
2080 return -EINVAL; in ucc_struct_init()
2086 if (ug_info->l3qt[i] >= ucc_geth_rx_queues(ug_info)) { in ucc_struct_init()
2089 return -EINVAL; in ucc_struct_init()
2093 if (ug_info->cam && !ug_info->ecamptr) { in ucc_struct_init()
2096 return -EINVAL; in ucc_struct_init()
2099 if ((ug_info->numStationAddresses != in ucc_struct_init()
2101 ug_info->rxExtendedFiltering) { in ucc_struct_init()
2104 return -EINVAL; in ucc_struct_init()
2108 uf_info->uccm_mask = ug_info->eventRegMask & UCCE_OTHER;/* Errors */ in ucc_struct_init()
2110 uf_info->uccm_mask |= (UCC_GETH_UCCE_RXF0 << i); in ucc_struct_init()
2113 uf_info->uccm_mask |= (UCC_GETH_UCCE_TXB0 << i); in ucc_struct_init()
2115 if (ucc_fast_init(uf_info, &ugeth->uccf)) { in ucc_struct_init()
2118 return -ENOMEM; in ucc_struct_init()
2125 ug_info->riscTx = QE_RISC_ALLOCATION_FOUR_RISCS; in ucc_struct_init()
2126 ug_info->riscRx = QE_RISC_ALLOCATION_FOUR_RISCS; in ucc_struct_init()
2129 ugeth->ug_regs = ioremap(uf_info->regs, sizeof(*ugeth->ug_regs)); in ucc_struct_init()
2130 if (!ugeth->ug_regs) { in ucc_struct_init()
2133 return -ENOMEM; in ucc_struct_init()
2145 u8 __iomem *bd; in ucc_geth_alloc_tx() local
2147 ug_info = ugeth->ug_info; in ucc_geth_alloc_tx()
2148 uf_info = &ug_info->uf_info; in ucc_geth_alloc_tx()
2156 length = ug_info->bdRingLenTx[j] * sizeof(struct qe_bd); in ucc_geth_alloc_tx()
2160 ugeth->p_tx_bd_ring[j] = kmalloc(alloc, GFP_KERNEL); in ucc_geth_alloc_tx()
2162 if (!ugeth->p_tx_bd_ring[j]) { in ucc_geth_alloc_tx()
2164 pr_err("Can not allocate memory for Tx bd rings\n"); in ucc_geth_alloc_tx()
2165 return -ENOMEM; in ucc_geth_alloc_tx()
2167 /* Zero unused end of bd ring, according to spec */ in ucc_geth_alloc_tx()
2168 memset(ugeth->p_tx_bd_ring[j] + length, 0, alloc - length); in ucc_geth_alloc_tx()
2174 ugeth->tx_skbuff[j] = in ucc_geth_alloc_tx()
2175 kcalloc(ugeth->ug_info->bdRingLenTx[j], in ucc_geth_alloc_tx()
2178 if (ugeth->tx_skbuff[j] == NULL) { in ucc_geth_alloc_tx()
2181 return -ENOMEM; in ucc_geth_alloc_tx()
2184 ugeth->skb_curtx[j] = ugeth->skb_dirtytx[j] = 0; in ucc_geth_alloc_tx()
2185 bd = ugeth->confBd[j] = ugeth->txBd[j] = ugeth->p_tx_bd_ring[j]; in ucc_geth_alloc_tx()
2186 for (i = 0; i < ug_info->bdRingLenTx[j]; i++) { in ucc_geth_alloc_tx()
2187 /* clear bd buffer */ in ucc_geth_alloc_tx()
2188 out_be32(&((struct qe_bd __iomem *)bd)->buf, 0); in ucc_geth_alloc_tx()
2189 /* set bd status and length */ in ucc_geth_alloc_tx()
2190 out_be32((u32 __iomem *)bd, 0); in ucc_geth_alloc_tx()
2191 bd += sizeof(struct qe_bd); in ucc_geth_alloc_tx()
2193 bd -= sizeof(struct qe_bd); in ucc_geth_alloc_tx()
2194 /* set bd status and length */ in ucc_geth_alloc_tx()
2195 out_be32((u32 __iomem *)bd, T_W); /* for last BD set Wrap bit */ in ucc_geth_alloc_tx()
2207 u8 __iomem *bd; in ucc_geth_alloc_rx() local
2209 ug_info = ugeth->ug_info; in ucc_geth_alloc_rx()
2210 uf_info = &ug_info->uf_info; in ucc_geth_alloc_rx()
2217 length = ug_info->bdRingLenRx[j] * sizeof(struct qe_bd); in ucc_geth_alloc_rx()
2221 ugeth->p_rx_bd_ring[j] = kmalloc(alloc, GFP_KERNEL); in ucc_geth_alloc_rx()
2222 if (!ugeth->p_rx_bd_ring[j]) { in ucc_geth_alloc_rx()
2224 pr_err("Can not allocate memory for Rx bd rings\n"); in ucc_geth_alloc_rx()
2225 return -ENOMEM; in ucc_geth_alloc_rx()
2232 ugeth->rx_skbuff[j] = in ucc_geth_alloc_rx()
2233 kcalloc(ugeth->ug_info->bdRingLenRx[j], in ucc_geth_alloc_rx()
2236 if (ugeth->rx_skbuff[j] == NULL) { in ucc_geth_alloc_rx()
2239 return -ENOMEM; in ucc_geth_alloc_rx()
2242 ugeth->skb_currx[j] = 0; in ucc_geth_alloc_rx()
2243 bd = ugeth->rxBd[j] = ugeth->p_rx_bd_ring[j]; in ucc_geth_alloc_rx()
2244 for (i = 0; i < ug_info->bdRingLenRx[j]; i++) { in ucc_geth_alloc_rx()
2245 /* set bd status and length */ in ucc_geth_alloc_rx()
2246 out_be32((u32 __iomem *)bd, R_I); in ucc_geth_alloc_rx()
2247 /* clear bd buffer */ in ucc_geth_alloc_rx()
2248 out_be32(&((struct qe_bd __iomem *)bd)->buf, 0); in ucc_geth_alloc_rx()
2249 bd += sizeof(struct qe_bd); in ucc_geth_alloc_rx()
2251 bd -= sizeof(struct qe_bd); in ucc_geth_alloc_rx()
2252 /* set bd status and length */ in ucc_geth_alloc_rx()
2253 out_be32((u32 __iomem *)bd, R_W); /* for last BD set Wrap bit */ in ucc_geth_alloc_rx()
2268 int ret_val = -EINVAL; in ucc_geth_startup()
2279 uccf = ugeth->uccf; in ucc_geth_startup()
2280 ug_info = ugeth->ug_info; in ucc_geth_startup()
2281 uf_info = &ug_info->uf_info; in ucc_geth_startup()
2282 uf_regs = uccf->uf_regs; in ucc_geth_startup()
2283 ug_regs = ugeth->ug_regs; in ucc_geth_startup()
2285 numThreadsRxNumerical = ucc_geth_thread_count(ug_info->numThreadsRx); in ucc_geth_startup()
2289 return -EINVAL; in ucc_geth_startup()
2292 numThreadsTxNumerical = ucc_geth_thread_count(ug_info->numThreadsTx); in ucc_geth_startup()
2296 return -EINVAL; in ucc_geth_startup()
2300 ugeth->rx_non_dynamic_extended_features = ug_info->ipCheckSumCheck || in ucc_geth_startup()
2301 ug_info->ipAddressAlignment || in ucc_geth_startup()
2302 (ug_info->numStationAddresses != in ucc_geth_startup()
2305 ugeth->rx_extended_features = ugeth->rx_non_dynamic_extended_features || in ucc_geth_startup()
2306 (ug_info->vlanOperationTagged != UCC_GETH_VLAN_OPERATION_TAGGED_NOP) || in ucc_geth_startup()
2307 (ug_info->vlanOperationNonTagged != in ucc_geth_startup()
2310 init_default_reg_vals(&uf_regs->upsmr, in ucc_geth_startup()
2311 &ug_regs->maccfg1, &ug_regs->maccfg2); in ucc_geth_startup()
2315 init_rx_parameters(ug_info->bro, in ucc_geth_startup()
2316 ug_info->rsh, ug_info->pro, &uf_regs->upsmr); in ucc_geth_startup()
2323 init_flow_control_params(ug_info->aufc, in ucc_geth_startup()
2324 ug_info->receiveFlowControl, in ucc_geth_startup()
2325 ug_info->transmitFlowControl, in ucc_geth_startup()
2326 ug_info->pausePeriod, in ucc_geth_startup()
2327 ug_info->extensionField, in ucc_geth_startup()
2328 &uf_regs->upsmr, in ucc_geth_startup()
2329 &ug_regs->uempr, &ug_regs->maccfg1); in ucc_geth_startup()
2331 setbits32(&ug_regs->maccfg1, MACCFG1_ENABLE_RX | MACCFG1_ENABLE_TX); in ucc_geth_startup()
2335 ret_val = init_inter_frame_gap_params(ug_info->nonBackToBackIfgPart1, in ucc_geth_startup()
2336 ug_info->nonBackToBackIfgPart2, in ucc_geth_startup()
2337 ug_info-> in ucc_geth_startup()
2339 ug_info->backToBackInterFrameGap, in ucc_geth_startup()
2340 &ug_regs->ipgifg); in ucc_geth_startup()
2349 ret_val = init_half_duplex_params(ug_info->altBeb, in ucc_geth_startup()
2350 ug_info->backPressureNoBackoff, in ucc_geth_startup()
2351 ug_info->noBackoff, in ucc_geth_startup()
2352 ug_info->excessDefer, in ucc_geth_startup()
2353 ug_info->altBebTruncation, in ucc_geth_startup()
2354 ug_info->maxRetransmission, in ucc_geth_startup()
2355 ug_info->collisionWindow, in ucc_geth_startup()
2356 &ug_regs->hafdup); in ucc_geth_startup()
2365 /* Read only - resets upon read */ in ucc_geth_startup()
2366 ifstat = in_be32(&ug_regs->ifstat); in ucc_geth_startup()
2370 out_be32(&ug_regs->uempr, 0); in ucc_geth_startup()
2374 init_hw_statistics_gathering_mode((ug_info->statisticsMode & in ucc_geth_startup()
2376 0, &uf_regs->upsmr, &ug_regs->uescr); in ucc_geth_startup()
2397 return -ENOMEM; in ucc_geth_startup()
2399 ugeth->p_tx_glbl_pram = qe_muram_addr(tx_glbl_pram_offset); in ucc_geth_startup()
2404 ugeth->thread_dat_tx_offset = in ucc_geth_startup()
2409 if (IS_ERR_VALUE(ugeth->thread_dat_tx_offset)) { in ucc_geth_startup()
2412 return -ENOMEM; in ucc_geth_startup()
2415 ugeth->p_thread_data_tx = in ucc_geth_startup()
2416 (struct ucc_geth_thread_data_tx __iomem *) qe_muram_addr(ugeth-> in ucc_geth_startup()
2418 out_be32(&ugeth->p_tx_glbl_pram->tqptr, ugeth->thread_dat_tx_offset); in ucc_geth_startup()
2422 out_be32(&ugeth->p_tx_glbl_pram->vtagtable[i], in ucc_geth_startup()
2423 ug_info->vtagtable[i]); in ucc_geth_startup()
2427 out_8(&ugeth->p_tx_glbl_pram->iphoffset[i], in ucc_geth_startup()
2428 ug_info->iphoffset[i]); in ucc_geth_startup()
2432 ugeth->send_q_mem_reg_offset = in ucc_geth_startup()
2436 if (IS_ERR_VALUE(ugeth->send_q_mem_reg_offset)) { in ucc_geth_startup()
2439 return -ENOMEM; in ucc_geth_startup()
2442 ugeth->p_send_q_mem_reg = in ucc_geth_startup()
2443 (struct ucc_geth_send_queue_mem_region __iomem *) qe_muram_addr(ugeth-> in ucc_geth_startup()
2445 out_be32(&ugeth->p_tx_glbl_pram->sqptr, ugeth->send_q_mem_reg_offset); in ucc_geth_startup()
2448 /* Assume BD rings are already established */ in ucc_geth_startup()
2451 ugeth->p_tx_bd_ring[i] + (ug_info->bdRingLenTx[i] - in ucc_geth_startup()
2453 out_be32(&ugeth->p_send_q_mem_reg->sqqd[i].bd_ring_base, in ucc_geth_startup()
2454 (u32) virt_to_phys(ugeth->p_tx_bd_ring[i])); in ucc_geth_startup()
2455 out_be32(&ugeth->p_send_q_mem_reg->sqqd[i]. in ucc_geth_startup()
2464 ugeth->scheduler_offset = in ucc_geth_startup()
2467 if (IS_ERR_VALUE(ugeth->scheduler_offset)) { in ucc_geth_startup()
2470 return -ENOMEM; in ucc_geth_startup()
2473 ugeth->p_scheduler = in ucc_geth_startup()
2474 (struct ucc_geth_scheduler __iomem *) qe_muram_addr(ugeth-> in ucc_geth_startup()
2476 out_be32(&ugeth->p_tx_glbl_pram->schedulerbasepointer, in ucc_geth_startup()
2477 ugeth->scheduler_offset); in ucc_geth_startup()
2480 out_be32(&ugeth->p_scheduler->mblinterval, in ucc_geth_startup()
2481 ug_info->mblinterval); in ucc_geth_startup()
2482 out_be16(&ugeth->p_scheduler->nortsrbytetime, in ucc_geth_startup()
2483 ug_info->nortsrbytetime); in ucc_geth_startup()
2484 out_8(&ugeth->p_scheduler->fracsiz, ug_info->fracsiz); in ucc_geth_startup()
2485 out_8(&ugeth->p_scheduler->strictpriorityq, in ucc_geth_startup()
2486 ug_info->strictpriorityq); in ucc_geth_startup()
2487 out_8(&ugeth->p_scheduler->txasap, ug_info->txasap); in ucc_geth_startup()
2488 out_8(&ugeth->p_scheduler->extrabw, ug_info->extrabw); in ucc_geth_startup()
2490 out_8(&ugeth->p_scheduler->weightfactor[i], in ucc_geth_startup()
2491 ug_info->weightfactor[i]); in ucc_geth_startup()
2494 ugeth->p_cpucount[0] = &(ugeth->p_scheduler->cpucount0); in ucc_geth_startup()
2495 ugeth->p_cpucount[1] = &(ugeth->p_scheduler->cpucount1); in ucc_geth_startup()
2496 ugeth->p_cpucount[2] = &(ugeth->p_scheduler->cpucount2); in ucc_geth_startup()
2497 ugeth->p_cpucount[3] = &(ugeth->p_scheduler->cpucount3); in ucc_geth_startup()
2498 ugeth->p_cpucount[4] = &(ugeth->p_scheduler->cpucount4); in ucc_geth_startup()
2499 ugeth->p_cpucount[5] = &(ugeth->p_scheduler->cpucount5); in ucc_geth_startup()
2500 ugeth->p_cpucount[6] = &(ugeth->p_scheduler->cpucount6); in ucc_geth_startup()
2501 ugeth->p_cpucount[7] = &(ugeth->p_scheduler->cpucount7); in ucc_geth_startup()
2506 if (ug_info-> in ucc_geth_startup()
2508 ugeth->tx_fw_statistics_pram_offset = in ucc_geth_startup()
2512 if (IS_ERR_VALUE(ugeth->tx_fw_statistics_pram_offset)) { in ucc_geth_startup()
2515 return -ENOMEM; in ucc_geth_startup()
2517 ugeth->p_tx_fw_statistics_pram = in ucc_geth_startup()
2519 qe_muram_addr(ugeth->tx_fw_statistics_pram_offset); in ucc_geth_startup()
2527 if (ug_info->ipCheckSumGenerate) in ucc_geth_startup()
2529 temoder |= ((ucc_geth_tx_queues(ug_info) - 1) << TEMODER_NUM_OF_QUEUES_SHIFT); in ucc_geth_startup()
2530 out_be16(&ugeth->p_tx_glbl_pram->temoder, temoder); in ucc_geth_startup()
2537 out_be32(&ugeth->p_tx_glbl_pram->tstate, ((u32) function_code) << 24); in ucc_geth_startup()
2547 return -ENOMEM; in ucc_geth_startup()
2549 ugeth->p_rx_glbl_pram = qe_muram_addr(rx_glbl_pram_offset); in ucc_geth_startup()
2554 ugeth->thread_dat_rx_offset = in ucc_geth_startup()
2558 if (IS_ERR_VALUE(ugeth->thread_dat_rx_offset)) { in ucc_geth_startup()
2561 return -ENOMEM; in ucc_geth_startup()
2564 ugeth->p_thread_data_rx = in ucc_geth_startup()
2565 (struct ucc_geth_thread_data_rx __iomem *) qe_muram_addr(ugeth-> in ucc_geth_startup()
2567 out_be32(&ugeth->p_rx_glbl_pram->rqptr, ugeth->thread_dat_rx_offset); in ucc_geth_startup()
2570 out_be16(&ugeth->p_rx_glbl_pram->typeorlen, ug_info->typeorlen); in ucc_geth_startup()
2573 if (ug_info-> in ucc_geth_startup()
2575 ugeth->rx_fw_statistics_pram_offset = in ucc_geth_startup()
2579 if (IS_ERR_VALUE(ugeth->rx_fw_statistics_pram_offset)) { in ucc_geth_startup()
2582 return -ENOMEM; in ucc_geth_startup()
2584 ugeth->p_rx_fw_statistics_pram = in ucc_geth_startup()
2586 qe_muram_addr(ugeth->rx_fw_statistics_pram_offset); in ucc_geth_startup()
2592 ugeth->rx_irq_coalescing_tbl_offset = in ucc_geth_startup()
2596 if (IS_ERR_VALUE(ugeth->rx_irq_coalescing_tbl_offset)) { in ucc_geth_startup()
2599 return -ENOMEM; in ucc_geth_startup()
2602 ugeth->p_rx_irq_coalescing_tbl = in ucc_geth_startup()
2604 qe_muram_addr(ugeth->rx_irq_coalescing_tbl_offset); in ucc_geth_startup()
2605 out_be32(&ugeth->p_rx_glbl_pram->intcoalescingptr, in ucc_geth_startup()
2606 ugeth->rx_irq_coalescing_tbl_offset); in ucc_geth_startup()
2610 out_be32(&ugeth->p_rx_irq_coalescing_tbl->coalescingentry[i]. in ucc_geth_startup()
2612 ug_info->interruptcoalescingmaxvalue[i]); in ucc_geth_startup()
2613 out_be32(&ugeth->p_rx_irq_coalescing_tbl->coalescingentry[i]. in ucc_geth_startup()
2615 ug_info->interruptcoalescingmaxvalue[i]); in ucc_geth_startup()
2619 init_max_rx_buff_len(uf_info->max_rx_buf_length, in ucc_geth_startup()
2620 &ugeth->p_rx_glbl_pram->mrblr); in ucc_geth_startup()
2622 out_be16(&ugeth->p_rx_glbl_pram->mflr, ug_info->maxFrameLength); in ucc_geth_startup()
2624 init_min_frame_len(ug_info->minFrameLength, in ucc_geth_startup()
2625 &ugeth->p_rx_glbl_pram->minflr, in ucc_geth_startup()
2626 &ugeth->p_rx_glbl_pram->mrblr); in ucc_geth_startup()
2628 out_be16(&ugeth->p_rx_glbl_pram->maxd1, ug_info->maxD1Length); in ucc_geth_startup()
2630 out_be16(&ugeth->p_rx_glbl_pram->maxd2, ug_info->maxD2Length); in ucc_geth_startup()
2635 l2qt |= (ug_info->l2qt[i] << (28 - 4 * i)); in ucc_geth_startup()
2636 out_be32(&ugeth->p_rx_glbl_pram->l2qt, l2qt); in ucc_geth_startup()
2642 l3qt |= (ug_info->l3qt[j + i] << (28 - 4 * i)); in ucc_geth_startup()
2643 out_be32(&ugeth->p_rx_glbl_pram->l3qt[j/8], l3qt); in ucc_geth_startup()
2647 out_be16(&ugeth->p_rx_glbl_pram->vlantype, ug_info->vlantype); in ucc_geth_startup()
2650 out_be16(&ugeth->p_rx_glbl_pram->vlantci, ug_info->vlantci); in ucc_geth_startup()
2653 out_be32(&ugeth->p_rx_glbl_pram->ecamptr, ug_info->ecamptr); in ucc_geth_startup()
2657 ugeth->rx_bd_qs_tbl_offset = in ucc_geth_startup()
2662 if (IS_ERR_VALUE(ugeth->rx_bd_qs_tbl_offset)) { in ucc_geth_startup()
2665 return -ENOMEM; in ucc_geth_startup()
2668 ugeth->p_rx_bd_qs_tbl = in ucc_geth_startup()
2669 (struct ucc_geth_rx_bd_queues_entry __iomem *) qe_muram_addr(ugeth-> in ucc_geth_startup()
2671 out_be32(&ugeth->p_rx_glbl_pram->rbdqptr, ugeth->rx_bd_qs_tbl_offset); in ucc_geth_startup()
2674 /* Assume BD rings are already established */ in ucc_geth_startup()
2676 out_be32(&ugeth->p_rx_bd_qs_tbl[i].externalbdbaseptr, in ucc_geth_startup()
2677 (u32) virt_to_phys(ugeth->p_rx_bd_ring[i])); in ucc_geth_startup()
2684 if (ugeth->rx_extended_features) in ucc_geth_startup()
2686 if (ug_info->rxExtendedFiltering) in ucc_geth_startup()
2688 if (ug_info->dynamicMaxFrameLength) in ucc_geth_startup()
2690 if (ug_info->dynamicMinFrameLength) in ucc_geth_startup()
2693 ug_info->vlanOperationTagged << REMODER_VLAN_OPERATION_TAGGED_SHIFT; in ucc_geth_startup()
2695 ug_info-> in ucc_geth_startup()
2697 remoder |= ug_info->rxQoSMode << REMODER_RX_QOS_MODE_SHIFT; in ucc_geth_startup()
2698 remoder |= ((ucc_geth_rx_queues(ug_info) - 1) << REMODER_NUM_OF_QUEUES_SHIFT); in ucc_geth_startup()
2699 if (ug_info->ipCheckSumCheck) in ucc_geth_startup()
2701 if (ug_info->ipAddressAlignment) in ucc_geth_startup()
2703 out_be32(&ugeth->p_rx_glbl_pram->remoder, remoder); in ucc_geth_startup()
2708 init_firmware_statistics_gathering_mode((ug_info-> in ucc_geth_startup()
2711 (ug_info->statisticsMode & in ucc_geth_startup()
2713 &ugeth->p_tx_glbl_pram->txrmonbaseptr, in ucc_geth_startup()
2714 ugeth->tx_fw_statistics_pram_offset, in ucc_geth_startup()
2715 &ugeth->p_rx_glbl_pram->rxrmonbaseptr, in ucc_geth_startup()
2716 ugeth->rx_fw_statistics_pram_offset, in ucc_geth_startup()
2717 &ugeth->p_tx_glbl_pram->temoder, in ucc_geth_startup()
2718 &ugeth->p_rx_glbl_pram->remoder); in ucc_geth_startup()
2721 out_8(&ugeth->p_rx_glbl_pram->rstate, function_code); in ucc_geth_startup()
2724 if (ug_info->rxExtendedFiltering) { in ucc_geth_startup()
2725 if (!ug_info->extendedFilteringChainPointer) { in ucc_geth_startup()
2728 return -EINVAL; in ucc_geth_startup()
2733 ugeth->exf_glbl_param_offset = in ucc_geth_startup()
2736 if (IS_ERR_VALUE(ugeth->exf_glbl_param_offset)) { in ucc_geth_startup()
2739 return -ENOMEM; in ucc_geth_startup()
2742 ugeth->p_exf_glbl_param = in ucc_geth_startup()
2743 (struct ucc_geth_exf_global_pram __iomem *) qe_muram_addr(ugeth-> in ucc_geth_startup()
2745 out_be32(&ugeth->p_rx_glbl_pram->exfGlobalParam, in ucc_geth_startup()
2746 ugeth->exf_glbl_param_offset); in ucc_geth_startup()
2747 out_be32(&ugeth->p_exf_glbl_param->l2pcdptr, in ucc_geth_startup()
2748 (u32) ug_info->extendedFilteringChainPointer); in ucc_geth_startup()
2750 } else { /* initialize 82xx style address filtering */ in ucc_geth_startup()
2752 /* Init individual address recognition registers to disabled */ in ucc_geth_startup()
2758 (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth-> in ucc_geth_startup()
2759 p_rx_glbl_pram->addressfiltering; in ucc_geth_startup()
2780 if (!(ugeth->p_init_enet_param_shadow = in ucc_geth_startup()
2784 return -ENOMEM; in ucc_geth_startup()
2789 ugeth->p_init_enet_param_shadow->resinit1 = in ucc_geth_startup()
2791 ugeth->p_init_enet_param_shadow->resinit2 = in ucc_geth_startup()
2793 ugeth->p_init_enet_param_shadow->resinit3 = in ucc_geth_startup()
2795 ugeth->p_init_enet_param_shadow->resinit4 = in ucc_geth_startup()
2797 ugeth->p_init_enet_param_shadow->resinit5 = in ucc_geth_startup()
2799 ugeth->p_init_enet_param_shadow->rgftgfrxglobal |= in ucc_geth_startup()
2800 ((u32) ug_info->numThreadsRx) << ENET_INIT_PARAM_RGF_SHIFT; in ucc_geth_startup()
2801 ugeth->p_init_enet_param_shadow->rgftgfrxglobal |= in ucc_geth_startup()
2802 ((u32) ug_info->numThreadsTx) << ENET_INIT_PARAM_TGF_SHIFT; in ucc_geth_startup()
2804 ugeth->p_init_enet_param_shadow->rgftgfrxglobal |= in ucc_geth_startup()
2805 rx_glbl_pram_offset | ug_info->riscRx; in ucc_geth_startup()
2806 if ((ug_info->largestexternallookupkeysize != in ucc_geth_startup()
2808 (ug_info->largestexternallookupkeysize != in ucc_geth_startup()
2810 (ug_info->largestexternallookupkeysize != in ucc_geth_startup()
2814 return -EINVAL; in ucc_geth_startup()
2816 ugeth->p_init_enet_param_shadow->largestexternallookupkeysize = in ucc_geth_startup()
2817 ug_info->largestexternallookupkeysize; in ucc_geth_startup()
2819 if (ug_info->rxExtendedFiltering) { in ucc_geth_startup()
2821 if (ug_info->largestexternallookupkeysize == in ucc_geth_startup()
2825 if (ug_info->largestexternallookupkeysize == in ucc_geth_startup()
2831 if ((ret_val = fill_init_enet_entries(ugeth, &(ugeth-> in ucc_geth_startup()
2832 p_init_enet_param_shadow->rxthread[0]), in ucc_geth_startup()
2836 ug_info->riscRx, 1)) != 0) { in ucc_geth_startup()
2842 ugeth->p_init_enet_param_shadow->txglobal = in ucc_geth_startup()
2843 tx_glbl_pram_offset | ug_info->riscTx; in ucc_geth_startup()
2846 &(ugeth->p_init_enet_param_shadow-> in ucc_geth_startup()
2850 ug_info->riscTx, 0)) != 0) { in ucc_geth_startup()
2870 return -ENOMEM; in ucc_geth_startup()
2876 out_8(&p_init_enet_pram->resinit1, in ucc_geth_startup()
2877 ugeth->p_init_enet_param_shadow->resinit1); in ucc_geth_startup()
2878 out_8(&p_init_enet_pram->resinit2, in ucc_geth_startup()
2879 ugeth->p_init_enet_param_shadow->resinit2); in ucc_geth_startup()
2880 out_8(&p_init_enet_pram->resinit3, in ucc_geth_startup()
2881 ugeth->p_init_enet_param_shadow->resinit3); in ucc_geth_startup()
2882 out_8(&p_init_enet_pram->resinit4, in ucc_geth_startup()
2883 ugeth->p_init_enet_param_shadow->resinit4); in ucc_geth_startup()
2884 out_be16(&p_init_enet_pram->resinit5, in ucc_geth_startup()
2885 ugeth->p_init_enet_param_shadow->resinit5); in ucc_geth_startup()
2886 out_8(&p_init_enet_pram->largestexternallookupkeysize, in ucc_geth_startup()
2887 ugeth->p_init_enet_param_shadow->largestexternallookupkeysize); in ucc_geth_startup()
2888 out_be32(&p_init_enet_pram->rgftgfrxglobal, in ucc_geth_startup()
2889 ugeth->p_init_enet_param_shadow->rgftgfrxglobal); in ucc_geth_startup()
2891 out_be32(&p_init_enet_pram->rxthread[i], in ucc_geth_startup()
2892 ugeth->p_init_enet_param_shadow->rxthread[i]); in ucc_geth_startup()
2893 out_be32(&p_init_enet_pram->txglobal, in ucc_geth_startup()
2894 ugeth->p_init_enet_param_shadow->txglobal); in ucc_geth_startup()
2896 out_be32(&p_init_enet_pram->txthread[i], in ucc_geth_startup()
2897 ugeth->p_init_enet_param_shadow->txthread[i]); in ucc_geth_startup()
2901 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); in ucc_geth_startup()
2912 /* It is pointed to by the dev->hard_start_xmit function pointer */
2920 u8 __iomem *bd; /* BD pointer */ in ucc_geth_start_xmit() local
2927 netdev_sent_queue(dev, skb->len); in ucc_geth_start_xmit()
2928 spin_lock_irqsave(&ugeth->lock, flags); in ucc_geth_start_xmit()
2930 dev->stats.tx_bytes += skb->len; in ucc_geth_start_xmit()
2932 /* Start from the next BD that should be filled */ in ucc_geth_start_xmit()
2933 bd = ugeth->txBd[txQ]; in ucc_geth_start_xmit()
2934 bd_status = in_be32((u32 __iomem *)bd); in ucc_geth_start_xmit()
2936 ugeth->tx_skbuff[txQ][ugeth->skb_curtx[txQ]] = skb; in ucc_geth_start_xmit()
2939 ugeth->skb_curtx[txQ] = in ucc_geth_start_xmit()
2940 (ugeth->skb_curtx[txQ] + in ucc_geth_start_xmit()
2941 1) & TX_RING_MOD_MASK(ugeth->ug_info->bdRingLenTx[txQ]); in ucc_geth_start_xmit()
2944 out_be32(&((struct qe_bd __iomem *)bd)->buf, in ucc_geth_start_xmit()
2945 dma_map_single(ugeth->dev, skb->data, in ucc_geth_start_xmit()
2946 skb->len, DMA_TO_DEVICE)); in ucc_geth_start_xmit()
2948 /* printk(KERN_DEBUG"skb->data is 0x%x\n",skb->data); */ in ucc_geth_start_xmit()
2950 bd_status = (bd_status & T_W) | T_R | T_I | T_L | skb->len; in ucc_geth_start_xmit()
2952 /* set bd status and length */ in ucc_geth_start_xmit()
2953 out_be32((u32 __iomem *)bd, bd_status); in ucc_geth_start_xmit()
2955 /* Move to next BD in the ring */ in ucc_geth_start_xmit()
2957 bd += sizeof(struct qe_bd); in ucc_geth_start_xmit()
2959 bd = ugeth->p_tx_bd_ring[txQ]; in ucc_geth_start_xmit()
2961 /* If the next BD still needs to be cleaned up, then the bds in ucc_geth_start_xmit()
2963 if (bd == ugeth->confBd[txQ]) { in ucc_geth_start_xmit()
2968 ugeth->txBd[txQ] = bd; in ucc_geth_start_xmit()
2972 if (ugeth->p_scheduler) { in ucc_geth_start_xmit()
2973 ugeth->cpucount[txQ]++; in ucc_geth_start_xmit()
2976 /* This is done by writing a running counter of the bd in ucc_geth_start_xmit()
2978 out_be16(ugeth->p_cpucount[txQ], ugeth->cpucount[txQ]); in ucc_geth_start_xmit()
2982 uccf = ugeth->uccf; in ucc_geth_start_xmit()
2983 out_be16(uccf->p_utodr, UCC_FAST_TOD); in ucc_geth_start_xmit()
2985 spin_unlock_irqrestore(&ugeth->lock, flags); in ucc_geth_start_xmit()
2993 u8 __iomem *bd; in ucc_geth_rx() local
3001 dev = ugeth->ndev; in ucc_geth_rx()
3004 bd = ugeth->rxBd[rxQ]; in ucc_geth_rx()
3006 bd_status = in_be32((u32 __iomem *)bd); in ucc_geth_rx()
3008 /* while there are received buffers and BD is full (~R_E) */ in ucc_geth_rx()
3009 while (!((bd_status & (R_E)) || (--rx_work_limit < 0))) { in ucc_geth_rx()
3010 bdBuffer = (u8 *) in_be32(&((struct qe_bd __iomem *)bd)->buf); in ucc_geth_rx()
3011 length = (u16) ((bd_status & BD_LENGTH_MASK) - 4); in ucc_geth_rx()
3012 skb = ugeth->rx_skbuff[rxQ][ugeth->skb_currx[rxQ]]; in ucc_geth_rx()
3020 pr_err("%d: ERROR!!! skb - 0x%08x\n", in ucc_geth_rx()
3024 ugeth->rx_skbuff[rxQ][ugeth->skb_currx[rxQ]] = NULL; in ucc_geth_rx()
3025 dev->stats.rx_dropped++; in ucc_geth_rx()
3027 dev->stats.rx_packets++; in ucc_geth_rx()
3034 skb->protocol = eth_type_trans(skb, ugeth->ndev); in ucc_geth_rx()
3036 dev->stats.rx_bytes += length; in ucc_geth_rx()
3041 skb = get_new_skb(ugeth, bd); in ucc_geth_rx()
3045 dev->stats.rx_dropped++; in ucc_geth_rx()
3049 ugeth->rx_skbuff[rxQ][ugeth->skb_currx[rxQ]] = skb; in ucc_geth_rx()
3052 ugeth->skb_currx[rxQ] = in ucc_geth_rx()
3053 (ugeth->skb_currx[rxQ] + in ucc_geth_rx()
3054 1) & RX_RING_MOD_MASK(ugeth->ug_info->bdRingLenRx[rxQ]); in ucc_geth_rx()
3057 bd = ugeth->p_rx_bd_ring[rxQ]; in ucc_geth_rx()
3059 bd += sizeof(struct qe_bd); in ucc_geth_rx()
3061 bd_status = in_be32((u32 __iomem *)bd); in ucc_geth_rx()
3064 ugeth->rxBd[rxQ] = bd; in ucc_geth_rx()
3070 /* Start from the next BD that should be filled */ in ucc_geth_tx()
3074 u8 __iomem *bd; /* BD pointer */ in ucc_geth_tx() local
3077 bd = ugeth->confBd[txQ]; in ucc_geth_tx()
3078 bd_status = in_be32((u32 __iomem *)bd); in ucc_geth_tx()
3084 /* BD contains already transmitted buffer. */ in ucc_geth_tx()
3086 /* the BD to be used with the current frame */ in ucc_geth_tx()
3088 skb = ugeth->tx_skbuff[txQ][ugeth->skb_dirtytx[txQ]]; in ucc_geth_tx()
3092 bytes_sent += skb->len; in ucc_geth_tx()
3093 dev->stats.tx_packets++; in ucc_geth_tx()
3097 ugeth->tx_skbuff[txQ][ugeth->skb_dirtytx[txQ]] = NULL; in ucc_geth_tx()
3098 ugeth->skb_dirtytx[txQ] = in ucc_geth_tx()
3099 (ugeth->skb_dirtytx[txQ] + in ucc_geth_tx()
3100 1) & TX_RING_MOD_MASK(ugeth->ug_info->bdRingLenTx[txQ]); in ucc_geth_tx()
3106 /* Advance the confirmation BD pointer */ in ucc_geth_tx()
3108 bd += sizeof(struct qe_bd); in ucc_geth_tx()
3110 bd = ugeth->p_tx_bd_ring[txQ]; in ucc_geth_tx()
3111 bd_status = in_be32((u32 __iomem *)bd); in ucc_geth_tx()
3113 ugeth->confBd[txQ] = bd; in ucc_geth_tx()
3124 ug_info = ugeth->ug_info; in ucc_geth_poll()
3127 spin_lock(&ugeth->lock); in ucc_geth_poll()
3129 ucc_geth_tx(ugeth->ndev, i); in ucc_geth_poll()
3130 spin_unlock(&ugeth->lock); in ucc_geth_poll()
3134 howmany += ucc_geth_rx(ugeth, i, budget - howmany); in ucc_geth_poll()
3138 setbits32(ugeth->uccf->p_uccm, UCCE_RX_EVENTS | UCCE_TX_EVENTS); in ucc_geth_poll()
3155 uccf = ugeth->uccf; in ucc_geth_irq_handler()
3156 ug_info = ugeth->ug_info; in ucc_geth_irq_handler()
3159 ucce = (u32) in_be32(uccf->p_ucce); in ucc_geth_irq_handler()
3160 uccm = (u32) in_be32(uccf->p_uccm); in ucc_geth_irq_handler()
3162 out_be32(uccf->p_ucce, ucce); in ucc_geth_irq_handler()
3166 if (napi_schedule_prep(&ugeth->napi)) { in ucc_geth_irq_handler()
3168 out_be32(uccf->p_uccm, uccm); in ucc_geth_irq_handler()
3169 __napi_schedule(&ugeth->napi); in ucc_geth_irq_handler()
3176 dev->stats.rx_errors++; in ucc_geth_irq_handler()
3178 dev->stats.tx_errors++; in ucc_geth_irq_handler()
3186 * Polling 'interrupt' - used by things like netconsole to send skbs
3187 * without having to re-enable interrupts. It's not called while
3193 int irq = ugeth->ug_info->uf_info.irq; in ucc_netpoll()
3206 if (!is_valid_ether_addr(addr->sa_data)) in ucc_geth_set_mac_addr()
3207 return -EADDRNOTAVAIL; in ucc_geth_set_mac_addr()
3209 eth_hw_addr_set(dev, addr->sa_data); in ucc_geth_set_mac_addr()
3218 spin_lock_irq(&ugeth->lock); in ucc_geth_set_mac_addr()
3219 init_mac_station_addr_regs(dev->dev_addr[0], in ucc_geth_set_mac_addr()
3220 dev->dev_addr[1], in ucc_geth_set_mac_addr()
3221 dev->dev_addr[2], in ucc_geth_set_mac_addr()
3222 dev->dev_addr[3], in ucc_geth_set_mac_addr()
3223 dev->dev_addr[4], in ucc_geth_set_mac_addr()
3224 dev->dev_addr[5], in ucc_geth_set_mac_addr()
3225 &ugeth->ug_regs->macstnaddr1, in ucc_geth_set_mac_addr()
3226 &ugeth->ug_regs->macstnaddr2); in ucc_geth_set_mac_addr()
3227 spin_unlock_irq(&ugeth->lock); in ucc_geth_set_mac_addr()
3234 struct net_device *dev = ugeth->ndev; in ucc_geth_init_mac()
3257 init_mac_station_addr_regs(dev->dev_addr[0], in ucc_geth_init_mac()
3258 dev->dev_addr[1], in ucc_geth_init_mac()
3259 dev->dev_addr[2], in ucc_geth_init_mac()
3260 dev->dev_addr[3], in ucc_geth_init_mac()
3261 dev->dev_addr[4], in ucc_geth_init_mac()
3262 dev->dev_addr[5], in ucc_geth_init_mac()
3263 &ugeth->ug_regs->macstnaddr1, in ucc_geth_init_mac()
3264 &ugeth->ug_regs->macstnaddr2); in ucc_geth_init_mac()
3287 /* Test station address */ in ucc_geth_open()
3288 if (dev->dev_addr[0] & ENET_GROUP_ADDR) { in ucc_geth_open()
3290 "Multicast address used for station address - is this what you wanted?\n"); in ucc_geth_open()
3291 return -EINVAL; in ucc_geth_open()
3306 err = request_irq(ugeth->ug_info->uf_info.irq, ucc_geth_irq_handler, in ucc_geth_open()
3313 phy_start(ugeth->phydev); in ucc_geth_open()
3314 napi_enable(&ugeth->napi); in ucc_geth_open()
3318 device_set_wakeup_capable(&dev->dev, in ucc_geth_open()
3319 qe_alive_during_sleep() || ugeth->phydev->irq); in ucc_geth_open()
3320 device_set_wakeup_enable(&dev->dev, ugeth->wol_en); in ucc_geth_open()
3336 napi_disable(&ugeth->napi); in ucc_geth_close()
3338 cancel_work_sync(&ugeth->timeout_work); in ucc_geth_close()
3340 phy_disconnect(ugeth->phydev); in ucc_geth_close()
3341 ugeth->phydev = NULL; in ucc_geth_close()
3343 free_irq(ugeth->ug_info->uf_info.irq, ugeth->ndev); in ucc_geth_close()
3358 dev = ugeth->ndev; in ucc_geth_timeout_work()
3362 dev->stats.tx_errors++; in ucc_geth_timeout_work()
3366 if (dev->flags & IFF_UP) { in ucc_geth_timeout_work()
3375 phy_start(ugeth->phydev); in ucc_geth_timeout_work()
3390 schedule_work(&ugeth->timeout_work); in ucc_geth_timeout()
3405 napi_disable(&ugeth->napi); in ucc_geth_suspend()
3413 if (ugeth->wol_en & WAKE_MAGIC) { in ucc_geth_suspend()
3414 setbits32(ugeth->uccf->p_uccm, UCC_GETH_UCCE_MPD); in ucc_geth_suspend()
3415 setbits32(&ugeth->ug_regs->maccfg2, MACCFG2_MPE); in ucc_geth_suspend()
3416 ucc_fast_enable(ugeth->uccf, COMM_DIR_RX_AND_TX); in ucc_geth_suspend()
3417 } else if (!(ugeth->wol_en & WAKE_PHY)) { in ucc_geth_suspend()
3418 phy_stop(ugeth->phydev); in ucc_geth_suspend()
3434 if (ugeth->wol_en & WAKE_MAGIC) { in ucc_geth_resume()
3435 ucc_fast_disable(ugeth->uccf, COMM_DIR_RX_AND_TX); in ucc_geth_resume()
3436 clrbits32(&ugeth->ug_regs->maccfg2, MACCFG2_MPE); in ucc_geth_resume()
3437 clrbits32(ugeth->uccf->p_uccm, UCC_GETH_UCCE_MPD); in ucc_geth_resume()
3454 ugeth->oldlink = 0; in ucc_geth_resume()
3455 ugeth->oldspeed = 0; in ucc_geth_resume()
3456 ugeth->oldduplex = -1; in ucc_geth_resume()
3458 phy_stop(ugeth->phydev); in ucc_geth_resume()
3459 phy_start(ugeth->phydev); in ucc_geth_resume()
3461 napi_enable(&ugeth->napi); in ucc_geth_resume()
3484 if (strcasecmp(phy_connection_type, "rgmii-id") == 0) in to_phy_interface()
3486 if (strcasecmp(phy_connection_type, "rgmii-txid") == 0) in to_phy_interface()
3488 if (strcasecmp(phy_connection_type, "rgmii-rxid") == 0) in to_phy_interface()
3503 return -EINVAL; in ucc_geth_ioctl()
3505 if (!ugeth->phydev) in ucc_geth_ioctl()
3506 return -ENODEV; in ucc_geth_ioctl()
3508 return phy_mii_ioctl(ugeth->phydev, rq, cmd); in ucc_geth_ioctl()
3532 snprintf(buf, sizeof(buf), "%s-clock-name", which); in ucc_geth_parse_clock()
3539 snprintf(buf, sizeof(buf), "%s-clock", which); in ucc_geth_parse_clock()
3541 /* If both *-clock-name and *-clock are missing, in ucc_geth_parse_clock()
3542 * we want to tell people to use *-clock-name. in ucc_geth_parse_clock()
3544 pr_err("missing %s-clock-name property\n", buf); in ucc_geth_parse_clock()
3545 return -EINVAL; in ucc_geth_parse_clock()
3551 return -EINVAL; in ucc_geth_parse_clock()
3558 struct device *device = &ofdev->dev; in ucc_geth_probe()
3559 struct device_node *np = ofdev->dev.of_node; in ucc_geth_probe()
3583 prop = of_get_property(np, "cell-index", NULL); in ucc_geth_probe()
3585 prop = of_get_property(np, "device-id", NULL); in ucc_geth_probe()
3587 return -ENODEV; in ucc_geth_probe()
3590 ucc_num = *prop - 1; in ucc_geth_probe()
3592 return -ENODEV; in ucc_geth_probe()
3596 return -ENOMEM; in ucc_geth_probe()
3598 ug_info->uf_info.ucc_num = ucc_num; in ucc_geth_probe()
3600 err = ucc_geth_parse_clock(np, "rx", &ug_info->uf_info.rx_clock); in ucc_geth_probe()
3603 err = ucc_geth_parse_clock(np, "tx", &ug_info->uf_info.tx_clock); in ucc_geth_probe()
3611 ug_info->uf_info.regs = res.start; in ucc_geth_probe()
3612 ug_info->uf_info.irq = irq_of_parse_and_map(np, 0); in ucc_geth_probe()
3614 ug_info->phy_node = of_parse_phandle(np, "phy-handle", 0); in ucc_geth_probe()
3615 if (!ug_info->phy_node && of_phy_is_fixed_link(np)) { in ucc_geth_probe()
3623 ug_info->phy_node = of_node_get(np); in ucc_geth_probe()
3627 ug_info->tbi_node = of_parse_phandle(np, "tbi-handle", 0); in ucc_geth_probe()
3630 prop = of_get_property(np, "phy-connection-type", NULL); in ucc_geth_probe()
3633 prop = of_get_property(ug_info->phy_node, "interface", NULL); in ucc_geth_probe()
3665 ug_info->uf_info.urfs = UCC_GETH_URFS_GIGA_INIT; in ucc_geth_probe()
3666 ug_info->uf_info.urfet = UCC_GETH_URFET_GIGA_INIT; in ucc_geth_probe()
3667 ug_info->uf_info.urfset = UCC_GETH_URFSET_GIGA_INIT; in ucc_geth_probe()
3668 ug_info->uf_info.utfs = UCC_GETH_UTFS_GIGA_INIT; in ucc_geth_probe()
3669 ug_info->uf_info.utfet = UCC_GETH_UTFET_GIGA_INIT; in ucc_geth_probe()
3670 ug_info->uf_info.utftt = UCC_GETH_UTFTT_GIGA_INIT; in ucc_geth_probe()
3671 ug_info->numThreadsTx = UCC_GETH_NUM_OF_THREADS_4; in ucc_geth_probe()
3674 * 4 UECs at 1000Base-T simultaneously, we need to allocate in ucc_geth_probe()
3678 ug_info->numThreadsRx = UCC_GETH_NUM_OF_THREADS_6; in ucc_geth_probe()
3680 ug_info->numThreadsRx = UCC_GETH_NUM_OF_THREADS_4; in ucc_geth_probe()
3685 ug_info->uf_info.ucc_num + 1, in ucc_geth_probe()
3686 (u64)ug_info->uf_info.regs, in ucc_geth_probe()
3687 ug_info->uf_info.irq); in ucc_geth_probe()
3693 err = -ENOMEM; in ucc_geth_probe()
3698 spin_lock_init(&ugeth->lock); in ucc_geth_probe()
3701 INIT_LIST_HEAD(&ugeth->group_hash_q); in ucc_geth_probe()
3702 INIT_LIST_HEAD(&ugeth->ind_hash_q); in ucc_geth_probe()
3706 /* Set the dev->base_addr to the gfar reg region */ in ucc_geth_probe()
3707 dev->base_addr = (unsigned long)(ug_info->uf_info.regs); in ucc_geth_probe()
3713 dev->netdev_ops = &ucc_geth_netdev_ops; in ucc_geth_probe()
3714 dev->watchdog_timeo = TX_TIMEOUT; in ucc_geth_probe()
3715 INIT_WORK(&ugeth->timeout_work, ucc_geth_timeout_work); in ucc_geth_probe()
3716 netif_napi_add(dev, &ugeth->napi, ucc_geth_poll); in ucc_geth_probe()
3717 dev->mtu = 1500; in ucc_geth_probe()
3718 dev->max_mtu = 1518; in ucc_geth_probe()
3720 ugeth->msg_enable = netif_msg_init(debug.msg_enable, UGETH_MSG_DEFAULT); in ucc_geth_probe()
3721 ugeth->phy_interface = phy_interface; in ucc_geth_probe()
3722 ugeth->max_speed = max_speed; in ucc_geth_probe()
3731 dev->name); in ucc_geth_probe()
3737 ugeth->ug_info = ug_info; in ucc_geth_probe()
3738 ugeth->dev = device; in ucc_geth_probe()
3739 ugeth->ndev = dev; in ucc_geth_probe()
3740 ugeth->node = np; in ucc_geth_probe()
3749 of_node_put(ug_info->tbi_node); in ucc_geth_probe()
3750 of_node_put(ug_info->phy_node); in ucc_geth_probe()
3761 struct device_node *np = ofdev->dev.of_node; in ucc_geth_remove()
3767 of_node_put(ugeth->ug_info->tbi_node); in ucc_geth_remove()
3768 of_node_put(ugeth->ug_info->phy_node); in ucc_geth_remove()
3769 kfree(ugeth->ug_info); in ucc_geth_remove()