21 #include <linux/mii.h>
41 	u32 miimcfg;	/* MII management configuration reg */
42 	u32 miimcom;	/* MII management command reg */
43 	u32 miimadd;	/* MII management address reg */
44 	u32 miimcon;	/* MII management control reg */
45 	u32 miimstat;	/* MII management status reg */
46 	u32 miimind;	/* MII management indication reg */
56 	struct fsl_pq_mii mii;  member
62 /* Number of microseconds to wait for an MII register to respond */
74  * @mii_offset: the offset of the MII registers within the memory map of the
75  * node.  Some nodes define only the MII registers, and some define the whole
76  * MAC (which includes the MII registers).
83 	unsigned int mii_offset;	/* offset of the MII registers */
174 	/* Setup the MII Mgmt clock speed */  in fsl_pq_mdio_reset()
187 		dev_err(&bus->dev, "timeout waiting for MII bus\n");  in fsl_pq_mdio_reset()
211  * of the mapped GFAR MII registers (gfar_mii_regs[] within struct gfar)
230  * of the mapped MII registers (struct fsl_pq_mii)
234 	struct fsl_pq_mdio __iomem *mdio = container_of(p, struct fsl_pq_mdio, mii);  in get_ucc_tbipa()
297 		pr_debug("fsl-pq-mdio: setting node UCC%u to MII master\n", id);  in ucc_configure()
324 			.mii_offset = offsetof(struct fsl_pq_mdio, mii),
331 			.mii_offset = offsetof(struct fsl_pq_mdio, mii),
338 			.mii_offset = offsetof(struct fsl_pq_mdio, mii),
434 	new_bus->name = "Freescale PowerQUICC MII Bus";  in fsl_pq_mdio_probe()
455 	 * Some device tree nodes represent only the MII registers, and  in fsl_pq_mdio_probe()
456 	 * others represent the MAC and MII registers.  The 'mii_offset' field  in fsl_pq_mdio_probe()
457 	 * contains the offset of the MII registers inside the mapped register  in fsl_pq_mdio_probe()