Lines Matching +full:ouput +full:- +full:only
1 // SPDX-License-Identifier: GPL-2.0
93 * fec_ptp_read - read raw cycle counter (to be used by time counter)
106 tempval = readl(fep->hwp + FEC_ATIME_CTRL); in fec_ptp_read()
108 writel(tempval, fep->hwp + FEC_ATIME_CTRL); in fec_ptp_read()
110 if (fep->quirks & FEC_QUIRK_BUG_CAPTURE) in fec_ptp_read()
113 return readl(fep->hwp + FEC_ATIME); in fec_ptp_read()
121 * This function enble the PPS ouput on the timer channel.
130 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_enable_pps()
132 if (fep->pps_enable == enable) { in fec_ptp_enable_pps()
133 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_enable_pps()
140 writel(FEC_T_TF_MASK, fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
146 val = readl(fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
149 writel(val, fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
150 val = readl(fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
154 timecounter_read(&fep->tc); in fec_ptp_enable_pps()
159 * NSEC_PER_SEC - ts.tv_nsec. Add the remaining nanoseconds in fec_ptp_enable_pps()
162 tempval = fec_ptp_read(&fep->cc); in fec_ptp_enable_pps()
164 ns = timecounter_cyc2time(&fep->tc, tempval); in fec_ptp_enable_pps()
170 val = NSEC_PER_SEC - (u32)ts.tv_nsec + tempval; in fec_ptp_enable_pps()
174 * - ts.tv_nsec is close to be zero(For example 20ns); Since the timer in fec_ptp_enable_pps()
179 * of next second. The current setting is 31-bit timer and wrap in fec_ptp_enable_pps()
185 /* We add (2 * NSEC_PER_SEC - (u32)ts.tv_nsec) to current in fec_ptp_enable_pps()
186 * ptp counter, which maybe cause 32-bit wrap. Since the in fec_ptp_enable_pps()
187 * (NSEC_PER_SEC - (u32)ts.tv_nsec) is less than 2 second. in fec_ptp_enable_pps()
189 * is bigger than fep->cc.mask would be a error. in fec_ptp_enable_pps()
191 val &= fep->cc.mask; in fec_ptp_enable_pps()
192 writel(val, fep->hwp + FEC_TCCR(fep->pps_channel)); in fec_ptp_enable_pps()
195 fep->next_counter = (val + fep->reload_period) & fep->cc.mask; in fec_ptp_enable_pps()
198 val = readl(fep->hwp + FEC_ATIME_CTRL); in fec_ptp_enable_pps()
200 writel(val, fep->hwp + FEC_ATIME_CTRL); in fec_ptp_enable_pps()
203 val = readl(fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
208 writel(val, fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
213 writel(fep->next_counter, fep->hwp + FEC_TCCR(fep->pps_channel)); in fec_ptp_enable_pps()
214 fep->next_counter = (fep->next_counter + fep->reload_period) & fep->cc.mask; in fec_ptp_enable_pps()
216 writel(0, fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
219 fep->pps_enable = enable; in fec_ptp_enable_pps()
220 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_enable_pps()
231 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_pps_perout()
234 timecounter_read(&fep->tc); in fec_ptp_pps_perout()
237 ptp_hc = fec_ptp_read(&fep->cc); in fec_ptp_pps_perout()
240 curr_time = timecounter_cyc2time(&fep->tc, ptp_hc); in fec_ptp_pps_perout()
246 if (fep->perout_stime < curr_time + 100 * NSEC_PER_MSEC) { in fec_ptp_pps_perout()
247 dev_err(&fep->pdev->dev, "Current time is too close to the start time!\n"); in fec_ptp_pps_perout()
248 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_pps_perout()
249 return -1; in fec_ptp_pps_perout()
252 compare_val = fep->perout_stime - curr_time + ptp_hc; in fec_ptp_pps_perout()
253 compare_val &= fep->cc.mask; in fec_ptp_pps_perout()
255 writel(compare_val, fep->hwp + FEC_TCCR(fep->pps_channel)); in fec_ptp_pps_perout()
256 fep->next_counter = (compare_val + fep->reload_period) & fep->cc.mask; in fec_ptp_pps_perout()
259 temp_val = readl(fep->hwp + FEC_ATIME_CTRL); in fec_ptp_pps_perout()
261 writel(temp_val, fep->hwp + FEC_ATIME_CTRL); in fec_ptp_pps_perout()
264 temp_val = readl(fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_pps_perout()
269 writel(temp_val, fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_pps_perout()
274 writel(fep->next_counter, fep->hwp + FEC_TCCR(fep->pps_channel)); in fec_ptp_pps_perout()
275 fep->next_counter = (fep->next_counter + fep->reload_period) & fep->cc.mask; in fec_ptp_pps_perout()
276 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_pps_perout()
292 * fec_ptp_start_cyclecounter - create the cycle counter from hw
305 inc = 1000000000 / fep->cycle_speed; in fec_ptp_start_cyclecounter()
308 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_start_cyclecounter()
311 writel(inc << FEC_T_INC_OFFSET, fep->hwp + FEC_ATIME_INC); in fec_ptp_start_cyclecounter()
313 /* use 31-bit timer counter */ in fec_ptp_start_cyclecounter()
314 writel(FEC_COUNTER_PERIOD, fep->hwp + FEC_ATIME_EVT_PERIOD); in fec_ptp_start_cyclecounter()
317 fep->hwp + FEC_ATIME_CTRL); in fec_ptp_start_cyclecounter()
319 memset(&fep->cc, 0, sizeof(fep->cc)); in fec_ptp_start_cyclecounter()
320 fep->cc.read = fec_ptp_read; in fec_ptp_start_cyclecounter()
321 fep->cc.mask = CLOCKSOURCE_MASK(31); in fec_ptp_start_cyclecounter()
322 fep->cc.shift = 31; in fec_ptp_start_cyclecounter()
323 fep->cc.mult = FEC_CC_MULT; in fec_ptp_start_cyclecounter()
326 timecounter_init(&fep->tc, &fep->cc, 0); in fec_ptp_start_cyclecounter()
328 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_start_cyclecounter()
332 * fec_ptp_adjfine - adjust ptp cycle frequency
339 * Scaled parts per million is ppm with a 16-bit binary fractional field.
361 ppb = -ppb; in fec_ptp_adjfine()
366 * Try to find the corr_inc between 1 to fep->ptp_inc to in fec_ptp_adjfine()
370 rhs = (u64)ppb * (u64)fep->ptp_inc; in fec_ptp_adjfine()
371 for (i = 1; i <= fep->ptp_inc; i++) { in fec_ptp_adjfine()
379 /* Not found? Set it to high value - double speed in fec_ptp_adjfine()
382 if (i > fep->ptp_inc) { in fec_ptp_adjfine()
383 corr_inc = fep->ptp_inc; in fec_ptp_adjfine()
388 corr_ns = fep->ptp_inc - corr_inc; in fec_ptp_adjfine()
390 corr_ns = fep->ptp_inc + corr_inc; in fec_ptp_adjfine()
392 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_adjfine()
394 tmp = readl(fep->hwp + FEC_ATIME_INC) & FEC_T_INC_MASK; in fec_ptp_adjfine()
396 writel(tmp, fep->hwp + FEC_ATIME_INC); in fec_ptp_adjfine()
397 corr_period = corr_period > 1 ? corr_period - 1 : corr_period; in fec_ptp_adjfine()
398 writel(corr_period, fep->hwp + FEC_ATIME_CORR); in fec_ptp_adjfine()
400 timecounter_read(&fep->tc); in fec_ptp_adjfine()
402 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_adjfine()
420 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_adjtime()
421 timecounter_adjtime(&fep->tc, delta); in fec_ptp_adjtime()
422 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_adjtime()
442 mutex_lock(&fep->ptp_clk_mutex); in fec_ptp_gettime()
444 if (!fep->ptp_clk_on) { in fec_ptp_gettime()
445 mutex_unlock(&fep->ptp_clk_mutex); in fec_ptp_gettime()
446 return -EINVAL; in fec_ptp_gettime()
448 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_gettime()
449 ns = timecounter_read(&fep->tc); in fec_ptp_gettime()
450 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_gettime()
451 mutex_unlock(&fep->ptp_clk_mutex); in fec_ptp_gettime()
476 mutex_lock(&fep->ptp_clk_mutex); in fec_ptp_settime()
478 if (!fep->ptp_clk_on) { in fec_ptp_settime()
479 mutex_unlock(&fep->ptp_clk_mutex); in fec_ptp_settime()
480 return -EINVAL; in fec_ptp_settime()
487 counter = ns & fep->cc.mask; in fec_ptp_settime()
489 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_settime()
490 writel(counter, fep->hwp + FEC_ATIME); in fec_ptp_settime()
491 timecounter_init(&fep->tc, &fep->cc, ns); in fec_ptp_settime()
492 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_settime()
493 mutex_unlock(&fep->ptp_clk_mutex); in fec_ptp_settime()
501 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_pps_disable()
502 writel(0, fep->hwp + FEC_TCSR(channel)); in fec_ptp_pps_disable()
503 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_pps_disable()
526 if (rq->type == PTP_CLK_REQ_PPS) { in fec_ptp_enable()
527 fep->reload_period = PPS_OUPUT_RELOAD_PERIOD; in fec_ptp_enable()
532 } else if (rq->type == PTP_CLK_REQ_PEROUT) { in fec_ptp_enable()
534 if (rq->perout.flags) in fec_ptp_enable()
535 return -EOPNOTSUPP; in fec_ptp_enable()
537 if (rq->perout.index != fep->pps_channel) in fec_ptp_enable()
538 return -EOPNOTSUPP; in fec_ptp_enable()
540 period.tv_sec = rq->perout.period.sec; in fec_ptp_enable()
541 period.tv_nsec = rq->perout.period.nsec; in fec_ptp_enable()
544 /* FEC PTP timer only has 31 bits, so if the period exceed in fec_ptp_enable()
548 dev_err(&fep->pdev->dev, "The period must equal to or less than 4s!\n"); in fec_ptp_enable()
549 return -EOPNOTSUPP; in fec_ptp_enable()
552 fep->reload_period = div_u64(period_ns, 2); in fec_ptp_enable()
553 if (on && fep->reload_period) { in fec_ptp_enable()
555 start_time.tv_sec = rq->perout.start.sec; in fec_ptp_enable()
556 start_time.tv_nsec = rq->perout.start.nsec; in fec_ptp_enable()
557 fep->perout_stime = timespec64_to_ns(&start_time); in fec_ptp_enable()
559 mutex_lock(&fep->ptp_clk_mutex); in fec_ptp_enable()
560 if (!fep->ptp_clk_on) { in fec_ptp_enable()
561 dev_err(&fep->pdev->dev, "Error: PTP clock is closed!\n"); in fec_ptp_enable()
562 mutex_unlock(&fep->ptp_clk_mutex); in fec_ptp_enable()
563 return -EOPNOTSUPP; in fec_ptp_enable()
565 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_enable()
567 curr_time = timecounter_read(&fep->tc); in fec_ptp_enable()
568 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_enable()
569 mutex_unlock(&fep->ptp_clk_mutex); in fec_ptp_enable()
572 delta = fep->perout_stime - curr_time; in fec_ptp_enable()
574 if (fep->perout_stime <= curr_time) { in fec_ptp_enable()
575 dev_err(&fep->pdev->dev, "Start time must larger than current time!\n"); in fec_ptp_enable()
576 return -EINVAL; in fec_ptp_enable()
579 /* Because the timer counter of FEC only has 31-bits, correspondingly, in fec_ptp_enable()
580 * the time comparison register FEC_TCCR also only low 31 bits can be in fec_ptp_enable()
586 timeout = ns_to_ktime(delta - NSEC_PER_SEC); in fec_ptp_enable()
587 hrtimer_start(&fep->perout_timer, timeout, HRTIMER_MODE_REL); in fec_ptp_enable()
592 fec_ptp_pps_disable(fep, fep->pps_channel); in fec_ptp_enable()
597 return -EOPNOTSUPP; in fec_ptp_enable()
606 switch (config->tx_type) { in fec_ptp_set()
608 fep->hwts_tx_en = 0; in fec_ptp_set()
611 fep->hwts_tx_en = 1; in fec_ptp_set()
614 return -ERANGE; in fec_ptp_set()
617 switch (config->rx_filter) { in fec_ptp_set()
619 fep->hwts_rx_en = 0; in fec_ptp_set()
623 fep->hwts_rx_en = 1; in fec_ptp_set()
624 config->rx_filter = HWTSTAMP_FILTER_ALL; in fec_ptp_set()
635 config->flags = 0; in fec_ptp_get()
636 config->tx_type = fep->hwts_tx_en ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; in fec_ptp_get()
637 config->rx_filter = (fep->hwts_rx_en ? in fec_ptp_get()
642 * fec_time_keep - call timecounter_read every second to avoid timer overrun
651 mutex_lock(&fep->ptp_clk_mutex); in fec_time_keep()
652 if (fep->ptp_clk_on) { in fec_time_keep()
653 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_time_keep()
654 timecounter_read(&fep->tc); in fec_time_keep()
655 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_time_keep()
657 mutex_unlock(&fep->ptp_clk_mutex); in fec_time_keep()
659 schedule_delayed_work(&fep->time_keep, HZ); in fec_time_keep()
668 u8 channel = fep->pps_channel; in fec_pps_interrupt()
671 val = readl(fep->hwp + FEC_TCSR(channel)); in fec_pps_interrupt()
676 writel(fep->next_counter, fep->hwp + FEC_TCCR(channel)); in fec_pps_interrupt()
678 writel(val, fep->hwp + FEC_TCSR(channel)); in fec_pps_interrupt()
679 } while (readl(fep->hwp + FEC_TCSR(channel)) & FEC_T_TF_MASK); in fec_pps_interrupt()
682 fep->next_counter = (fep->next_counter + fep->reload_period) & in fec_pps_interrupt()
683 fep->cc.mask; in fec_pps_interrupt()
686 ptp_clock_event(fep->ptp_clock, &event); in fec_pps_interrupt()
707 struct device_node *np = fep->pdev->dev.of_node; in fec_ptp_init()
711 fep->ptp_caps.owner = THIS_MODULE; in fec_ptp_init()
712 strscpy(fep->ptp_caps.name, "fec ptp", sizeof(fep->ptp_caps.name)); in fec_ptp_init()
714 fep->pps_channel = DEFAULT_PPS_CHANNEL; in fec_ptp_init()
715 of_property_read_u32(np, "fsl,pps-channel", &fep->pps_channel); in fec_ptp_init()
717 fep->ptp_caps.max_adj = 250000000; in fec_ptp_init()
718 fep->ptp_caps.n_alarm = 0; in fec_ptp_init()
719 fep->ptp_caps.n_ext_ts = 0; in fec_ptp_init()
720 fep->ptp_caps.n_per_out = 1; in fec_ptp_init()
721 fep->ptp_caps.n_pins = 0; in fec_ptp_init()
722 fep->ptp_caps.pps = 1; in fec_ptp_init()
723 fep->ptp_caps.adjfine = fec_ptp_adjfine; in fec_ptp_init()
724 fep->ptp_caps.adjtime = fec_ptp_adjtime; in fec_ptp_init()
725 fep->ptp_caps.gettime64 = fec_ptp_gettime; in fec_ptp_init()
726 fep->ptp_caps.settime64 = fec_ptp_settime; in fec_ptp_init()
727 fep->ptp_caps.enable = fec_ptp_enable; in fec_ptp_init()
729 fep->cycle_speed = clk_get_rate(fep->clk_ptp); in fec_ptp_init()
730 if (!fep->cycle_speed) { in fec_ptp_init()
731 fep->cycle_speed = NSEC_PER_SEC; in fec_ptp_init()
732 dev_err(&fep->pdev->dev, "clk_ptp clock rate is zero\n"); in fec_ptp_init()
734 fep->ptp_inc = NSEC_PER_SEC / fep->cycle_speed; in fec_ptp_init()
736 spin_lock_init(&fep->tmreg_lock); in fec_ptp_init()
740 INIT_DELAYED_WORK(&fep->time_keep, fec_time_keep); in fec_ptp_init()
742 hrtimer_init(&fep->perout_timer, CLOCK_REALTIME, HRTIMER_MODE_REL); in fec_ptp_init()
743 fep->perout_timer.function = fec_ptp_pps_perout_handler; in fec_ptp_init()
749 * only the PTP_CLOCK_PPS clock events should stop in fec_ptp_init()
752 ret = devm_request_irq(&pdev->dev, irq, fec_pps_interrupt, in fec_ptp_init()
753 0, pdev->name, ndev); in fec_ptp_init()
755 dev_warn(&pdev->dev, "request for pps irq failed(%d)\n", in fec_ptp_init()
759 fep->ptp_clock = ptp_clock_register(&fep->ptp_caps, &pdev->dev); in fec_ptp_init()
760 if (IS_ERR(fep->ptp_clock)) { in fec_ptp_init()
761 fep->ptp_clock = NULL; in fec_ptp_init()
762 dev_err(&pdev->dev, "ptp_clock_register failed\n"); in fec_ptp_init()
765 schedule_delayed_work(&fep->time_keep, HZ); in fec_ptp_init()
773 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_save_state()
775 fep->ptp_saved_state.pps_enable = fep->pps_enable; in fec_ptp_save_state()
777 fep->ptp_saved_state.ns_phc = timecounter_read(&fep->tc); in fec_ptp_save_state()
778 fep->ptp_saved_state.ns_sys = ktime_get_ns(); in fec_ptp_save_state()
780 fep->ptp_saved_state.at_corr = readl(fep->hwp + FEC_ATIME_CORR); in fec_ptp_save_state()
781 atime_inc_corr = readl(fep->hwp + FEC_ATIME_INC) & FEC_T_INC_CORR_MASK; in fec_ptp_save_state()
782 fep->ptp_saved_state.at_inc_corr = (u8)(atime_inc_corr >> FEC_T_INC_CORR_OFFSET); in fec_ptp_save_state()
784 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_save_state()
790 u32 atime_inc = readl(fep->hwp + FEC_ATIME_INC) & FEC_T_INC_MASK; in fec_ptp_restore_state()
795 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_restore_state()
798 fep->pps_enable = 0; in fec_ptp_restore_state()
800 writel(fep->ptp_saved_state.at_corr, fep->hwp + FEC_ATIME_CORR); in fec_ptp_restore_state()
801 atime_inc |= ((u32)fep->ptp_saved_state.at_inc_corr) << FEC_T_INC_CORR_OFFSET; in fec_ptp_restore_state()
802 writel(atime_inc, fep->hwp + FEC_ATIME_INC); in fec_ptp_restore_state()
804 ns = ktime_get_ns() - fep->ptp_saved_state.ns_sys + fep->ptp_saved_state.ns_phc; in fec_ptp_restore_state()
805 counter = ns & fep->cc.mask; in fec_ptp_restore_state()
806 writel(counter, fep->hwp + FEC_ATIME); in fec_ptp_restore_state()
807 timecounter_init(&fep->tc, &fep->cc, ns); in fec_ptp_restore_state()
809 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_restore_state()
812 if (fep->ptp_saved_state.pps_enable) { in fec_ptp_restore_state()
813 /* Re-enable PPS */ in fec_ptp_restore_state()
823 if (fep->pps_enable) in fec_ptp_stop()
826 cancel_delayed_work_sync(&fep->time_keep); in fec_ptp_stop()
827 hrtimer_cancel(&fep->perout_timer); in fec_ptp_stop()
828 if (fep->ptp_clock) in fec_ptp_stop()
829 ptp_clock_unregister(fep->ptp_clock); in fec_ptp_stop()