Lines Matching +full:hf +full:- +full:buffer +full:- +full:low +full:- +full:power
2 Written 1998-2000 by Donald Becker.
17 http://www.scyld.com/network/pci-skeleton.html
22 - Add ethtool support
23 - Replace some MII-related magic numbers with constants
29 static int debug; /* 1-> print debug message */
32 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). */
35 /* Set the copy breakpoint for the copy-only-tiny-frames scheme. */
44 static int options[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
45 static int full_duplex[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
48 /* Keep the ring sizes a power of two for compile efficiency. */
52 /* There are no ill effects from too-large receive rings. */
53 // 88-12-9 modify,
65 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */
99 /* This is only in the support-all-kernels source code. */
104 MODULE_DESCRIPTION("Myson MTD-8xx 100/10M Ethernet PCI Adapter Driver");
113 MODULE_PARM_DESC(debug, "fealnx enable debugging (0-1)");
114 MODULE_PARM_DESC(rx_copybreak, "fealnx copy breakpoint for copy-only-tiny-frames");
116 MODULE_PARM_DESC(options, "fealnx: Bits 0-3: media type, bit 17: full duplex");
154 PAR0 = 0x0, /* physical address 0-3 */
155 PAR1 = 0x04, /* physical address 4-5 */
156 MAR0 = 0x08, /* multicast address 0-3 */
157 MAR1 = 0x0C, /* multicast address 4-7 */
158 FAR0 = 0x10, /* flow-control address 0-3 */
159 FAR1 = 0x14, /* flow-control address 4-5 */
169 FTH = 0x3C, /* flow control high/low threshold */
175 ANARANLPAR = 0x54, /* auto-negotiation advertisement and link
177 ANEROCR = 0x58, /* auto-negotiation expansion and pci conf. */
189 FBEMask = 0x00001800, /* mask bit12-11 */
198 RBU = 0x00000020, /* receive buffer unavailable */
199 TBU = 0x00000010, /* transmit buffer unavilable */
230 /* The Tulip Rx and Tx buffer descriptors. */
234 u32 buffer; member
273 HF = 0x00000100, /* heartbeat fail */ enumerator
286 PKTSMask = 0x3ff800, /* packet size bit21-11 */
288 TBSMask = 0x000007ff, /* transmit buffer bit 10-0 */
303 /* ------------------------------------------------------------------------- */
305 /* ------------------------------------------------------------------------- */
307 /* 89-7-27 add, (begin) */
312 /* 89-7-27 add, (end) */
314 /* ------------------------------------------------------------------------- */
316 /* ------------------------------------------------------------------------- */
323 /* ------------------------------------------------------------------------- */
325 /* ------------------------------------------------------------------------- */
333 /* -------------------------------------------------------------------------- */
335 /* -------------------------------------------------------------------------- */
361 /* for 3-in-1 case, BMCRSR register */
406 unsigned int default_port:4; /* Last dev->if_port value. */
442 while (--delay) { in stop_nic_rx()
453 while (--delay) { in stop_nic_rxtx()
477 static int card_idx = -1; in fealnx_init_one()
481 unsigned int chip_id = ent->driver_data; in fealnx_init_one()
503 dev_err(&pdev->dev, in fealnx_init_one()
505 return -ENODEV; in fealnx_init_one()
512 irq = pdev->irq; in fealnx_init_one()
516 err = -ENOMEM; in fealnx_init_one()
522 err = -ENOMEM; in fealnx_init_one()
525 SET_NETDEV_DEV(dev, &pdev->dev); in fealnx_init_one()
537 np->mem = ioaddr; in fealnx_init_one()
538 spin_lock_init(&np->lock); in fealnx_init_one()
539 np->pci_dev = pdev; in fealnx_init_one()
540 np->flags = skel_netdrv_tbl[chip_id].flags; in fealnx_init_one()
542 np->mii.dev = dev; in fealnx_init_one()
543 np->mii.mdio_read = mdio_read; in fealnx_init_one()
544 np->mii.mdio_write = mdio_write; in fealnx_init_one()
545 np->mii.phy_id_mask = 0x1f; in fealnx_init_one()
546 np->mii.reg_num_mask = 0x1f; in fealnx_init_one()
548 ring_space = dma_alloc_coherent(&pdev->dev, RX_TOTAL_SIZE, &ring_dma, in fealnx_init_one()
551 err = -ENOMEM; in fealnx_init_one()
554 np->rx_ring = ring_space; in fealnx_init_one()
555 np->rx_ring_dma = ring_dma; in fealnx_init_one()
557 ring_space = dma_alloc_coherent(&pdev->dev, TX_TOTAL_SIZE, &ring_dma, in fealnx_init_one()
560 err = -ENOMEM; in fealnx_init_one()
563 np->tx_ring = ring_space; in fealnx_init_one()
564 np->tx_ring_dma = ring_dma; in fealnx_init_one()
567 if (np->flags == HAS_MII_XCVR) { in fealnx_init_one()
570 for (phy = 1; phy < 32 && phy_idx < ARRAY_SIZE(np->phys); in fealnx_init_one()
575 np->phys[phy_idx++] = phy; in fealnx_init_one()
576 dev_info(&pdev->dev, in fealnx_init_one()
583 data = mdio_read(dev, np->phys[0], 2); in fealnx_init_one()
585 np->PHYType = SeeqPHY; in fealnx_init_one()
587 np->PHYType = AhdocPHY; in fealnx_init_one()
589 np->PHYType = MarvellPHY; in fealnx_init_one()
591 np->PHYType = Myson981; in fealnx_init_one()
593 np->PHYType = LevelOnePHY; in fealnx_init_one()
595 np->PHYType = OtherPHY; in fealnx_init_one()
600 np->mii_cnt = phy_idx; in fealnx_init_one()
602 dev_warn(&pdev->dev, in fealnx_init_one()
603 "MII PHY not found -- this device may " in fealnx_init_one()
606 np->phys[0] = 32; in fealnx_init_one()
610 np->PHYType = MysonPHY; in fealnx_init_one()
612 np->PHYType = OtherPHY; in fealnx_init_one()
614 np->mii.phy_id = np->phys[0]; in fealnx_init_one()
616 if (dev->mem_start) in fealnx_init_one()
617 option = dev->mem_start; in fealnx_init_one()
622 np->mii.full_duplex = 1; in fealnx_init_one()
623 np->default_port = option & 15; in fealnx_init_one()
627 np->mii.full_duplex = full_duplex[card_idx]; in fealnx_init_one()
629 if (np->mii.full_duplex) { in fealnx_init_one()
630 dev_info(&pdev->dev, "Media type forced to Full Duplex.\n"); in fealnx_init_one()
632 // if (np->PHYType==MarvellPHY) in fealnx_init_one()
633 if ((np->PHYType == MarvellPHY) || (np->PHYType == LevelOnePHY)) { in fealnx_init_one()
636 data = mdio_read(dev, np->phys[0], 9); in fealnx_init_one()
638 mdio_write(dev, np->phys[0], 9, data); in fealnx_init_one()
641 if (np->flags == HAS_MII_XCVR) in fealnx_init_one()
642 mdio_write(dev, np->phys[0], MII_ADVERTISE, ADVERTISE_FULL); in fealnx_init_one()
645 np->mii.force_media = 1; in fealnx_init_one()
648 dev->netdev_ops = &netdev_ops; in fealnx_init_one()
649 dev->ethtool_ops = &netdev_ethtool_ops; in fealnx_init_one()
650 dev->watchdog_timeo = TX_TIMEOUT; in fealnx_init_one()
657 dev->name, skel_netdrv_tbl[chip_id].chip_name, ioaddr, in fealnx_init_one()
658 dev->dev_addr, irq); in fealnx_init_one()
663 dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, np->tx_ring, in fealnx_init_one()
664 np->tx_ring_dma); in fealnx_init_one()
666 dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, np->rx_ring, in fealnx_init_one()
667 np->rx_ring_dma); in fealnx_init_one()
685 dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, np->tx_ring, in fealnx_remove_one()
686 np->tx_ring_dma); in fealnx_remove_one()
687 dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, np->rx_ring, in fealnx_remove_one()
688 np->rx_ring_dma); in fealnx_remove_one()
690 pci_iounmap(pdev, np->mem); in fealnx_remove_one()
712 /* low MDC; MDO is already high (miir) */ in m80x_send_cmd_to_phy()
727 /* low MDC, prepare MDO */ in m80x_send_cmd_to_phy()
750 void __iomem *miiport = np->mem + MANAGEMENT; in mdio_read()
760 /* low MDC */ in mdio_read()
778 /* low MDC */ in mdio_read()
789 void __iomem *miiport = np->mem + MANAGEMENT; in mdio_write()
798 /* low MDC, prepare MDO */ in mdio_write()
812 /* low MDC */ in mdio_write()
821 void __iomem *ioaddr = np->mem; in netdev_open()
822 const int irq = np->pci_dev->irq; in netdev_open()
827 rc = request_irq(irq, intr_handler, IRQF_SHARED, dev->name, dev); in netdev_open()
829 return -EAGAIN; in netdev_open()
832 iowrite16(((const unsigned short *)dev->dev_addr)[i], in netdev_open()
837 iowrite32(np->rx_ring_dma, ioaddr + RXLBA); in netdev_open()
838 iowrite32(np->tx_ring_dma, ioaddr + TXLBA); in netdev_open()
857 np->bcrvalue = 0x10; /* little-endian, 8 burst length */ in netdev_open()
859 np->bcrvalue |= 0x04; /* big-endian */ in netdev_open()
864 np->crvalue = 0xa00; in netdev_open()
867 np->crvalue = 0xe00; /* rx 128 burst length */ in netdev_open()
872 // np->imrvalue=FBE|TUNF|CNTOVF|RBU|TI|RI; in netdev_open()
873 np->imrvalue = TUNF | CNTOVF | RBU | TI | RI; in netdev_open()
874 if (np->pci_dev->device == 0x891) { in netdev_open()
875 np->bcrvalue |= 0x200; /* set PROG bit */ in netdev_open()
876 np->crvalue |= CR_W_ENH; /* set enhanced bit */ in netdev_open()
877 np->imrvalue |= ETI; in netdev_open()
879 iowrite32(np->bcrvalue, ioaddr + BCR); in netdev_open()
881 if (dev->if_port == 0) in netdev_open()
882 dev->if_port = np->default_port; in netdev_open()
886 // np->crvalue = 0x00e40001; /* tx store and forward, tx/rx enable */ in netdev_open()
887 np->crvalue |= 0x00e40001; /* tx store and forward, tx/rx enable */ in netdev_open()
888 np->mii.full_duplex = np->mii.force_media; in netdev_open()
890 if (np->linkok) in netdev_open()
898 iowrite32(np->imrvalue, ioaddr + IMR); in netdev_open()
901 printk(KERN_DEBUG "%s: Done netdev_open().\n", dev->name); in netdev_open()
904 timer_setup(&np->timer, netdev_timer, 0); in netdev_open()
905 np->timer.expires = RUN_AT(3 * HZ); in netdev_open()
908 add_timer(&np->timer); in netdev_open()
910 timer_setup(&np->reset_timer, reset_timer, 0); in netdev_open()
911 np->reset_timer_armed = 0; in netdev_open()
924 np->linkok = 0; in getlinkstatus()
926 if (np->PHYType == MysonPHY) { in getlinkstatus()
928 if (ioread32(np->mem + BMCRSR) & LinkIsUp2) { in getlinkstatus()
929 np->linkok = 1; in getlinkstatus()
936 if (mdio_read(dev, np->phys[0], MII_BMSR) & BMSR_LSTATUS) { in getlinkstatus()
937 np->linkok = 1; in getlinkstatus()
950 if (np->PHYType == MysonPHY) { /* 3-in-1 case */ in getlinktype()
951 if (ioread32(np->mem + TCRRCR) & CR_R_FD) in getlinktype()
952 np->duplexmode = 2; /* full duplex */ in getlinktype()
954 np->duplexmode = 1; /* half duplex */ in getlinktype()
955 if (ioread32(np->mem + TCRRCR) & CR_R_PS10) in getlinktype()
956 np->line_speed = 1; /* 10M */ in getlinktype()
958 np->line_speed = 2; /* 100M */ in getlinktype()
960 if (np->PHYType == SeeqPHY) { /* this PHY is SEEQ 80225 */ in getlinktype()
963 data = mdio_read(dev, np->phys[0], MIIRegister18); in getlinktype()
965 np->line_speed = 2; /* 100M */ in getlinktype()
967 np->line_speed = 1; /* 10M */ in getlinktype()
969 np->duplexmode = 2; /* full duplex mode */ in getlinktype()
971 np->duplexmode = 1; /* half duplex mode */ in getlinktype()
972 } else if (np->PHYType == AhdocPHY) { in getlinktype()
975 data = mdio_read(dev, np->phys[0], DiagnosticReg); in getlinktype()
977 np->line_speed = 2; /* 100M */ in getlinktype()
979 np->line_speed = 1; /* 10M */ in getlinktype()
981 np->duplexmode = 2; /* full duplex mode */ in getlinktype()
983 np->duplexmode = 1; /* half duplex mode */ in getlinktype()
986 else if (np->PHYType == MarvellPHY) { in getlinktype()
989 data = mdio_read(dev, np->phys[0], SpecificReg); in getlinktype()
991 np->duplexmode = 2; /* full duplex mode */ in getlinktype()
993 np->duplexmode = 1; /* half duplex mode */ in getlinktype()
996 np->line_speed = 3; /* 1000M */ in getlinktype()
998 np->line_speed = 2; /* 100M */ in getlinktype()
1000 np->line_speed = 1; /* 10M */ in getlinktype()
1004 else if (np->PHYType == Myson981) { in getlinktype()
1007 data = mdio_read(dev, np->phys[0], StatusRegister); in getlinktype()
1010 np->line_speed = 2; in getlinktype()
1012 np->line_speed = 1; in getlinktype()
1015 np->duplexmode = 2; in getlinktype()
1017 np->duplexmode = 1; in getlinktype()
1021 else if (np->PHYType == LevelOnePHY) { in getlinktype()
1024 data = mdio_read(dev, np->phys[0], SpecificReg); in getlinktype()
1026 np->duplexmode = 2; /* full duplex mode */ in getlinktype()
1028 np->duplexmode = 1; /* half duplex mode */ in getlinktype()
1031 np->line_speed = 3; /* 1000M */ in getlinktype()
1033 np->line_speed = 2; /* 100M */ in getlinktype()
1035 np->line_speed = 1; /* 10M */ in getlinktype()
1037 np->crvalue &= (~CR_W_PS10) & (~CR_W_FD) & (~CR_W_PS1000); in getlinktype()
1038 if (np->line_speed == 1) in getlinktype()
1039 np->crvalue |= CR_W_PS10; in getlinktype()
1040 else if (np->line_speed == 3) in getlinktype()
1041 np->crvalue |= CR_W_PS1000; in getlinktype()
1042 if (np->duplexmode == 2) in getlinktype()
1043 np->crvalue |= CR_W_FD; in getlinktype()
1054 while (np->really_rx_count != RX_RING_SIZE) { in allocate_rx_buffers()
1057 skb = netdev_alloc_skb(dev, np->rx_buf_sz); in allocate_rx_buffers()
1061 while (np->lack_rxbuf->skbuff) in allocate_rx_buffers()
1062 np->lack_rxbuf = np->lack_rxbuf->next_desc_logical; in allocate_rx_buffers()
1064 np->lack_rxbuf->skbuff = skb; in allocate_rx_buffers()
1065 np->lack_rxbuf->buffer = dma_map_single(&np->pci_dev->dev, in allocate_rx_buffers()
1066 skb->data, in allocate_rx_buffers()
1067 np->rx_buf_sz, in allocate_rx_buffers()
1069 np->lack_rxbuf->status = RXOWN; in allocate_rx_buffers()
1070 ++np->really_rx_count; in allocate_rx_buffers()
1078 struct net_device *dev = np->mii.dev; in netdev_timer()
1079 void __iomem *ioaddr = np->mem; in netdev_timer()
1080 int old_crvalue = np->crvalue; in netdev_timer()
1081 unsigned int old_linkok = np->linkok; in netdev_timer()
1086 "config %8.8x.\n", dev->name, ioread32(ioaddr + ISR), in netdev_timer()
1089 spin_lock_irqsave(&np->lock, flags); in netdev_timer()
1091 if (np->flags == HAS_MII_XCVR) { in netdev_timer()
1093 if ((old_linkok == 0) && (np->linkok == 1)) { /* we need to detect the media type again */ in netdev_timer()
1095 if (np->crvalue != old_crvalue) { in netdev_timer()
1096 stop_nic_rxtx(ioaddr, np->crvalue); in netdev_timer()
1097 iowrite32(np->crvalue, ioaddr + TCRRCR); in netdev_timer()
1104 spin_unlock_irqrestore(&np->lock, flags); in netdev_timer()
1106 np->timer.expires = RUN_AT(10 * HZ); in netdev_timer()
1107 add_timer(&np->timer); in netdev_timer()
1116 void __iomem *ioaddr = np->mem; in reset_and_disable_rxtx()
1130 while (--delay) { in reset_and_disable_rxtx()
1142 void __iomem *ioaddr = np->mem; in enable_rxtx()
1146 iowrite32(np->tx_ring_dma + ((char*)np->cur_tx - (char*)np->tx_ring), in enable_rxtx()
1148 iowrite32(np->rx_ring_dma + ((char*)np->cur_rx - (char*)np->rx_ring), in enable_rxtx()
1151 iowrite32(np->bcrvalue, ioaddr + BCR); in enable_rxtx()
1154 __set_rx_mode(dev); /* changes np->crvalue, writes it into TCRRCR */ in enable_rxtx()
1158 iowrite32(np->imrvalue, ioaddr + IMR); in enable_rxtx()
1167 struct net_device *dev = np->mii.dev; in reset_timer()
1170 printk(KERN_WARNING "%s: resetting tx and rx machinery\n", dev->name); in reset_timer()
1172 spin_lock_irqsave(&np->lock, flags); in reset_timer()
1173 np->crvalue = np->crvalue_sv; in reset_timer()
1174 np->imrvalue = np->imrvalue_sv; in reset_timer()
1182 np->reset_timer_armed = 0; in reset_timer()
1184 spin_unlock_irqrestore(&np->lock, flags); in reset_timer()
1191 void __iomem *ioaddr = np->mem; in fealnx_tx_timeout()
1197 dev->name, ioread32(ioaddr + ISR)); in fealnx_tx_timeout()
1200 printk(KERN_DEBUG " Rx ring %p: ", np->rx_ring); in fealnx_tx_timeout()
1203 (unsigned int) np->rx_ring[i].status); in fealnx_tx_timeout()
1205 printk(KERN_DEBUG " Tx ring %p: ", np->tx_ring); in fealnx_tx_timeout()
1207 printk(KERN_CONT " %4.4x", np->tx_ring[i].status); in fealnx_tx_timeout()
1211 spin_lock_irqsave(&np->lock, flags); in fealnx_tx_timeout()
1217 spin_unlock_irqrestore(&np->lock, flags); in fealnx_tx_timeout()
1220 dev->stats.tx_errors++; in fealnx_tx_timeout()
1232 np->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32); in init_ring()
1233 np->cur_rx = &np->rx_ring[0]; in init_ring()
1234 np->lack_rxbuf = np->rx_ring; in init_ring()
1235 np->really_rx_count = 0; in init_ring()
1239 np->rx_ring[i].status = 0; in init_ring()
1240 np->rx_ring[i].control = np->rx_buf_sz << RBSShift; in init_ring()
1241 np->rx_ring[i].next_desc = np->rx_ring_dma + in init_ring()
1243 np->rx_ring[i].next_desc_logical = &np->rx_ring[i + 1]; in init_ring()
1244 np->rx_ring[i].skbuff = NULL; in init_ring()
1248 np->rx_ring[i - 1].next_desc = np->rx_ring_dma; in init_ring()
1249 np->rx_ring[i - 1].next_desc_logical = np->rx_ring; in init_ring()
1253 struct sk_buff *skb = netdev_alloc_skb(dev, np->rx_buf_sz); in init_ring()
1256 np->lack_rxbuf = &np->rx_ring[i]; in init_ring()
1260 ++np->really_rx_count; in init_ring()
1261 np->rx_ring[i].skbuff = skb; in init_ring()
1262 np->rx_ring[i].buffer = dma_map_single(&np->pci_dev->dev, in init_ring()
1263 skb->data, in init_ring()
1264 np->rx_buf_sz, in init_ring()
1266 np->rx_ring[i].status = RXOWN; in init_ring()
1267 np->rx_ring[i].control |= RXIC; in init_ring()
1271 np->cur_tx = &np->tx_ring[0]; in init_ring()
1272 np->cur_tx_copy = &np->tx_ring[0]; in init_ring()
1273 np->really_tx_count = 0; in init_ring()
1274 np->free_tx_count = TX_RING_SIZE; in init_ring()
1277 np->tx_ring[i].status = 0; in init_ring()
1278 /* do we need np->tx_ring[i].control = XXX; ?? */ in init_ring()
1279 np->tx_ring[i].next_desc = np->tx_ring_dma + in init_ring()
1281 np->tx_ring[i].next_desc_logical = &np->tx_ring[i + 1]; in init_ring()
1282 np->tx_ring[i].skbuff = NULL; in init_ring()
1286 np->tx_ring[i - 1].next_desc = np->tx_ring_dma; in init_ring()
1287 np->tx_ring[i - 1].next_desc_logical = &np->tx_ring[0]; in init_ring()
1296 spin_lock_irqsave(&np->lock, flags); in start_tx()
1298 np->cur_tx_copy->skbuff = skb; in start_tx()
1303 np->cur_tx_copy->buffer = dma_map_single(&np->pci_dev->dev, skb->data, in start_tx()
1304 skb->len, DMA_TO_DEVICE); in start_tx()
1305 np->cur_tx_copy->control = TXIC | TXLD | TXFD | CRCEnable | PADEnable; in start_tx()
1306 np->cur_tx_copy->control |= (skb->len << PKTSShift); /* pkt size */ in start_tx()
1307 np->cur_tx_copy->control |= (skb->len << TBSShift); /* buffer size */ in start_tx()
1309 if (np->pci_dev->device == 0x891) in start_tx()
1310 np->cur_tx_copy->control |= ETIControl | RetryTxLC; in start_tx()
1311 np->cur_tx_copy->status = TXOWN; in start_tx()
1312 np->cur_tx_copy = np->cur_tx_copy->next_desc_logical; in start_tx()
1313 --np->free_tx_count; in start_tx()
1315 if (skb->len > BPT) { in start_tx()
1319 np->cur_tx_copy->buffer = dma_map_single(&np->pci_dev->dev, in start_tx()
1320 skb->data, BPT, in start_tx()
1322 np->cur_tx_copy->control = TXIC | TXFD | CRCEnable | PADEnable; in start_tx()
1323 np->cur_tx_copy->control |= (skb->len << PKTSShift); /* pkt size */ in start_tx()
1324 np->cur_tx_copy->control |= (BPT << TBSShift); /* buffer size */ in start_tx()
1327 next = np->cur_tx_copy->next_desc_logical; in start_tx()
1328 next->skbuff = skb; in start_tx()
1329 next->control = TXIC | TXLD | CRCEnable | PADEnable; in start_tx()
1330 next->control |= (skb->len << PKTSShift); /* pkt size */ in start_tx()
1331 next->control |= ((skb->len - BPT) << TBSShift); /* buf size */ in start_tx()
1333 if (np->pci_dev->device == 0x891) in start_tx()
1334 np->cur_tx_copy->control |= ETIControl | RetryTxLC; in start_tx()
1335 next->buffer = dma_map_single(&ep->pci_dev->dev, in start_tx()
1336 skb->data + BPT, skb->len - BPT, in start_tx()
1339 next->status = TXOWN; in start_tx()
1340 np->cur_tx_copy->status = TXOWN; in start_tx()
1342 np->cur_tx_copy = next->next_desc_logical; in start_tx()
1343 np->free_tx_count -= 2; in start_tx()
1345 np->cur_tx_copy->buffer = dma_map_single(&np->pci_dev->dev, in start_tx()
1346 skb->data, skb->len, in start_tx()
1348 np->cur_tx_copy->control = TXIC | TXLD | TXFD | CRCEnable | PADEnable; in start_tx()
1349 np->cur_tx_copy->control |= (skb->len << PKTSShift); /* pkt size */ in start_tx()
1350 np->cur_tx_copy->control |= (skb->len << TBSShift); /* buffer size */ in start_tx()
1352 if (np->pci_dev->device == 0x891) in start_tx()
1353 np->cur_tx_copy->control |= ETIControl | RetryTxLC; in start_tx()
1354 np->cur_tx_copy->status = TXOWN; in start_tx()
1355 np->cur_tx_copy = np->cur_tx_copy->next_desc_logical; in start_tx()
1356 --np->free_tx_count; in start_tx()
1360 if (np->free_tx_count < 2) in start_tx()
1362 ++np->really_tx_count; in start_tx()
1363 iowrite32(0, np->mem + TXPDR); in start_tx()
1365 spin_unlock_irqrestore(&np->lock, flags); in start_tx()
1379 np->cur_tx = &np->tx_ring[0]; in reset_tx_descriptors()
1380 np->cur_tx_copy = &np->tx_ring[0]; in reset_tx_descriptors()
1381 np->really_tx_count = 0; in reset_tx_descriptors()
1382 np->free_tx_count = TX_RING_SIZE; in reset_tx_descriptors()
1385 cur = &np->tx_ring[i]; in reset_tx_descriptors()
1386 if (cur->skbuff) { in reset_tx_descriptors()
1387 dma_unmap_single(&np->pci_dev->dev, cur->buffer, in reset_tx_descriptors()
1388 cur->skbuff->len, DMA_TO_DEVICE); in reset_tx_descriptors()
1389 dev_kfree_skb_any(cur->skbuff); in reset_tx_descriptors()
1390 cur->skbuff = NULL; in reset_tx_descriptors()
1392 cur->status = 0; in reset_tx_descriptors()
1393 cur->control = 0; /* needed? */ in reset_tx_descriptors()
1395 cur->next_desc = np->tx_ring_dma + in reset_tx_descriptors()
1397 cur->next_desc_logical = &np->tx_ring[i + 1]; in reset_tx_descriptors()
1400 np->tx_ring[TX_RING_SIZE - 1].next_desc = np->tx_ring_dma; in reset_tx_descriptors()
1401 np->tx_ring[TX_RING_SIZE - 1].next_desc_logical = &np->tx_ring[0]; in reset_tx_descriptors()
1409 struct fealnx_desc *cur = np->cur_rx; in reset_rx_descriptors()
1415 if (cur->skbuff) in reset_rx_descriptors()
1416 cur->status = RXOWN; in reset_rx_descriptors()
1417 cur = cur->next_desc_logical; in reset_rx_descriptors()
1420 iowrite32(np->rx_ring_dma + ((char*)np->cur_rx - (char*)np->rx_ring), in reset_rx_descriptors()
1421 np->mem + RXLBA); in reset_rx_descriptors()
1431 void __iomem *ioaddr = np->mem; in intr_handler()
1436 spin_lock(&np->lock); in intr_handler()
1447 printk(KERN_DEBUG "%s: Interrupt, status %4.4x.\n", dev->name, in intr_handler()
1450 if (!(intr_status & np->imrvalue)) in intr_handler()
1469 dev->stats.rx_missed_errors += in intr_handler()
1473 dev->stats.rx_crc_errors += in intr_handler()
1481 stop_nic_rx(ioaddr, np->crvalue); in intr_handler()
1483 iowrite32(np->crvalue, ioaddr + TCRRCR); in intr_handler()
1487 while (np->really_tx_count) { in intr_handler()
1488 long tx_status = np->cur_tx->status; in intr_handler()
1489 long tx_control = np->cur_tx->control; in intr_handler()
1494 next = np->cur_tx->next_desc_logical; in intr_handler()
1495 tx_status = next->status; in intr_handler()
1496 tx_control = next->control; in intr_handler()
1502 if (!(np->crvalue & CR_W_ENH)) { in intr_handler()
1503 if (tx_status & (CSL | LC | EC | UDF | HF)) { in intr_handler()
1504 dev->stats.tx_errors++; in intr_handler()
1506 dev->stats.tx_aborted_errors++; in intr_handler()
1508 dev->stats.tx_carrier_errors++; in intr_handler()
1510 dev->stats.tx_window_errors++; in intr_handler()
1512 dev->stats.tx_fifo_errors++; in intr_handler()
1513 if ((tx_status & HF) && np->mii.full_duplex == 0) in intr_handler()
1514 dev->stats.tx_heartbeat_errors++; in intr_handler()
1517 dev->stats.tx_bytes += in intr_handler()
1520 dev->stats.collisions += in intr_handler()
1522 dev->stats.tx_packets++; in intr_handler()
1525 dev->stats.tx_bytes += in intr_handler()
1527 dev->stats.tx_packets++; in intr_handler()
1531 dma_unmap_single(&np->pci_dev->dev, in intr_handler()
1532 np->cur_tx->buffer, in intr_handler()
1533 np->cur_tx->skbuff->len, in intr_handler()
1535 dev_consume_skb_irq(np->cur_tx->skbuff); in intr_handler()
1536 np->cur_tx->skbuff = NULL; in intr_handler()
1537 --np->really_tx_count; in intr_handler()
1538 if (np->cur_tx->control & TXLD) { in intr_handler()
1539 np->cur_tx = np->cur_tx->next_desc_logical; in intr_handler()
1540 ++np->free_tx_count; in intr_handler()
1542 np->cur_tx = np->cur_tx->next_desc_logical; in intr_handler()
1543 np->cur_tx = np->cur_tx->next_desc_logical; in intr_handler()
1544 np->free_tx_count += 2; in intr_handler()
1549 if (num_tx && np->free_tx_count >= 2) in intr_handler()
1553 if (np->crvalue & CR_W_ENH) { in intr_handler()
1557 dev->stats.tx_errors += (data & 0xff000000) >> 24; in intr_handler()
1558 dev->stats.tx_aborted_errors += in intr_handler()
1560 dev->stats.tx_window_errors += in intr_handler()
1562 dev->stats.collisions += (data & 0x0000ffff); in intr_handler()
1565 if (--boguscnt < 0) { in intr_handler()
1567 "status=0x%4.4x.\n", dev->name, intr_status); in intr_handler()
1568 if (!np->reset_timer_armed) { in intr_handler()
1569 np->reset_timer_armed = 1; in intr_handler()
1570 np->reset_timer.expires = RUN_AT(HZ/2); in intr_handler()
1571 add_timer(&np->reset_timer); in intr_handler()
1576 np->crvalue_sv = np->crvalue; in intr_handler()
1577 np->imrvalue_sv = np->imrvalue; in intr_handler()
1578 np->crvalue &= ~(CR_W_TXEN | CR_W_RXEN); /* or simply = 0? */ in intr_handler()
1579 np->imrvalue = 0; in intr_handler()
1588 dev->stats.rx_missed_errors += ioread32(ioaddr + TALLY) & 0x7fff; in intr_handler()
1591 dev->stats.rx_crc_errors += in intr_handler()
1596 dev->name, ioread32(ioaddr + ISR)); in intr_handler()
1598 iowrite32(np->imrvalue, ioaddr + IMR); in intr_handler()
1600 spin_unlock(&np->lock); in intr_handler()
1611 void __iomem *ioaddr = np->mem; in netdev_rx()
1614 while (!(np->cur_rx->status & RXOWN) && np->cur_rx->skbuff) { in netdev_rx()
1615 s32 rx_status = np->cur_rx->status; in netdev_rx()
1617 if (np->really_rx_count == 0) in netdev_rx()
1629 dev->name, rx_status); in netdev_rx()
1631 dev->stats.rx_errors++; /* end of a packet. */ in netdev_rx()
1633 dev->stats.rx_length_errors++; in netdev_rx()
1635 dev->stats.rx_frame_errors++; in netdev_rx()
1637 dev->stats.rx_crc_errors++; in netdev_rx()
1642 if (rx_status & RXFSD) { /* this pkt is too long, over one rx buffer */ in netdev_rx()
1646 cur = np->cur_rx; in netdev_rx()
1647 while (desno <= np->really_rx_count) { in netdev_rx()
1649 if ((!(cur->status & RXOWN)) && in netdev_rx()
1650 (cur->status & RXLSD)) in netdev_rx()
1653 cur = cur->next_desc_logical; in netdev_rx()
1655 if (desno > np->really_rx_count) in netdev_rx()
1663 dev->stats.rx_length_errors++; in netdev_rx()
1667 if (!np->cur_rx->skbuff) { in netdev_rx()
1669 "%s: I'm scared\n", dev->name); in netdev_rx()
1672 np->cur_rx->status = RXOWN; in netdev_rx()
1673 np->cur_rx = np->cur_rx->next_desc_logical; in netdev_rx()
1677 stop_nic_rx(ioaddr, np->crvalue); in netdev_rx()
1679 iowrite32(np->crvalue, ioaddr + TCRRCR); in netdev_rx()
1687 short pkt_len = ((rx_status & FLNGMASK) >> FLNGShift) - 4; in netdev_rx()
1696 to a minimally-sized skbuff. */ in netdev_rx()
1700 dma_sync_single_for_cpu(&np->pci_dev->dev, in netdev_rx()
1701 np->cur_rx->buffer, in netdev_rx()
1702 np->rx_buf_sz, in netdev_rx()
1708 np->cur_rx->skbuff->data, pkt_len); in netdev_rx()
1711 skb_put_data(skb, np->cur_rx->skbuff->data, in netdev_rx()
1714 dma_sync_single_for_device(&np->pci_dev->dev, in netdev_rx()
1715 np->cur_rx->buffer, in netdev_rx()
1716 np->rx_buf_sz, in netdev_rx()
1719 dma_unmap_single(&np->pci_dev->dev, in netdev_rx()
1720 np->cur_rx->buffer, in netdev_rx()
1721 np->rx_buf_sz, in netdev_rx()
1723 skb_put(skb = np->cur_rx->skbuff, pkt_len); in netdev_rx()
1724 np->cur_rx->skbuff = NULL; in netdev_rx()
1725 --np->really_rx_count; in netdev_rx()
1727 skb->protocol = eth_type_trans(skb, dev); in netdev_rx()
1729 dev->stats.rx_packets++; in netdev_rx()
1730 dev->stats.rx_bytes += pkt_len; in netdev_rx()
1733 np->cur_rx = np->cur_rx->next_desc_logical; in netdev_rx()
1746 void __iomem *ioaddr = np->mem; in get_stats()
1750 dev->stats.rx_missed_errors += in get_stats()
1752 dev->stats.rx_crc_errors += in get_stats()
1756 return &dev->stats; in get_stats()
1760 /* for dev->set_multicast_list */
1763 spinlock_t *lp = &((struct netdev_private *)netdev_priv(dev))->lock; in set_rx_mode()
1775 void __iomem *ioaddr = np->mem; in __set_rx_mode()
1779 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */ in __set_rx_mode()
1783 (dev->flags & IFF_ALLMULTI)) { in __set_rx_mode()
1793 bit = (ether_crc(ETH_ALEN, ha->addr) >> 26) ^ 0x3F; in __set_rx_mode()
1799 stop_nic_rxtx(ioaddr, np->crvalue); in __set_rx_mode()
1803 np->crvalue &= ~CR_W_RXMODEMASK; in __set_rx_mode()
1804 np->crvalue |= rx_mode; in __set_rx_mode()
1805 iowrite32(np->crvalue, ioaddr + TCRRCR); in __set_rx_mode()
1812 strscpy(info->driver, DRV_NAME, sizeof(info->driver)); in netdev_get_drvinfo()
1813 strscpy(info->bus_info, pci_name(np->pci_dev), sizeof(info->bus_info)); in netdev_get_drvinfo()
1821 spin_lock_irq(&np->lock); in netdev_get_link_ksettings()
1822 mii_ethtool_get_link_ksettings(&np->mii, cmd); in netdev_get_link_ksettings()
1823 spin_unlock_irq(&np->lock); in netdev_get_link_ksettings()
1834 spin_lock_irq(&np->lock); in netdev_set_link_ksettings()
1835 rc = mii_ethtool_set_link_ksettings(&np->mii, cmd); in netdev_set_link_ksettings()
1836 spin_unlock_irq(&np->lock); in netdev_set_link_ksettings()
1844 return mii_nway_restart(&np->mii); in netdev_nway_reset()
1850 return mii_link_ok(&np->mii); in netdev_get_link()
1879 return -EINVAL; in mii_ioctl()
1881 spin_lock_irq(&np->lock); in mii_ioctl()
1882 rc = generic_mii_ioctl(&np->mii, if_mii(rq), cmd, NULL); in mii_ioctl()
1883 spin_unlock_irq(&np->lock); in mii_ioctl()
1892 void __iomem *ioaddr = np->mem; in netdev_close()
1903 del_timer_sync(&np->timer); in netdev_close()
1904 del_timer_sync(&np->reset_timer); in netdev_close()
1906 free_irq(np->pci_dev->irq, dev); in netdev_close()
1910 struct sk_buff *skb = np->rx_ring[i].skbuff; in netdev_close()
1912 np->rx_ring[i].status = 0; in netdev_close()
1914 dma_unmap_single(&np->pci_dev->dev, in netdev_close()
1915 np->rx_ring[i].buffer, np->rx_buf_sz, in netdev_close()
1918 np->rx_ring[i].skbuff = NULL; in netdev_close()
1923 struct sk_buff *skb = np->tx_ring[i].skbuff; in netdev_close()
1926 dma_unmap_single(&np->pci_dev->dev, in netdev_close()
1927 np->tx_ring[i].buffer, skb->len, in netdev_close()
1930 np->tx_ring[i].skbuff = NULL; in netdev_close()