Lines Matching refs:ge_mac_cfg_0_value
294 u32 ge_mac_cfg_0_value = 0, buf_int_enable_value = 0; in nps_enet_hw_enable_control() local
332 ge_mac_cfg_0_value |= NPS_ENET_ENABLE << CFG_0_TX_PAD_EN_SHIFT; in nps_enet_hw_enable_control()
333 ge_mac_cfg_0_value |= NPS_ENET_ENABLE << CFG_0_TX_CRC_EN_SHIFT; in nps_enet_hw_enable_control()
334 ge_mac_cfg_0_value |= NPS_ENET_ENABLE << CFG_0_RX_CRC_STRIP_SHIFT; in nps_enet_hw_enable_control()
337 ge_mac_cfg_0_value |= in nps_enet_hw_enable_control()
339 ge_mac_cfg_0_value |= in nps_enet_hw_enable_control()
343 ge_mac_cfg_0_value |= NPS_ENET_ENABLE << CFG_0_RX_PR_CHECK_EN_SHIFT; in nps_enet_hw_enable_control()
344 ge_mac_cfg_0_value |= in nps_enet_hw_enable_control()
348 ge_mac_cfg_0_value |= NPS_ENET_ENABLE << CFG_0_TX_FC_EN_SHIFT; in nps_enet_hw_enable_control()
349 ge_mac_cfg_0_value |= NPS_ENET_ENABLE << CFG_0_RX_FC_EN_SHIFT; in nps_enet_hw_enable_control()
350 ge_mac_cfg_0_value |= in nps_enet_hw_enable_control()
356 ge_mac_cfg_0_value |= NPS_ENET_ENABLE << CFG_0_RX_EN_SHIFT; in nps_enet_hw_enable_control()
357 ge_mac_cfg_0_value |= NPS_ENET_ENABLE << CFG_0_TX_EN_SHIFT; in nps_enet_hw_enable_control()
362 ge_mac_cfg_0_value); in nps_enet_hw_enable_control()