Lines Matching +full:0 +full:x1e00
29 {"Asante", 0, 0, 0x94, {0x1e00, 0x0000, 0x0800, 0x0100, 0x018c,
30 0x0000, 0x0000, 0xe078, 0x0001, 0x0050, 0x0018 }},
31 {"SMC9332DST", 0, 0, 0xC0, { 0x1e00, 0x0000, 0x0800, 0x041f,
32 0x0000, 0x009E, /* 10baseT */
33 0x0004, 0x009E, /* 10baseT-FD */
34 0x0903, 0x006D, /* 100baseTx */
35 0x0905, 0x006D, /* 100baseTx-FD */ }},
36 {"Cogent EM100", 0, 0, 0x92, { 0x1e00, 0x0000, 0x0800, 0x063f,
37 0x0107, 0x8021, /* 100baseFx */
38 0x0108, 0x8021, /* 100baseFx-FD */
39 0x0100, 0x009E, /* 10baseT */
40 0x0104, 0x009E, /* 10baseT-FD */
41 0x0103, 0x006D, /* 100baseTx */
42 0x0105, 0x006D, /* 100baseTx-FD */ }},
43 {"Maxtech NX-110", 0, 0, 0xE8, { 0x1e00, 0x0000, 0x0800, 0x0513,
44 0x1001, 0x009E, /* 10base2, CSR12 0x10*/
45 0x0000, 0x009E, /* 10baseT */
46 0x0004, 0x009E, /* 10baseT-FD */
47 0x0303, 0x006D, /* 100baseTx, CSR12 0x03 */
48 0x0305, 0x006D, /* 100baseTx-FD CSR12 0x03 */}},
49 {"Accton EN1207", 0, 0, 0xE8, { 0x1e00, 0x0000, 0x0800, 0x051F,
50 0x1B01, 0x0000, /* 10base2, CSR12 0x1B */
51 0x0B00, 0x009E, /* 10baseT, CSR12 0x0B */
52 0x0B04, 0x009E, /* 10baseT-FD,CSR12 0x0B */
53 0x1B03, 0x006D, /* 100baseTx, CSR12 0x1B */
54 0x1B05, 0x006D, /* 100baseTx-FD CSR12 0x1B */
56 {"NetWinder", 0x00, 0x10, 0x57,
58 * MII block, reset sequence (3) = 0x0821 0x0000 0x0001, capabilities 0x01e1
60 { 0x1e00, 0x0000, 0x000b, 0x8f01, 0x0103, 0x0300, 0x0821, 0x000, 0x0001, 0x0000, 0x01e1 }
62 {"Cobalt Microserver", 0, 0x10, 0xE0, {0x1e00, /* 0 == controller #, 1e == offset */
63 0x0000, /* 0 == high offset, 0 == gap */
64 0x0800, /* Default Autoselect */
65 0x8001, /* 1 leaf, extended type, bogus len */
66 0x0003, /* Type 3 (MII), PHY #0 */
67 0x0400, /* 0 init instr, 4 reset instr */
68 0x0801, /* Set control mode, GP0 output */
69 0x0000, /* Drive GP0 Low (RST is active low) */
70 0x0800, /* control mode, GP0 input (undriven) */
71 0x0000, /* clear control mode */
72 0x7800, /* 100TX FDX + HDX, 10bT FDX + HDX */
73 0x01e0, /* Advertise all above */
74 0x5000, /* FDX all above */
75 0x1800, /* Set fast TTM in 100bt modes */
76 0x0000, /* PHY cannot be unplugged */
109 { 0x01, /* phy number */ in tulip_build_fake_mediatable()
110 0x02, /* gpr setup sequence length */ in tulip_build_fake_mediatable()
111 0x02, 0x00, /* gpr setup sequence */ in tulip_build_fake_mediatable()
112 0x02, /* phy reset sequence length */ in tulip_build_fake_mediatable()
113 0x01, 0x00, /* phy reset sequence */ in tulip_build_fake_mediatable()
114 0x00, 0x78, /* media capabilities */ in tulip_build_fake_mediatable()
115 0x00, 0xe0, /* nway advertisement */ in tulip_build_fake_mediatable()
116 0x00, 0x05, /* fdx bit map */ in tulip_build_fake_mediatable()
117 0x00, 0x06 /* ttm bit map */ in tulip_build_fake_mediatable()
126 tp->mtable->defaultmedia = 0x800; in tulip_build_fake_mediatable()
128 tp->mtable->csr12dir = 0x3f; /* inputs on bit7 for hsc-pci, bit6 for pci-fx */ in tulip_build_fake_mediatable()
129 tp->mtable->has_nonmii = 0; in tulip_build_fake_mediatable()
130 tp->mtable->has_reset = 0; in tulip_build_fake_mediatable()
132 tp->mtable->csr15dir = tp->mtable->csr15val = 0; in tulip_build_fake_mediatable()
133 tp->mtable->mleaf[0].type = 1; in tulip_build_fake_mediatable()
134 tp->mtable->mleaf[0].media = 11; in tulip_build_fake_mediatable()
135 tp->mtable->mleaf[0].leafdata = &leafdata[0]; in tulip_build_fake_mediatable()
161 for (i = 0; i < 8; i ++) in tulip_parse_eeprom()
165 if (ee_data[0] == 0xff) { in tulip_parse_eeprom()
179 for (i = 0; eeprom_fixups[i].name; i++) { in tulip_parse_eeprom()
180 if (dev->dev_addr[0] == eeprom_fixups[i].addr0 && in tulip_parse_eeprom()
183 if (dev->dev_addr[2] == 0xE8 && ee_data[0x1a] == 0x55) in tulip_parse_eeprom()
199 controller_index = 0; in tulip_parse_eeprom()
205 if (ee_data[27] == 0) { /* No valid media table. */ in tulip_parse_eeprom()
209 unsigned char csr12dir = 0; in tulip_parse_eeprom()
210 int count, new_advertise = 0; in tulip_parse_eeprom()
220 if (count == 0) { in tulip_parse_eeprom()
221 if (tulip_debug > 0) in tulip_parse_eeprom()
235 mtable->has_nonmii = mtable->has_mii = mtable->has_reset = 0; in tulip_parse_eeprom()
236 mtable->csr15dir = mtable->csr15val = 0; in tulip_parse_eeprom()
240 media & 0x0800 ? "Autosense" in tulip_parse_eeprom()
242 for (i = 0; i < count; i++) { in tulip_parse_eeprom()
245 if ((p[0] & 0x80) == 0) { /* 21140 Compact block. */ in tulip_parse_eeprom()
246 leaf->type = 0; in tulip_parse_eeprom()
247 leaf->media = p[0] & 0x3f; in tulip_parse_eeprom()
249 if ((p[2] & 0x61) == 0x01) /* Bogus, but Znyx boards do it. */ in tulip_parse_eeprom()
254 if (p[1] == 0x05) { in tulip_parse_eeprom()
256 leaf->media = p[2] & 0x0f; in tulip_parse_eeprom()
257 } else if (tp->chip_id == DM910X && p[1] == 0x80) { in tulip_parse_eeprom()
263 p += (p[0] & 0x3f) + 1; in tulip_parse_eeprom()
280 case 0: new_advertise |= 0x0020; break; in tulip_parse_eeprom()
281 case 4: new_advertise |= 0x0040; break; in tulip_parse_eeprom()
282 case 3: new_advertise |= 0x0080; break; in tulip_parse_eeprom()
283 case 5: new_advertise |= 0x0100; break; in tulip_parse_eeprom()
284 case 6: new_advertise |= 0x0200; break; in tulip_parse_eeprom()
286 if (p[1] == 2 && leaf->media == 0) { in tulip_parse_eeprom()
287 if (p[2] & 0x40) { in tulip_parse_eeprom()
300 p += (p[0] & 0x3f) + 1; in tulip_parse_eeprom()
306 bp[0], bp[1], bp[2 + bp[1]*2], in tulip_parse_eeprom()
323 #define EE_SHIFT_CLK 0x02 /* EEPROM shift clock. */
324 #define EE_CS 0x01 /* EEPROM chip select. */
325 #define EE_DATA_WRITE 0x04 /* Data from the Tulip to EEPROM. */
326 #define EE_WRITE_0 0x01
327 #define EE_WRITE_1 0x05
328 #define EE_DATA_READ 0x08 /* Data from the EEPROM chip. */
329 #define EE_ENB (0x4800 | EE_CS)
343 unsigned retval = 0; in tulip_read_eeprom()
352 return 0; in tulip_read_eeprom()
358 for (i = 4 + addr_len; i >= 0; i--) { in tulip_read_eeprom()
359 short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0; in tulip_read_eeprom()
364 retval = (retval << 1) | ((ioread32(ee_addr) & EE_DATA_READ) ? 1 : 0); in tulip_read_eeprom()
369 for (i = 16; i > 0; i--) { in tulip_read_eeprom()
372 retval = (retval << 1) | ((ioread32(ee_addr) & EE_DATA_READ) ? 1 : 0); in tulip_read_eeprom()