ethernet/cadence/macb.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
5  * Copyright (C) 2004-2006 Atmel Corporation
113 #define GEM_TX65CNT		0x011c /* 65-127 byte Frames TX counter */
114 #define GEM_TX128CNT		0x0120 /* 128-255 byte Frames TX counter */
115 #define GEM_TX256CNT		0x0124 /* 256-511 byte Frames TX counter */
116 #define GEM_TX512CNT		0x0128 /* 512-1023 byte Frames TX counter */
117 #define GEM_TX1024CNT		0x012c /* 1024-1518 byte Frames TX counter */
134 #define GEM_RX65CNT		0x016c /* 65-127 byte Frames RX Counter */
135 #define GEM_RX128CNT		0x0170 /* 128-255 byte Frames RX Counter */
136 #define GEM_RX256CNT		0x0174 /* 256-511 byte Frames RX Counter */
137 #define GEM_RX512CNT		0x0178 /* 512-1023 byte Frames RX Counter */
138 #define GEM_RX1024CNT		0x017c /* 1024-1518 byte Frames RX Counter */
152 #define GEM_TISUBN		0x01bc /* 1588 Timer Increment Sub-ns */
210 /* Which screening type 2 EtherType register will be used (0 - 7) */
223 /* Bitfields in NCR */
258 /* Bitfields in NCFGR */
263 #define MACB_BIT_RATE_OFFSET	2 /* Discard non-VLAN frames */
326 /* Bitfields in DMACFG. */
347 #define GEM_ADDR64_OFFSET	30 /* Address bus width - 64b or 32b */
351 /* Bitfields in PBUFRXCUT */
355 /* Bitfields in NSR */
363 /* Bitfields in TSR */
381 /* Bitfields in RSR */
389 /* Bitfields in ISR/IER/IDR/IMR */
418 #define MACB_WOL_OFFSET		14 /* Enable wake-on-lan interrupt */
438 #define GEM_WOL_OFFSET		28 /* Enable wake-on-lan interrupt */
449 /* Bitfields in MAN */
463 /* Bitfields in USRIO (AVR32) */
473 /* Bitfields in USRIO (AT91) */
481 /* Bitfields in WOL */
493 /* Bitfields in MID */
499 /* Bitfield in HS_MAC_CONFIG */
503 /* Bitfields in PCSCNTRL */
507 /* Bitfields in DCFG1. */
515 /* Bitfields in DCFG2. */
524 /* Bitfields in DCFG5. */
528 /* Bitfields in DCFG6. */
536 /* Bitfields in DCFG8. */
546 /* Bitfields in DCFG10 */
552 /* Bitfields in DCFG12. */
556 /* Bitfields in USX_CONTROL. */
570 /* Bitfields in USX_STATUS. */
574 /* Bitfields in TISUBN */
582 /* Bitfields in TI */
586 /* Bitfields in TSH */
590 /* Bitfields in TSL */
594 /* Bitfields in TN */
598 /* Bitfields in TXBDCTRL */
602 /* Bitfields in RXBDCTRL */
606 /* Bitfields in SCRT2 */
617 #define GEM_CMPA_OFFSET				13 /* Compare A - Index to screener type 2 Compare register */
621 #define GEM_CMPB_OFFSET				19 /* Compare B - Index to screener type 2 Compare register */
625 #define GEM_CMPC_OFFSET				25 /* Compare C - Index to screener type 2 Compare register */
630 /* Bitfields in ETHT */
634 /* Bitfields in T2CMPW0 */
640 /* Bitfields in T2CMPW1 */
651  * of 12 bytes from this would be the source IP address in an IP header
667 #define GEM_DMA_TXVALID_OFFSET		23 /* timestamp has been captured in the Buffer Descriptor */
671 #define GEM_DMA_RXVALID_OFFSET		2 /* indicates a valid timestamp in the Buffer Descriptor */
682 /* New hardware supports 12 bit precision of timestamp in DMA buffer descriptor.
690 #define GEM_DMA_SEC_MASK			(GEM_DMA_SEC_TOP - 1)
692 /* Bitfields in ADJ */
753 	(((value) & ((1 << MACB_##name##_SIZE) - 1))	\
757 	 & ((1 << MACB_##name##_SIZE) - 1))
759 	(((old) & ~(((1 << MACB_##name##_SIZE) - 1)	\
766 	(((value) & ((1 << GEM_##name##_SIZE) - 1))	\
770 	 & ((1 << GEM_##name##_SIZE) - 1))
772 	(((old) & ~(((1 << GEM_##name##_SIZE) - 1)	\
777 #define macb_readl(port, reg)		(port)->macb_reg_readl((port), MACB_##reg)
778 #define macb_writel(port, reg, value)	(port)->macb_reg_writel((port), MACB_##reg, (value))
779 #define gem_readl(port, reg)		(port)->macb_reg_readl((port), GEM_##reg)
780 #define gem_writel(port, reg, value)	(port)->macb_reg_writel((port), GEM_##reg, (value))
781 #define queue_readl(queue, reg)		(queue)->bp->macb_reg_readl((queue)->bp, (queue)->reg)
782 #define queue_writel(queue, reg, value)	(queue)->bp->macb_reg_writel((queue)->bp, (queue)->reg, (va…
783 #define gem_readl_n(port, reg, idx)		(port)->macb_reg_readl((port), GEM_##reg + idx * 4)
784 #define gem_writel_n(port, reg, idx, value)	(port)->macb_reg_writel((port), GEM_##reg + idx * 4, (v…
811 /* struct macb_dma_desc - Hardware DMA descriptor
883 /* RX checksum offload disabled: bit 24 clear in NCFGR */
887 /* RX checksum offload enabled: bit 24 set in NCFGR */
929 /* struct macb_tx_skb - data about an skb which is being transmitted
944 /* Hardware-collected statistics. Used when updating the network
1020  * returned by `ethtool -S`. Also describes which net_device_stats statistics
1159 /* MACB-PTP interface: adapt to platform needs. */
1180 	u32 rmii;  member
1182 	u32 refclk;  member
1307 	struct macb_ptp_info	*ptp_info;	/* macb-ptp interface */
1339 #define TSU_SEC_MAX_VAL (((u64)1 << GEM_TSEC_SIZE) - 1)
1340 #define TSU_NSEC_MAX_VAL ((1 << GEM_TN_SIZE) - 1)
1355 	if (bp->tstamp_config.tx_type == TSTAMP_DISABLED)  in gem_ptp_do_txstamp()
1363 	if (bp->tstamp_config.rx_filter == TSTAMP_DISABLED)  in gem_ptp_do_rxstamp()
1380 	return !!(bp->caps & MACB_CAPS_MACB_IS_GEM);  in macb_is_gem()
1385 	return IS_ENABLED(CONFIG_MACB_USE_HWSTAMP) && (bp->caps & MACB_CAPS_GEM_HAS_PTP);  in gem_has_ptp()
1389  * struct macb_platform_data - platform data for MACB Ethernet used for PCI registration