Lines Matching refs:tg3_flag
92 #define tg3_flag(tp, flag) \ macro
131 (tg3_flag(tp, JUMBO_CAPABLE) ? 9000 : 1500)
138 (tg3_flag(tp, LRG_PROD_RING_CAP) ? \
142 (tg3_flag(tp, LRG_PROD_RING_CAP) ? \
213 #define TG3_MAX_UCAST_ADDR(tp) (tg3_flag((tp), ENABLE_ASF) ? 2 : 3)
214 #define TG3_UCAST_ADDR_IDX(tp) (tg3_flag((tp), ENABLE_ASF) ? 2 : 1)
567 if (tg3_flag(tp, PCIX_TARGET_HWBUG) || tg3_flag(tp, ICH_WORKAROUND)) in _tw32_flush()
587 if (tg3_flag(tp, FLUSH_POSTED_WRITES) || in tw32_mailbox_flush()
588 (!tg3_flag(tp, MBOX_WRITE_REORDER) && in tw32_mailbox_flush()
589 !tg3_flag(tp, ICH_WORKAROUND))) in tw32_mailbox_flush()
597 if (tg3_flag(tp, TXD_MBOX_HWBUG)) in tg3_write32_tx_mbox()
599 if (tg3_flag(tp, MBOX_WRITE_REORDER) || in tg3_write32_tx_mbox()
600 tg3_flag(tp, FLUSH_POSTED_WRITES)) in tg3_write32_tx_mbox()
634 if (tg3_flag(tp, SRAM_USE_CONFIG)) { in tg3_write_mem()
661 if (tg3_flag(tp, SRAM_USE_CONFIG)) { in tg3_read_mem()
713 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_lock()
774 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_unlock()
851 if (!tg3_flag(tp, APE_HAS_NCSI)) in tg3_ape_scratchpad_read()
942 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_driver_state_change()
965 tg3_flag(tp, WOL_ENABLE)) { in tg3_ape_driver_state_change()
989 if (!tg3_flag(tp, ENABLE_APE) || in tg3_send_ape_heartbeat()
1022 if (tg3_flag(tp, 1SHOT_MSI)) in tg3_enable_ints()
1029 if (!tg3_flag(tp, TAGGED_STATUS) && in tg3_enable_ints()
1045 if (!(tg3_flag(tp, USE_LINKCHG_REG) || tg3_flag(tp, POLL_SERDES))) { in tg3_has_work()
1077 if (!tg3_flag(tp, TAGGED_STATUS) && tg3_has_work(tnapi)) in tg3_int_reenable()
1087 if (tg3_flag(tp, CPMU_PRESENT) || tg3_flag(tp, 5780_CLASS)) in tg3_switch_clocks()
1098 if (tg3_flag(tp, 5705_PLUS)) { in tg3_switch_clocks()
1448 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) in tg3_mdio_config_5785()
1461 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) { in tg3_mdio_config_5785()
1462 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_config_5785()
1464 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_config_5785()
1479 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) { in tg3_mdio_config_5785()
1480 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_config_5785()
1485 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_config_5785()
1499 if (tg3_flag(tp, MDIOBUS_INITED) && in tg3_mdio_start()
1510 if (tg3_flag(tp, 5717_PLUS)) { in tg3_mdio_init()
1522 } else if (tg3_flag(tp, IS_SSB_CORE) && tg3_flag(tp, ROBOSWITCH)) { in tg3_mdio_init()
1534 if (!tg3_flag(tp, USE_PHYLIB) || tg3_flag(tp, MDIOBUS_INITED)) in tg3_mdio_init()
1606 if (tg3_flag(tp, MDIOBUS_INITED)) { in tg3_mdio_fini()
1697 if (!tg3_flag(tp, 5780_CLASS) || !tg3_flag(tp, ENABLE_ASF)) in tg3_ump_link_report()
1717 if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) { in tg3_stop_fw()
1736 if (tg3_flag(tp, ASF_NEW_HANDSHAKE)) { in tg3_write_sig_pre_reset()
1762 if (tg3_flag(tp, ASF_NEW_HANDSHAKE)) { in tg3_write_sig_post_reset()
1783 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_write_sig_legacy()
1811 if (tg3_flag(tp, NO_FWARE_REPORTED)) in tg3_poll_fw()
1814 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_poll_fw()
1838 if (!tg3_flag(tp, NO_FWARE_REPORTED)) { in tg3_poll_fw()
1854 if (i >= 100000 && !tg3_flag(tp, NO_FWARE_REPORTED)) { in tg3_poll_fw()
1967 if (tg3_flag(tp, USE_PHYLIB)) in tg3_setup_flow_control()
1972 if (autoneg == AUTONEG_ENABLE && tg3_flag(tp, PAUSE_AUTONEG)) { in tg3_setup_flow_control()
2222 if (!tg3_flag(tp, 5705_PLUS) || in tg3_phy_toggle_apd()
2223 (tg3_flag(tp, 5717_PLUS) && in tg3_phy_toggle_apd()
2253 if (!tg3_flag(tp, 5705_PLUS) || in tg3_phy_toggle_automdix()
2428 tg3_flag(tp, 57765_CLASS)) && in tg3_phy_eee_enable()
2620 if (tg3_flag(tp, ENABLE_ASF)) in tg3_warn_mgmt_link_flap()
2688 if (tg3_flag(tp, 5717_PLUS) && in tg3_phy_reset()
2738 } else if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_phy_reset()
2750 if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_phy_reset()
2810 if (!tg3_flag(tp, IS_NIC)) in tg3_pwrsrc_switch_to_vmain()
2837 if (!tg3_flag(tp, IS_NIC) || in tg3_pwrsrc_die_with_vmain()
2859 if (!tg3_flag(tp, IS_NIC)) in tg3_pwrsrc_switch_to_vaux()
2942 if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE) || wol_enable) in tg3_frob_aux_power_5717()
2964 if (!tg3_flag(tp, IS_NIC) || tg3_flag(tp, 57765_CLASS)) in tg3_frob_aux_power()
2971 tg3_flag(tp, WOL_ENABLE) != 0 : 0); in tg3_frob_aux_power()
2984 if (tg3_flag(tp_peer, INIT_COMPLETE)) in tg3_frob_aux_power()
2987 if ((include_wol && tg3_flag(tp_peer, WOL_ENABLE)) || in tg3_frob_aux_power()
2988 tg3_flag(tp_peer, ENABLE_ASF)) in tg3_frob_aux_power()
2993 if ((include_wol && tg3_flag(tp, WOL_ENABLE)) || in tg3_frob_aux_power()
2994 tg3_flag(tp, ENABLE_ASF)) in tg3_frob_aux_power()
3132 if (tg3_flag(tp, NVRAM)) { in tg3_nvram_lock()
3155 if (tg3_flag(tp, NVRAM)) { in tg3_nvram_unlock()
3166 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) { in tg3_enable_nvram_access()
3176 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) { in tg3_disable_nvram_access()
3246 if (tg3_flag(tp, NVRAM) && in tg3_nvram_phys_addr()
3247 tg3_flag(tp, NVRAM_BUFFERED) && in tg3_nvram_phys_addr()
3248 tg3_flag(tp, FLASH) && in tg3_nvram_phys_addr()
3249 !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) && in tg3_nvram_phys_addr()
3261 if (tg3_flag(tp, NVRAM) && in tg3_nvram_logical_addr()
3262 tg3_flag(tp, NVRAM_BUFFERED) && in tg3_nvram_logical_addr()
3263 tg3_flag(tp, FLASH) && in tg3_nvram_logical_addr()
3264 !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) && in tg3_nvram_logical_addr()
3284 if (!tg3_flag(tp, NVRAM)) in tg3_nvram_read()
3498 !tg3_flag(tp, FLASH) || in tg3_nvram_write_block_buffered()
3499 !tg3_flag(tp, 57765_PLUS)) in tg3_nvram_write_block_buffered()
3503 !tg3_flag(tp, 5755_PLUS) && in tg3_nvram_write_block_buffered()
3513 if (!tg3_flag(tp, FLASH)) { in tg3_nvram_write_block_buffered()
3530 if (tg3_flag(tp, EEPROM_WRITE_PROT)) { in tg3_nvram_write_block()
3536 if (!tg3_flag(tp, NVRAM)) { in tg3_nvram_write_block()
3546 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) in tg3_nvram_write_block()
3552 if (tg3_flag(tp, NVRAM_BUFFERED) || !tg3_flag(tp, FLASH)) { in tg3_nvram_write_block()
3567 if (tg3_flag(tp, EEPROM_WRITE_PROT)) { in tg3_nvram_write_block()
3634 BUG_ON(cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)); in tg3_halt_cpu()
3649 if (tg3_flag(tp, IS_SSB_CORE)) in tg3_halt_cpu()
3662 if (tg3_flag(tp, NVRAM)) in tg3_halt_cpu()
3703 if (cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)) { in tg3_load_firmware_cpu()
3710 if (tg3_flag(tp, 5705_PLUS) && tg3_asic_rev(tp) != ASIC_REV_57766) in tg3_load_firmware_cpu()
3859 if (!tg3_flag(tp, NO_NVRAM)) in tg3_load_57766_firmware()
3902 if (!tg3_flag(tp, FW_TSO)) in tg3_load_tso_firmware()
4030 if (tg3_flag(tp, CLKREQ_BUG)) in tg3_power_down_prepare()
4039 tg3_flag(tp, WOL_ENABLE); in tg3_power_down_prepare()
4041 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_power_down_prepare()
4068 if (tg3_flag(tp, ENABLE_ASF) || device_should_wake) { in tg3_power_down_prepare()
4069 if (tg3_flag(tp, WOL_SPEED_100MB)) { in tg3_power_down_prepare()
4109 } else if (!tg3_flag(tp, ENABLE_ASF)) { in tg3_power_down_prepare()
4120 if (tg3_flag(tp, WOL_CAP)) in tg3_power_down_prepare()
4153 u32 speed = tg3_flag(tp, WOL_SPEED_100MB) ? in tg3_power_down_prepare()
4164 if (!tg3_flag(tp, 5750_PLUS)) in tg3_power_down_prepare()
4168 if ((tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS)) && in tg3_power_down_prepare()
4169 (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE))) in tg3_power_down_prepare()
4172 if (tg3_flag(tp, ENABLE_APE)) in tg3_power_down_prepare()
4184 if (!tg3_flag(tp, WOL_SPEED_100MB) && in tg3_power_down_prepare()
4195 } else if (tg3_flag(tp, 5780_CLASS) || in tg3_power_down_prepare()
4196 tg3_flag(tp, CPMU_PRESENT) || in tg3_power_down_prepare()
4199 } else if (!(tg3_flag(tp, 5750_PLUS) && tg3_flag(tp, ENABLE_ASF))) { in tg3_power_down_prepare()
4208 } else if (tg3_flag(tp, 5705_PLUS)) { in tg3_power_down_prepare()
4222 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_power_down_prepare()
4239 if (!(device_should_wake) && !tg3_flag(tp, ENABLE_ASF)) in tg3_power_down_prepare()
4245 if ((!tg3_flag(tp, IS_SSB_CORE)) && in tg3_power_down_prepare()
4252 if (!tg3_flag(tp, ENABLE_ASF)) { in tg3_power_down_prepare()
4271 pci_wake_from_d3(tp->pdev, tg3_flag(tp, WOL_ENABLE)); in tg3_power_down()
4416 if (tg3_flag(tp, WOL_SPEED_100MB)) in tg3_phy_copper_begin()
4760 if (tg3_flag(tp, ENABLE_APE)) in tg3_setup_eee()
4811 !tg3_flag(tp, INIT_COMPLETE)) in tg3_setup_copper_phy()
4975 if (tg3_flag(tp, ROBOSWITCH)) { in tg3_setup_copper_phy()
5005 if (tg3_flag(tp, RGMII_MODE)) { in tg3_setup_copper_phy()
5049 if (tg3_flag(tp, USE_LINKCHG_REG)) { in tg3_setup_copper_phy()
5060 (tg3_flag(tp, PCIX_MODE) || tg3_flag(tp, PCI_HIGH_SPEED))) { in tg3_setup_copper_phy()
5072 if (tg3_flag(tp, CLKREQ_BUG)) { in tg3_setup_copper_phy()
5454 if (tg3_flag(tp, INIT_COMPLETE) && in tg3_init_bcm8002()
5720 if (!tg3_flag(tp, HW_AUTONEG) && in tg3_setup_fiber_phy()
5722 tg3_flag(tp, INIT_COMPLETE)) { in tg3_setup_fiber_phy()
5753 if (tg3_flag(tp, HW_AUTONEG)) in tg3_setup_fiber_phy()
5975 } else if (!tg3_flag(tp, 5780_CLASS)) { in tg3_setup_fiber_mii_phy()
6107 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_setup_phy()
6116 if (tg3_flag(tp, ASPM_WORKAROUND)) { in tg3_setup_phy()
6163 if (tg3_flag(tp, PTP_CAPABLE)) { in tg3_get_ts_info()
6344 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_ptp_init()
6356 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_ptp_resume()
6365 if (!tg3_flag(tp, PTP_CAPABLE) || !tp->ptp_clock) in tg3_ptp_fini()
6409 if (tg3_flag(tp, SUPPORT_MSIX)) in tg3_dump_legacy_regs()
6421 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_dump_legacy_regs()
6433 if (tg3_flag(tp, NVRAM)) in tg3_dump_legacy_regs()
6454 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_dump_state()
6509 BUG_ON(tg3_flag(tp, MBOX_WRITE_REORDER) || in tg3_tx_recover()
6542 if (tg3_flag(tp, ENABLE_TSS)) in tg3_tx()
6978 if (!tg3_flag(tp, ENABLE_RSS)) { in tg3_rx()
7015 if (!(tg3_flag(tp, USE_LINKCHG_REG) || tg3_flag(tp, POLL_SERDES))) { in tg3_poll_link()
7022 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_poll_link()
7169 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll_work()
7183 if (tg3_flag(tp, ENABLE_RSS) && tnapi == &tp->napi[1]) { in tg3_poll_work()
7234 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll_msix()
7289 if (tg3_flag(tp, ERROR_PROCESSED)) in tg3_process_error()
7333 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll()
7339 if (tg3_flag(tp, TAGGED_STATUS)) { in tg3_poll()
7520 if (tg3_flag(tp, CHIP_RESETTING) || in tg3_interrupt()
7569 if (tg3_flag(tp, CHIP_RESETTING) || in tg3_interrupt_tagged()
7676 if (tg3_flag(tp, 40BIT_DMA_BUG)) in tg3_40bit_overflow_test()
7701 if (tg3_flag(tp, SHORT_DMA_BUG) && len <= 8) in tg3_tx_frag_set()
7919 if (tg3_flag(tp, ENABLE_TSS)) in tg3_start_xmit()
7967 tg3_flag(tp, TSO_BUG)) { in tg3_start_xmit()
7984 if (tg3_flag(tp, HW_TSO_1) || in tg3_start_xmit()
7985 tg3_flag(tp, HW_TSO_2) || in tg3_start_xmit()
7986 tg3_flag(tp, HW_TSO_3)) { in tg3_start_xmit()
7994 if (tg3_flag(tp, HW_TSO_3)) { in tg3_start_xmit()
7999 } else if (tg3_flag(tp, HW_TSO_2)) in tg3_start_xmit()
8001 else if (tg3_flag(tp, HW_TSO_1) || in tg3_start_xmit()
8030 if (tg3_flag(tp, USE_JUMBO_BDFLAG) && in tg3_start_xmit()
8040 tg3_flag(tp, TX_TSTAMP_EN)) { in tg3_start_xmit()
8058 if (tg3_flag(tp, 5701_DMA_BUG)) in tg3_start_xmit()
8068 if (!tg3_flag(tp, HW_TSO_1) && in tg3_start_xmit()
8069 !tg3_flag(tp, HW_TSO_2) && in tg3_start_xmit()
8070 !tg3_flag(tp, HW_TSO_3)) in tg3_start_xmit()
8171 if (!tg3_flag(tp, 5705_PLUS)) in tg3_mac_loopback()
8181 if (tg3_flag(tp, 5705_PLUS) || in tg3_mac_loopback()
8253 tg3_flag(tp, 5780_CLASS)) { in tg3_phy_lpbk_set()
8315 if (dev->mtu > ETH_DATA_LEN && tg3_flag(tp, 5780_CLASS)) in tg3_fix_features()
8342 if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_rx_prodring_free()
8358 if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) { in tg3_rx_prodring_free()
8395 if (tg3_flag(tp, 5780_CLASS) && in tg3_rx_prodring_alloc()
8431 if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS)) in tg3_rx_prodring_alloc()
8436 if (!tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_rx_prodring_alloc()
8508 if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) { in tg3_rx_prodring_init()
8631 if (tg3_flag(tp, ENABLE_TSS)) in tg3_mem_tx_acquire()
8685 if (tg3_flag(tp, ENABLE_RSS)) in tg3_mem_rx_acquire()
8698 if (!i && tg3_flag(tp, ENABLE_RSS)) in tg3_mem_rx_acquire()
8776 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_alloc_consistent()
8825 if (tg3_flag(tp, 5705_PLUS)) { in tg3_stop_block()
8961 tg3_flag(tp, PCIX_MODE)) in tg3_restore_pci_state()
8964 if (tg3_flag(tp, ENABLE_APE)) in tg3_restore_pci_state()
8972 if (!tg3_flag(tp, PCI_EXPRESS)) { in tg3_restore_pci_state()
8980 if (tg3_flag(tp, PCIX_MODE)) { in tg3_restore_pci_state()
8990 if (tg3_flag(tp, 5780_CLASS)) { in tg3_restore_pci_state()
8995 if (tg3_flag(tp, USING_MSI)) { in tg3_restore_pci_state()
9081 tg3_flag(tp, 5755_PLUS)) in tg3_chip_reset()
9127 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_chip_reset()
9130 !tg3_flag(tp, 57765_PLUS) && in tg3_chip_reset()
9155 if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, CPMU_PRESENT)) in tg3_chip_reset()
9188 if (tg3_flag(tp, PCI_EXPRESS) && pci_is_pcie(tp->pdev)) { in tg3_chip_reset()
9210 if (!tg3_flag(tp, CPMU_PRESENT)) in tg3_chip_reset()
9228 if (tg3_flag(tp, 5780_CLASS)) in tg3_chip_reset()
9237 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_chip_reset()
9283 if (tg3_flag(tp, PCI_EXPRESS) && in tg3_chip_reset()
9286 !tg3_flag(tp, 57765_PLUS)) { in tg3_chip_reset()
9317 if (tg3_flag(tp, 5750_PLUS)) in tg3_chip_reset()
9386 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_set_mac_addr()
9422 if (!tg3_flag(tp, 5705_PLUS)) in tg3_set_bdinfo()
9433 if (!tg3_flag(tp, ENABLE_TSS)) { in tg3_coal_tx_init()
9466 if (!tg3_flag(tp, ENABLE_RSS)) { in tg3_coal_rx_init()
9500 if (!tg3_flag(tp, 5705_PLUS)) { in __tg3_set_coalesce()
9519 if (!tg3_flag(tp, 5705_PLUS)) in tg3_tx_rcbs_disable()
9521 else if (tg3_flag(tp, 5717_PLUS)) in tg3_tx_rcbs_disable()
9523 else if (tg3_flag(tp, 57765_CLASS) || in tg3_tx_rcbs_disable()
9541 if (tg3_flag(tp, ENABLE_TSS)) in tg3_tx_rcbs_init()
9562 if (tg3_flag(tp, 5717_PLUS)) in tg3_rx_ret_rcbs_disable()
9564 else if (!tg3_flag(tp, 5705_PLUS)) in tg3_rx_ret_rcbs_disable()
9568 tg3_flag(tp, 57765_CLASS)) in tg3_rx_ret_rcbs_disable()
9585 if (tg3_flag(tp, ENABLE_RSS)) in tg3_rx_ret_rcbs_init()
9618 if (tg3_flag(tp, SUPPORT_MSIX)) { in tg3_rings_reset()
9622 if (tg3_flag(tp, ENABLE_TSS)) in tg3_rings_reset()
9630 if (!tg3_flag(tp, ENABLE_TSS)) in tg3_rings_reset()
9640 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_rings_reset()
9675 if (!tg3_flag(tp, 5750_PLUS) || in tg3_setup_rxbd_thresholds()
9676 tg3_flag(tp, 5780_CLASS) || in tg3_setup_rxbd_thresholds()
9679 tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9693 if (tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9696 if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS)) in tg3_setup_rxbd_thresholds()
9706 if (tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9755 if (!tg3_flag(tp, ENABLE_ASF)) in __tg3_set_rx_mode()
9823 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_rss_check_indir_tbl()
9879 if (tg3_flag(tp, INIT_COMPLETE)) in tg3_reset_hw()
9938 if (tg3_flag(tp, L1PLLPD_EN)) { in tg3_reset_hw()
9952 if (tg3_flag(tp, 57765_CLASS)) { in tg3_reset_hw()
10002 if (!tg3_flag(tp, CPMU_PRESENT)) { in tg3_reset_hw()
10003 if (!tg3_flag(tp, PCI_EXPRESS)) in tg3_reset_hw()
10009 tg3_flag(tp, PCIX_MODE)) { in tg3_reset_hw()
10015 if (tg3_flag(tp, ENABLE_APE)) { in tg3_reset_hw()
10042 if (tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10047 if (!tg3_flag(tp, 57765_CLASS) && in tg3_reset_hw()
10079 if (tg3_flag(tp, PTP_CAPABLE)) in tg3_reset_hw()
10101 if (tg3_flag(tp, 5750_PLUS)) { in tg3_reset_hw()
10111 } else if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10187 if (!tg3_flag(tp, 5717_PLUS)) in tg3_reset_hw()
10192 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10200 (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS))) { in tg3_reset_hw()
10202 if (tg3_flag(tp, JUMBO_RING_ENABLE)) { in tg3_reset_hw()
10211 if (!tg3_flag(tp, USE_JUMBO_BDFLAG) || in tg3_reset_hw()
10212 tg3_flag(tp, 57765_CLASS) || in tg3_reset_hw()
10221 if (tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10236 tg3_flag(tp, JUMBO_RING_ENABLE) ? tp->rx_jumbo_pending : 0; in tg3_reset_hw()
10288 if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10291 !tg3_flag(tp, IS_5788)) { in tg3_reset_hw()
10296 if (tg3_flag(tp, PCI_EXPRESS)) in tg3_reset_hw()
10307 if (tg3_flag(tp, HW_TSO_1) || in tg3_reset_hw()
10308 tg3_flag(tp, HW_TSO_2) || in tg3_reset_hw()
10309 tg3_flag(tp, HW_TSO_3)) in tg3_reset_hw()
10312 if (tg3_flag(tp, 57765_PLUS) || in tg3_reset_hw()
10325 tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10363 if (tg3_flag(tp, 5750_PLUS)) { in tg3_reset_hw()
10368 tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10391 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_reset_hw()
10417 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10430 if (tg3_flag(tp, ENABLE_APE)) in tg3_reset_hw()
10432 if (!tg3_flag(tp, 5705_PLUS) && in tg3_reset_hw()
10445 if (!tg3_flag(tp, IS_NIC)) { in tg3_reset_hw()
10463 if (tg3_flag(tp, EEPROM_WRITE_PROT)) in tg3_reset_hw()
10470 if (tg3_flag(tp, USING_MSIX)) { in tg3_reset_hw()
10475 if (!tg3_flag(tp, 1SHOT_MSI)) in tg3_reset_hw()
10480 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_reset_hw()
10493 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_reset_hw()
10498 !tg3_flag(tp, IS_5788)) { in tg3_reset_hw()
10504 if (tg3_flag(tp, 5755_PLUS)) in tg3_reset_hw()
10513 if (tg3_flag(tp, PCIX_MODE)) { in tg3_reset_hw()
10547 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10559 if (tg3_flag(tp, LRG_PROD_RING_CAP)) in tg3_reset_hw()
10563 if (tg3_flag(tp, HW_TSO_1) || in tg3_reset_hw()
10564 tg3_flag(tp, HW_TSO_2) || in tg3_reset_hw()
10565 tg3_flag(tp, HW_TSO_3)) in tg3_reset_hw()
10568 if (tg3_flag(tp, ENABLE_TSS)) in tg3_reset_hw()
10586 if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10594 if (tg3_flag(tp, 5755_PLUS) || in tg3_reset_hw()
10608 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_reset_hw()
10620 if (tg3_flag(tp, 5755_PLUS)) in tg3_reset_hw()
10626 if (tg3_flag(tp, ENABLE_RSS)) in tg3_reset_hw()
10664 if (tg3_flag(tp, 57765_CLASS)) in tg3_reset_hw()
10687 if (!tg3_flag(tp, USE_PHYLIB)) { in tg3_reset_hw()
10716 if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS)) in tg3_reset_hw()
10720 if (tg3_flag(tp, ENABLE_ASF)) in tg3_reset_hw()
10770 if (tg3_flag(tp, ENABLE_APE)) in tg3_reset_hw()
10913 if (unlikely(tg3_flag(tp, 5719_5720_RDMA_BUG) && in tg3_periodic_fetch_stats()
10988 if (tp->irq_sync || tg3_flag(tp, RESET_TASK_PENDING)) { in tg3_timer()
10994 tg3_flag(tp, 57765_CLASS)) in tg3_timer()
10997 if (tg3_flag(tp, FLUSH_POSTED_WRITES)) { in tg3_timer()
11002 if (!tg3_flag(tp, TAGGED_STATUS)) { in tg3_timer()
11024 if (tg3_flag(tp, 5705_PLUS)) in tg3_timer()
11030 if (tg3_flag(tp, USE_LINKCHG_REG)) { in tg3_timer()
11045 } else if (tg3_flag(tp, POLL_SERDES)) { in tg3_timer()
11070 tg3_flag(tp, 5780_CLASS)) { in tg3_timer()
11072 } else if (tg3_flag(tp, POLL_CPMU_LINK)) { in tg3_timer()
11102 if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) { in tg3_timer()
11128 if (tg3_flag(tp, TAGGED_STATUS) && in tg3_timer_init()
11130 !tg3_flag(tp, 57765_CLASS)) in tg3_timer_init()
11206 if (tg3_flag(tp, TX_RECOVERY_PENDING)) { in tg3_reset_task()
11261 if (tg3_flag(tp, USING_MSI) || tg3_flag(tp, USING_MSIX)) { in tg3_request_irq()
11263 if (tg3_flag(tp, 1SHOT_MSI)) in tg3_request_irq()
11268 if (tg3_flag(tp, TAGGED_STATUS)) in tg3_request_irq()
11294 if (tg3_flag(tp, 57765_PLUS)) { in tg3_test_interrupt()
11322 if (tg3_flag(tp, 57765_PLUS) && in tg3_test_interrupt()
11340 if (tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, 1SHOT_MSI)) { in tg3_test_interrupt()
11358 if (!tg3_flag(tp, USING_MSI)) in tg3_test_msi()
11519 if ((tg3_flag(tp, SUPPORT_MSI) || tg3_flag(tp, SUPPORT_MSIX)) && in tg3_ints_init()
11520 !tg3_flag(tp, TAGGED_STATUS)) { in tg3_ints_init()
11529 if (tg3_flag(tp, SUPPORT_MSIX) && tg3_enable_msix(tp)) in tg3_ints_init()
11531 else if (tg3_flag(tp, SUPPORT_MSI) && pci_enable_msi(tp->pdev) == 0) in tg3_ints_init()
11534 if (tg3_flag(tp, USING_MSI) || tg3_flag(tp, USING_MSIX)) { in tg3_ints_init()
11536 if (tg3_flag(tp, USING_MSIX) && tp->irq_cnt > 1) in tg3_ints_init()
11538 if (!tg3_flag(tp, 1SHOT_MSI)) in tg3_ints_init()
11543 if (!tg3_flag(tp, USING_MSIX)) { in tg3_ints_init()
11558 if (tg3_flag(tp, USING_MSIX)) in tg3_ints_fini()
11560 else if (tg3_flag(tp, USING_MSI)) in tg3_ints_fini()
11621 if (test_irq && tg3_flag(tp, USING_MSI)) { in tg3_start()
11633 if (!tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, USING_MSI)) { in tg3_start()
11745 } else if (!tg3_flag(tp, TSO_CAPABLE)) { in tg3_open()
12026 if (tg3_flag(tp, NO_NVRAM)) in tg3_get_eeprom()
12036 if (tg3_flag(tp, CPMU_PRESENT)) { in tg3_get_eeprom()
12117 if (tg3_flag(tp, NO_NVRAM) || in tg3_set_eeprom()
12171 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_get_link_ksettings()
12202 if (tg3_flag(tp, PAUSE_AUTONEG)) { in tg3_get_link_ksettings()
12247 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_set_link_ksettings()
12349 if (tg3_flag(tp, WOL_CAP) && device_can_wakeup(&tp->pdev->dev)) in tg3_get_wol()
12354 if (tg3_flag(tp, WOL_ENABLE) && device_can_wakeup(&tp->pdev->dev)) in tg3_get_wol()
12367 !(tg3_flag(tp, WOL_CAP) && device_can_wakeup(dp))) in tg3_set_wol()
12405 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_nway_reset()
12436 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_get_ringparam()
12444 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_get_ringparam()
12465 (tg3_flag(tp, TSO_BUG) && in tg3_set_ringparam()
12479 if (tg3_flag(tp, MAX_RXPEND_64) && in tg3_set_ringparam()
12483 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_set_ringparam()
12514 epause->autoneg = !!tg3_flag(tp, PAUSE_AUTONEG); in tg3_get_pauseparam()
12536 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_set_pauseparam()
12637 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_get_rxnfc()
12662 if (tg3_flag(tp, SUPPORT_MSIX)) in tg3_get_rxfh_indir_size()
12703 if (!netif_running(dev) || !tg3_flag(tp, ENABLE_RSS)) in tg3_set_rxfh()
12746 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_set_channels()
12833 if (tg3_flag(tp, NO_NVRAM) || tg3_nvram_read(tp, 0, &magic)) in tg3_vpd_readblock()
12904 if (tg3_flag(tp, NO_NVRAM)) in tg3_test_nvram()
13231 if (tg3_flag(tp, 5705_PLUS)) { in tg3_test_registers()
13233 if (tg3_flag(tp, 5750_PLUS)) in tg3_test_registers()
13244 if (tg3_flag(tp, IS_5788) && in tg3_test_registers()
13367 if (tg3_flag(tp, 5717_PLUS)) in tg3_test_memory()
13369 else if (tg3_flag(tp, 57765_CLASS) || in tg3_test_memory()
13372 else if (tg3_flag(tp, 5755_PLUS)) in tg3_test_memory()
13376 else if (tg3_flag(tp, 5705_PLUS)) in tg3_test_memory()
13429 if (tg3_flag(tp, ENABLE_RSS)) in tg3_run_loopback()
13431 if (tg3_flag(tp, ENABLE_TSS)) in tg3_run_loopback()
13468 if (tg3_flag(tp, HW_TSO_1) || in tg3_run_loopback()
13469 tg3_flag(tp, HW_TSO_2) || in tg3_run_loopback()
13470 tg3_flag(tp, HW_TSO_3)) { in tg3_run_loopback()
13478 if (tg3_flag(tp, HW_TSO_3)) { in tg3_run_loopback()
13483 } else if (tg3_flag(tp, HW_TSO_2)) in tg3_run_loopback()
13485 else if (tg3_flag(tp, HW_TSO_1) || in tg3_run_loopback()
13497 if (tg3_flag(tp, USE_JUMBO_BDFLAG) && in tg3_run_loopback()
13658 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_test_loopback()
13673 !tg3_flag(tp, CPMU_PRESENT)) { in tg3_test_loopback()
13679 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13687 !tg3_flag(tp, USE_PHYLIB)) { in tg3_test_loopback()
13701 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_test_loopback()
13704 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13720 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_test_loopback()
13724 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13782 if (!tg3_flag(tp, 5705_PLUS)) in tg3_self_test()
13838 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_hwtstamp_set()
13922 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_hwtstamp_get()
13926 stmpconf.tx_type = (tg3_flag(tp, TX_TSTAMP_EN) ? in tg3_hwtstamp_get()
13984 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_ioctl()
14063 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_set_coalesce()
14202 if (!tp->hw_stats || !tg3_flag(tp, INIT_COMPLETE)) { in tg3_get_stats64()
14230 if (tg3_flag(tp, 5780_CLASS)) { in tg3_set_mtu()
14237 if (tg3_flag(tp, 5780_CLASS)) { in tg3_set_mtu()
14347 if (tg3_flag(tp, NO_NVRAM) || tg3_nvram_read(tp, 0, &val) != 0) in tg3_get_nvram_size()
14389 tg3_flag(tp, 5780_CLASS)) { in tg3_get_nvram_info()
14484 if (tg3_flag(tp, FLASH)) { in tg3_get_5752_nvram_info()
14989 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_nvram_init()
15036 tg3_flag(tp, 57765_CLASS)) in tg3_nvram_init()
15214 if (!tg3_flag(tp, 5705_PLUS)) in tg3_get_eeprom_hw_cfg()
15220 if (tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15255 if (tg3_flag(tp, 5717_PLUS) || in tg3_get_eeprom_hw_cfg()
15297 if (tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15302 tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15309 if (tg3_flag(tp, WOL_CAP) && in tg3_get_eeprom_hw_cfg()
15323 if ((tg3_flag(tp, 57765_PLUS) || in tg3_get_eeprom_hw_cfg()
15329 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_get_eeprom_hw_cfg()
15334 !tg3_flag(tp, 57765_PLUS) && in tg3_get_eeprom_hw_cfg()
15354 if (tg3_flag(tp, WOL_CAP)) in tg3_get_eeprom_hw_cfg()
15356 tg3_flag(tp, WOL_ENABLE)); in tg3_get_eeprom_hw_cfg()
15482 if (tg3_flag(tp, ENABLE_APE)) { in tg3_phy_probe()
15499 if (!tg3_flag(tp, ENABLE_ASF) && in tg3_phy_probe()
15505 if (tg3_flag(tp, USE_PHYLIB)) in tg3_phy_probe()
15512 if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE)) { in tg3_phy_probe()
15550 } else if (!tg3_flag(tp, IS_SSB_CORE)) { in tg3_phy_probe()
15591 !tg3_flag(tp, ENABLE_APE) && in tg3_phy_probe()
15592 !tg3_flag(tp, ENABLE_ASF)) { in tg3_phy_probe()
15877 if (!tg3_flag(tp, 5705_PLUS)) in tg3_read_mgmtfw_ver()
15935 if (tg3_flag(tp, APE_HAS_NCSI)) in tg3_read_dash_ver()
15985 if (tg3_flag(tp, NO_NVRAM)) { in tg3_read_fw_ver()
16001 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_read_fw_ver()
16002 if (tg3_flag(tp, ENABLE_APE)) { in tg3_read_fw_ver()
16016 if (tg3_flag(tp, LRG_PROD_RING_CAP)) in tg3_rx_ret_ring_size()
16018 else if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) in tg3_rx_ret_ring_size()
16117 if (tg3_flag(tp, 57765_CLASS) || tg3_flag(tp, 5717_PLUS) || in tg3_detect_asic_rev()
16128 tg3_flag(tp, 57765_PLUS)) in tg3_detect_asic_rev()
16138 tg3_flag(tp, 5755_PLUS) || in tg3_detect_asic_rev()
16139 tg3_flag(tp, 5780_CLASS)) in tg3_detect_asic_rev()
16143 tg3_flag(tp, 5750_PLUS)) in tg3_detect_asic_rev()
16298 if (tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16327 else if (tg3_flag(tp, 57765_PLUS)) in tg3_get_invariants()
16329 else if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16332 else if (tg3_flag(tp, 5750_PLUS)) { in tg3_get_invariants()
16350 if (tg3_flag(tp, HW_TSO_1) || in tg3_get_invariants()
16351 tg3_flag(tp, HW_TSO_2) || in tg3_get_invariants()
16352 tg3_flag(tp, HW_TSO_3) || in tg3_get_invariants()
16353 tg3_flag(tp, FW_TSO)) { in tg3_get_invariants()
16373 if (tg3_flag(tp, 5750_PLUS)) { in tg3_get_invariants()
16382 if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16387 if (tg3_flag(tp, 57765_PLUS)) { in tg3_get_invariants()
16404 if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16417 if (tg3_flag(tp, 57765_PLUS) && in tg3_get_invariants()
16421 if (!tg3_flag(tp, 5705_PLUS) || in tg3_get_invariants()
16422 tg3_flag(tp, 5780_CLASS) || in tg3_get_invariants()
16423 tg3_flag(tp, USE_JUMBO_BDFLAG)) in tg3_get_invariants()
16454 } else if (!tg3_flag(tp, 5705_PLUS) || in tg3_get_invariants()
16455 tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16474 !tg3_flag(tp, PCI_EXPRESS)) in tg3_get_invariants()
16502 if (tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16548 if (tg3_flag(tp, PCIX_TARGET_HWBUG)) in tg3_get_invariants()
16551 (tg3_flag(tp, PCI_EXPRESS) && in tg3_get_invariants()
16563 if (tg3_flag(tp, TXD_MBOX_HWBUG) || tg3_flag(tp, MBOX_WRITE_REORDER)) { in tg3_get_invariants()
16565 if (tg3_flag(tp, MBOX_WRITE_REORDER)) in tg3_get_invariants()
16569 if (tg3_flag(tp, ICH_WORKAROUND)) { in tg3_get_invariants()
16592 (tg3_flag(tp, PCIX_MODE) && in tg3_get_invariants()
16607 tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16608 if (tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16628 if (tg3_flag(tp, FLUSH_POSTED_WRITES)) { in tg3_get_invariants()
16643 if (tg3_flag(tp, FW_TSO) && tg3_flag(tp, ENABLE_ASF)) { in tg3_get_invariants()
16649 if (tg3_flag(tp, ENABLE_APE)) { in tg3_get_invariants()
16671 tg3_flag(tp, EEPROM_WRITE_PROT)) in tg3_get_invariants()
16682 tg3_flag(tp, 57765_CLASS)) in tg3_get_invariants()
16689 if (tg3_flag(tp, IS_NIC)) in tg3_get_invariants()
16705 if (tp->dev->mtu > ETH_DATA_LEN && !tg3_flag(tp, 5780_CLASS)) in tg3_get_invariants()
16736 if (tg3_flag(tp, 5705_PLUS) && in tg3_get_invariants()
16740 !tg3_flag(tp, 57765_PLUS)) { in tg3_get_invariants()
16761 if (tg3_flag(tp, CPMU_PRESENT)) in tg3_get_invariants()
16813 !tg3_flag(tp, PCIX_TARGET_HWBUG)) { in tg3_get_invariants()
16839 !tg3_flag(tp, NO_NVRAM)) in tg3_get_invariants()
16850 if (!tg3_flag(tp, IS_5788) && in tg3_get_invariants()
16853 if (tg3_flag(tp, TAGGED_STATUS)) { in tg3_get_invariants()
16863 if (tg3_flag(tp, ENABLE_APE)) in tg3_get_invariants()
16916 if (tg3_flag(tp, ENABLE_APE) && tg3_flag(tp, ENABLE_ASF)) in tg3_get_invariants()
16922 tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16943 if (tg3_flag(tp, ASPM_WORKAROUND)) in tg3_get_invariants()
16959 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_get_device_address()
16967 tg3_flag(tp, 5780_CLASS)) { in tg3_get_device_address()
16974 } else if (tg3_flag(tp, 5717_PLUS)) { in tg3_get_device_address()
16999 if (!tg3_flag(tp, NO_NVRAM) && in tg3_get_device_address()
17044 !tg3_flag(tp, PCI_EXPRESS)) in tg3_calc_dma_bndry()
17057 if (tg3_flag(tp, 57765_PLUS)) { in tg3_calc_dma_bndry()
17076 if (tg3_flag(tp, PCIX_MODE) && !tg3_flag(tp, PCI_EXPRESS)) { in tg3_calc_dma_bndry()
17101 } else if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_calc_dma_bndry()
17274 if (tg3_flag(tp, 57765_PLUS)) in tg3_test_dma()
17277 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_test_dma()
17280 } else if (!tg3_flag(tp, PCIX_MODE)) { in tg3_test_dma()
17296 if (tg3_flag(tp, 40BIT_DMA_BUG) && in tg3_test_dma()
17319 if (tg3_flag(tp, ONE_DMA_AT_ONCE)) in tg3_test_dma()
17432 if (tg3_flag(tp, 57765_PLUS)) { in tg3_init_bufmgr_config()
17446 } else if (tg3_flag(tp, 5705_PLUS)) { in tg3_init_bufmgr_config()
17520 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_bus_string()
17523 } else if (tg3_flag(tp, PCIX_MODE)) { in tg3_bus_string()
17542 if (tg3_flag(tp, PCI_HIGH_SPEED)) in tg3_bus_string()
17547 if (tg3_flag(tp, PCI_32BIT)) in tg3_bus_string()
17578 if (tg3_flag(tp, 5705_PLUS)) { in tg3_init_coal()
17724 if (tg3_flag(tp, IS_5788)) in tg3_init_one()
17726 else if (tg3_flag(tp, 40BIT_DMA_BUG)) { in tg3_init_one()
17765 if (tg3_flag(tp, 5755_PLUS)) in tg3_init_one()
17773 if ((tg3_flag(tp, HW_TSO_1) || in tg3_init_one()
17774 tg3_flag(tp, HW_TSO_2) || in tg3_init_one()
17775 tg3_flag(tp, HW_TSO_3)) && in tg3_init_one()
17778 if (tg3_flag(tp, HW_TSO_2) || tg3_flag(tp, HW_TSO_3)) { in tg3_init_one()
17781 if (tg3_flag(tp, HW_TSO_3) || in tg3_init_one()
17800 !tg3_flag(tp, CPMU_PRESENT)) in tg3_init_one()
17812 !tg3_flag(tp, TSO_CAPABLE) && in tg3_init_one()
17846 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_init_one()
17905 if (tg3_flag(tp, PTP_CAPABLE)) { in tg3_init_one()
17938 tg3_flag(tp, USE_LINKCHG_REG) != 0, in tg3_init_one()
17940 tg3_flag(tp, ENABLE_ASF) != 0, in tg3_init_one()
17941 tg3_flag(tp, TSO_CAPABLE) != 0); in tg3_init_one()
17988 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_remove_one()