Lines Matching refs:base_flags

7798 				       u32 base_flags, u32 mss, u32 vlan)  in tigon3_dma_hwbug_workaround()  argument
7828 base_flags |= TXD_FLAG_END; in tigon3_dma_hwbug_workaround()
7835 new_skb->len, base_flags, in tigon3_dma_hwbug_workaround()
7906 u32 len, entry, base_flags, mss, vlan = 0; in tg3_start_xmit() local
7942 base_flags = 0; in tg3_start_xmit()
7979 base_flags |= (TXD_FLAG_CPU_PRE_DMA | in tg3_start_xmit()
7989 base_flags &= ~TXD_FLAG_TCPUDP_CSUM; in tg3_start_xmit()
7998 base_flags |= 0x00000010; in tg3_start_xmit()
7999 base_flags |= (hdr_len & 0x3e0) << 5; in tg3_start_xmit()
8015 base_flags |= tsflags << 12; in tg3_start_xmit()
8027 base_flags |= TXD_FLAG_TCPUDP_CSUM; in tg3_start_xmit()
8033 base_flags |= TXD_FLAG_JMB_PKT; in tg3_start_xmit()
8036 base_flags |= TXD_FLAG_VLAN; in tg3_start_xmit()
8043 base_flags |= TXD_FLAG_HWTSTAMP; in tg3_start_xmit()
8062 if (tg3_tx_frag_set(tnapi, &entry, &budget, mapping, len, base_flags | in tg3_start_xmit()
8093 len, base_flags | in tg3_start_xmit()
8123 base_flags, mss, vlan)) in tg3_start_xmit()
13417 u32 base_flags = 0, mss = 0, desc_idx, coal_now, data_off, val; in tg3_run_loopback() local
13466 base_flags = (TXD_FLAG_CPU_PRE_DMA | in tg3_run_loopback()
13477 base_flags |= TXD_FLAG_TCPUDP_CSUM; in tg3_run_loopback()
13482 base_flags |= 0x00000010; in tg3_run_loopback()
13483 base_flags |= (hdr_len & 0x3e0) << 5; in tg3_run_loopback()
13490 base_flags |= (TG3_TSO_TCP_OPT_LEN << 10); in tg3_run_loopback()
13500 base_flags |= TXD_FLAG_JMB_PKT; in tg3_run_loopback()
13525 base_flags | TXD_FLAG_END, mss, 0)) { in tg3_run_loopback()