Lines Matching +full:0 +full:x0001

43 #define AT_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */
44 #define AT_WUFC_MAG 0x00000002 /* Magic Packet Wakeup Enable */
45 #define AT_WUFC_EX 0x00000004 /* Directed Exact Wakeup Enable */
46 #define AT_WUFC_MC 0x00000008 /* Multicast Wakeup Enable */
47 #define AT_WUFC_BC 0x00000010 /* Broadcast Wakeup Enable */
50 _tag = ((((_vlan) >> 8) & 0xFF) |\
51 (((_vlan) & 0xFF) << 8))
54 _vlan = ((((_tag) >> 8) & 0xFF) |\
55 (((_tag) & 0xFF) << 8))
57 #define SPEED_0 0xffff
68 #define AT_DMA_HI_ADDR_MASK 0xffffffff00000000ULL
69 #define AT_DMA_LO_ADDR_MASK 0x00000000ffffffffULL
81 #define ATL1C_PCIE_L0S_L1_DISABLE 0x01
82 #define ATL1C_PCIE_PHY_RESET 0x02
84 #define ATL1C_ASPM_L0s_ENABLE 0x0001
85 #define ATL1C_ASPM_L1_ENABLE 0x0002
95 /* tpd word 1 bit 0:7 General Checksum task offload */
96 #define TPD_L4HDR_OFFSET_MASK 0x00FF
97 #define TPD_L4HDR_OFFSET_SHIFT 0
99 /* tpd word 1 bit 0:7 Large Send task offload (IPv4/IPV6) */
100 #define TPD_TCPHDR_OFFSET_MASK 0x00FF
101 #define TPD_TCPHDR_OFFSET_SHIFT 0
103 /* tpd word 1 bit 0:7 Custom Checksum task offload */
104 #define TPD_PLOADOFFSET_MASK 0x00FF
105 #define TPD_PLOADOFFSET_SHIFT 0
108 #define TPD_CCSUM_EN_MASK 0x0001
110 #define TPD_IP_CSUM_MASK 0x0001
112 #define TPD_TCP_CSUM_MASK 0x0001
114 #define TPD_UDP_CSUM_MASK 0x0001
116 #define TPD_LSO_EN_MASK 0x0001 /* TCP Large Send Offload */
118 #define TPD_LSO_VER_MASK 0x0001
119 #define TPD_LSO_VER_SHIFT 13 /* 0 : ipv4; 1 : ipv4/ipv6 */
120 #define TPD_CON_VTAG_MASK 0x0001
122 #define TPD_INS_VTAG_MASK 0x0001
124 #define TPD_IPV4_PACKET_MASK 0x0001 /* valid when LSO VER is 1 */
126 #define TPD_ETH_TYPE_MASK 0x0001
127 #define TPD_ETH_TYPE_SHIFT 17 /* 0 : 802.3 frame; 1 : Ethernet */
130 #define TPD_CCSUM_OFFSET_MASK 0x00FF
132 #define TPD_CCSUM_EPAD_MASK 0x0001
136 #define TPD_MSS_MASK 0x1FFF
139 #define TPD_EOP_MASK 0x0001
155 /* rrs word 0 bit 0:31 */
156 #define RRS_RX_CSUM_MASK 0xFFFF
157 #define RRS_RX_CSUM_SHIFT 0
158 #define RRS_RX_RFD_CNT_MASK 0x000F
160 #define RRS_RX_RFD_INDEX_MASK 0x0FFF
163 /* rrs flag bit 0:16 */
164 #define RRS_HEAD_LEN_MASK 0x00FF
165 #define RRS_HEAD_LEN_SHIFT 0
166 #define RRS_HDS_TYPE_MASK 0x0003
168 #define RRS_CPU_NUM_MASK 0x0003
170 #define RRS_HASH_FLG_MASK 0x000F
177 ((((flag) >> (RRS_HDS_TYPE_SHIFT)) & RRS_HDS_TYPE_MASK) == 0)
187 /* rrs word 3 bit 0:31 */
188 #define RRS_PKT_SIZE_MASK 0x3FFF
189 #define RRS_PKT_SIZE_SHIFT 0
190 #define RRS_ERR_L4_CSUM_MASK 0x0001
192 #define RRS_ERR_IP_CSUM_MASK 0x0001
194 #define RRS_VLAN_INS_MASK 0x0001
196 #define RRS_PROT_ID_MASK 0x0007
198 #define RRS_RX_ERR_SUM_MASK 0x0001
200 #define RRS_RX_ERR_CRC_MASK 0x0001
202 #define RRS_RX_ERR_FAE_MASK 0x0001
204 #define RRS_RX_ERR_TRUNC_MASK 0x0001
206 #define RRS_RX_ERR_RUNC_MASK 0x0001
208 #define RRS_RX_ERR_ICMP_MASK 0x0001
210 #define RRS_PACKET_BCAST_MASK 0x0001
212 #define RRS_PACKET_MCAST_MASK 0x0001
214 #define RRS_PACKET_TYPE_MASK 0x0001
216 #define RRS_FIFO_FULL_MASK 0x0001
218 #define RRS_802_3_LEN_ERR_MASK 0x0001
220 #define RRS_RXD_UPDATED_MASK 0x0001
223 #define RRS_ERR_L4_CSUM 0x00004000
224 #define RRS_ERR_IP_CSUM 0x00008000
225 #define RRS_VLAN_INS 0x00010000
226 #define RRS_RX_ERR_SUM 0x00100000
227 #define RRS_RX_ERR_CRC 0x00200000
228 #define RRS_802_3_LEN_ERR 0x40000000
229 #define RRS_RXD_UPDATED 0x80000000
232 #define RRS_PACKET_TYPE_ETH 0
267 atl1c_rcb_64 = 0,
272 atl1c_mac_speed_0 = 0,
278 atl1c_dma_req_128 = 0,
288 athr_l1c = 0,
379 #define MEDIA_TYPE_AUTO_SENSOR 0
393 #define ATL1C_INTR_CLEAR_ON_READ 0x0001
394 #define ATL1C_INTR_MODRT_ENABLE 0x0002
395 #define ATL1C_CMB_ENABLE 0x0004
396 #define ATL1C_SMB_ENABLE 0x0010
397 #define ATL1C_TXQ_MODE_ENHANCE 0x0020
398 #define ATL1C_RX_IPV6_CHKSUM 0x0040
399 #define ATL1C_ASPM_L0S_SUPPORT 0x0080
400 #define ATL1C_ASPM_L1_SUPPORT 0x0100
401 #define ATL1C_ASPM_CTRL_MON 0x0200
402 #define ATL1C_HIB_DISABLE 0x0400
403 #define ATL1C_APS_MODE_ENABLE 0x0800
404 #define ATL1C_LINK_EXT_SYNC 0x1000
405 #define ATL1C_CLK_GATING_EN 0x2000
406 #define ATL1C_FPGA_VERSION 0x8000
408 #define ATL1C_LINK_CAP_1000M 0x0001
445 #define ATL1C_BUFFER_FREE 0x0001
446 #define ATL1C_BUFFER_BUSY 0x0002
447 #define ATL1C_BUFFER_STATE_MASK 0x0003
449 #define ATL1C_PCIMAP_SINGLE 0x0004
450 #define ATL1C_PCIMAP_PAGE 0x0008
451 #define ATL1C_PCIMAP_TYPE_MASK 0x000C
453 #define ATL1C_PCIMAP_TODEVICE 0x0010
454 #define ATL1C_PCIMAP_FROMDEVICE 0x0020
455 #define ATL1C_PCIMAP_DIRECTION_MASK 0x0030
462 } while (0)
469 } while (0)
521 #define __AT_TESTING 0x0001
522 #define __AT_RESETTING 0x0002
523 #define __AT_DOWN 0x0003
525 #define ATL1C_WORK_EVENT_RESET 0
562 } while (0)
580 } while (0)