Lines Matching refs:arc_reg_set
72 arc_reg_set(priv, R_CTRL, reg); in arc_emac_adjust_link()
365 arc_reg_set(priv, R_STATUS, status); in arc_emac_intr()
479 arc_reg_set(priv, R_LAFL, 0); in arc_emac_open()
480 arc_reg_set(priv, R_LAFH, 0); in arc_emac_open()
483 arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma); in arc_emac_open()
484 arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma); in arc_emac_open()
487 arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK); in arc_emac_open()
490 arc_reg_set(priv, R_CTRL, in arc_emac_open()
524 arc_reg_set(priv, R_LAFL, ~0); in arc_emac_set_rx_mode()
525 arc_reg_set(priv, R_LAFH, ~0); in arc_emac_set_rx_mode()
536 arc_reg_set(priv, R_LAFL, filter[0]); in arc_emac_set_rx_mode()
537 arc_reg_set(priv, R_LAFH, filter[1]); in arc_emac_set_rx_mode()
539 arc_reg_set(priv, R_LAFL, 0); in arc_emac_set_rx_mode()
540 arc_reg_set(priv, R_LAFH, 0); in arc_emac_set_rx_mode()
743 arc_reg_set(priv, R_STATUS, TXPL_MASK); in arc_emac_tx()
756 arc_reg_set(priv, R_ADDRL, addr_low); in arc_emac_set_address_internal()
757 arc_reg_set(priv, R_ADDRH, addr_hi); in arc_emac_set_address_internal()
837 arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK); in arc_emac_restart()
935 arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000); in arc_emac_probe()