Lines Matching refs:aq_hw

10 void hw_atl2_rpf_redirection_table2_select_set(struct aq_hw_s *aq_hw,  in hw_atl2_rpf_redirection_table2_select_set()  argument
13 aq_hw_write_reg_bit(aq_hw, HW_ATL2_RPF_PIF_RPF_REDIR2_ENI_ADR, in hw_atl2_rpf_redirection_table2_select_set()
18 void hw_atl2_rpf_rss_hash_type_set(struct aq_hw_s *aq_hw, u32 rss_hash_type) in hw_atl2_rpf_rss_hash_type_set() argument
20 aq_hw_write_reg_bit(aq_hw, HW_ATL2_RPF_PIF_RPF_RSS_HASH_TYPEI_ADR, in hw_atl2_rpf_rss_hash_type_set()
28 void hw_atl2_rpf_new_enable_set(struct aq_hw_s *aq_hw, u32 enable) in hw_atl2_rpf_new_enable_set() argument
30 aq_hw_write_reg_bit(aq_hw, HW_ATL2_RPF_NEW_EN_ADR, in hw_atl2_rpf_new_enable_set()
36 void hw_atl2_rpfl2_uc_flr_tag_set(struct aq_hw_s *aq_hw, u32 tag, u32 filter) in hw_atl2_rpfl2_uc_flr_tag_set() argument
38 aq_hw_write_reg_bit(aq_hw, HW_ATL2_RPFL2UC_TAG_ADR(filter), in hw_atl2_rpfl2_uc_flr_tag_set()
44 void hw_atl2_rpfl2_bc_flr_tag_set(struct aq_hw_s *aq_hw, u32 tag) in hw_atl2_rpfl2_bc_flr_tag_set() argument
46 aq_hw_write_reg_bit(aq_hw, HW_ATL2_RPF_L2_BC_TAG_ADR, in hw_atl2_rpfl2_bc_flr_tag_set()
52 void hw_atl2_new_rpf_rss_redir_set(struct aq_hw_s *aq_hw, u32 tc, u32 index, in hw_atl2_new_rpf_rss_redir_set() argument
55 aq_hw_write_reg_bit(aq_hw, HW_ATL2_RPF_RSS_REDIR_ADR(tc, index), in hw_atl2_new_rpf_rss_redir_set()
61 void hw_atl2_rpf_vlan_flr_tag_set(struct aq_hw_s *aq_hw, u32 tag, u32 filter) in hw_atl2_rpf_vlan_flr_tag_set() argument
63 aq_hw_write_reg_bit(aq_hw, HW_ATL2_RPF_VL_TAG_ADR(filter), in hw_atl2_rpf_vlan_flr_tag_set()
71 void hw_atl2_tpb_tx_tc_q_rand_map_en_set(struct aq_hw_s *aq_hw, in hw_atl2_tpb_tx_tc_q_rand_map_en_set() argument
74 aq_hw_write_reg_bit(aq_hw, HW_ATL2_TPB_TX_TC_Q_RAND_MAP_EN_ADR, in hw_atl2_tpb_tx_tc_q_rand_map_en_set()
80 void hw_atl2_tpb_tx_buf_clk_gate_en_set(struct aq_hw_s *aq_hw, u32 clk_gate_en) in hw_atl2_tpb_tx_buf_clk_gate_en_set() argument
82 aq_hw_write_reg_bit(aq_hw, HW_ATL2_TPB_TX_BUF_CLK_GATE_EN_ADR, in hw_atl2_tpb_tx_buf_clk_gate_en_set()
88 void hw_atl2_reg_tx_intr_moder_ctrl_set(struct aq_hw_s *aq_hw, in hw_atl2_reg_tx_intr_moder_ctrl_set() argument
92 aq_hw_write_reg(aq_hw, HW_ATL2_TX_INTR_MODERATION_CTL_ADR(queue), in hw_atl2_reg_tx_intr_moder_ctrl_set()
96 void hw_atl2_tps_tx_pkt_shed_data_arb_mode_set(struct aq_hw_s *aq_hw, in hw_atl2_tps_tx_pkt_shed_data_arb_mode_set() argument
99 aq_hw_write_reg_bit(aq_hw, HW_ATL2_TPS_DATA_TC_ARB_MODE_ADR, in hw_atl2_tps_tx_pkt_shed_data_arb_mode_set()
105 void hw_atl2_tps_tx_pkt_shed_tc_data_max_credit_set(struct aq_hw_s *aq_hw, in hw_atl2_tps_tx_pkt_shed_tc_data_max_credit_set() argument
109 aq_hw_write_reg_bit(aq_hw, HW_ATL2_TPS_DATA_TCTCREDIT_MAX_ADR(tc), in hw_atl2_tps_tx_pkt_shed_tc_data_max_credit_set()
115 void hw_atl2_tps_tx_pkt_shed_tc_data_weight_set(struct aq_hw_s *aq_hw, in hw_atl2_tps_tx_pkt_shed_tc_data_weight_set() argument
119 aq_hw_write_reg_bit(aq_hw, HW_ATL2_TPS_DATA_TCTWEIGHT_ADR(tc), in hw_atl2_tps_tx_pkt_shed_tc_data_weight_set()
125 u32 hw_atl2_get_hw_version(struct aq_hw_s *aq_hw) in hw_atl2_get_hw_version() argument
127 return aq_hw_read_reg(aq_hw, HW_ATL2_FPGA_VER_ADR); in hw_atl2_get_hw_version()
130 void hw_atl2_init_launchtime(struct aq_hw_s *aq_hw) in hw_atl2_init_launchtime() argument
132 u32 hw_ver = hw_atl2_get_hw_version(aq_hw); in hw_atl2_init_launchtime()
134 aq_hw_write_reg_bit(aq_hw, HW_ATL2_LT_CTRL_ADR, in hw_atl2_init_launchtime()
145 void hw_atl2_rpf_act_rslvr_record_set(struct aq_hw_s *aq_hw, u8 location, in hw_atl2_rpf_act_rslvr_record_set() argument
148 aq_hw_write_reg(aq_hw, in hw_atl2_rpf_act_rslvr_record_set()
151 aq_hw_write_reg(aq_hw, in hw_atl2_rpf_act_rslvr_record_set()
154 aq_hw_write_reg(aq_hw, in hw_atl2_rpf_act_rslvr_record_set()
159 void hw_atl2_rpf_act_rslvr_section_en_set(struct aq_hw_s *aq_hw, u32 sections) in hw_atl2_rpf_act_rslvr_section_en_set() argument
161 aq_hw_write_reg_bit(aq_hw, HW_ATL2_RPF_REC_TAB_EN_ADR, in hw_atl2_rpf_act_rslvr_section_en_set()
167 void hw_atl2_mif_shared_buf_get(struct aq_hw_s *aq_hw, int offset, u32 *data, in hw_atl2_mif_shared_buf_get() argument
174 data[j] = aq_hw_read_reg(aq_hw, in hw_atl2_mif_shared_buf_get()
178 void hw_atl2_mif_shared_buf_write(struct aq_hw_s *aq_hw, int offset, u32 *data, in hw_atl2_mif_shared_buf_write() argument
185 aq_hw_write_reg(aq_hw, HW_ATL2_MIF_SHARED_BUFFER_IN_ADR(i), in hw_atl2_mif_shared_buf_write()
189 void hw_atl2_mif_shared_buf_read(struct aq_hw_s *aq_hw, int offset, u32 *data, in hw_atl2_mif_shared_buf_read() argument
196 data[j] = aq_hw_read_reg(aq_hw, in hw_atl2_mif_shared_buf_read()
200 void hw_atl2_mif_host_finished_write_set(struct aq_hw_s *aq_hw, u32 finish) in hw_atl2_mif_host_finished_write_set() argument
202 aq_hw_write_reg_bit(aq_hw, HW_ATL2_MIF_HOST_FINISHED_WRITE_ADR, in hw_atl2_mif_host_finished_write_set()
208 u32 hw_atl2_mif_mcp_finished_read_get(struct aq_hw_s *aq_hw) in hw_atl2_mif_mcp_finished_read_get() argument
210 return aq_hw_read_reg_bit(aq_hw, HW_ATL2_MIF_MCP_FINISHED_READ_ADR, in hw_atl2_mif_mcp_finished_read_get()
215 u32 hw_atl2_mif_mcp_boot_reg_get(struct aq_hw_s *aq_hw) in hw_atl2_mif_mcp_boot_reg_get() argument
217 return aq_hw_read_reg(aq_hw, HW_ATL2_MIF_BOOT_REG_ADR); in hw_atl2_mif_mcp_boot_reg_get()
220 void hw_atl2_mif_mcp_boot_reg_set(struct aq_hw_s *aq_hw, u32 val) in hw_atl2_mif_mcp_boot_reg_set() argument
222 return aq_hw_write_reg(aq_hw, HW_ATL2_MIF_BOOT_REG_ADR, val); in hw_atl2_mif_mcp_boot_reg_set()
225 u32 hw_atl2_mif_host_req_int_get(struct aq_hw_s *aq_hw) in hw_atl2_mif_host_req_int_get() argument
227 return aq_hw_read_reg(aq_hw, HW_ATL2_MCP_HOST_REQ_INT_ADR); in hw_atl2_mif_host_req_int_get()
230 void hw_atl2_mif_host_req_int_clr(struct aq_hw_s *aq_hw, u32 val) in hw_atl2_mif_host_req_int_clr() argument
232 return aq_hw_write_reg(aq_hw, HW_ATL2_MCP_HOST_REQ_INT_CLR_ADR, in hw_atl2_mif_host_req_int_clr()