Lines Matching +full:5 +full:gbase +full:- +full:x
125 #include "xgbe-common.h"
149 /* Rate-change complete wait/retry count */
225 #define XGBE_SFP_BASE_10GBE_CC_LR BIT(5)
276 ((_x)->extd[XGBE_SFP_EXTD_SFF_8472] && \
277 !((_x)->extd[XGBE_SFP_EXTD_DIAG] & XGBE_SFP_EXTD_DIAG_ADDR_CHANGE))
284 #define XGBE_BEL_FUSE_VENDOR "BEL-FUSE "
285 #define XGBE_BEL_FUSE_PARTNO "1GBT-SFP06 "
306 /* Re-driver related definitions */
320 XGBE_PHY_REDRV_MODE_CX = 5,
375 /* Re-driver support */
399 return pdata->i2c_if.i2c_xfer(pdata, i2c_op); in xgbe_phy_i2c_xfer()
405 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_redrv_write()
408 u8 redrv_data[5], csum; in xgbe_phy_redrv_write()
430 i2c_op.target = phy_data->redrv_addr; in xgbe_phy_redrv_write()
435 if ((ret == -EAGAIN) && retry--) in xgbe_phy_redrv_write()
444 i2c_op.target = phy_data->redrv_addr; in xgbe_phy_redrv_write()
449 if ((ret == -EAGAIN) && retry--) in xgbe_phy_redrv_write()
456 netif_dbg(pdata, drv, pdata->netdev, in xgbe_phy_redrv_write()
458 ret = -EIO; in xgbe_phy_redrv_write()
478 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_write()
500 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_read()
514 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_read()
522 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_put_mux()
526 if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT) in xgbe_phy_sfp_put_mux()
532 i2c_op.target = phy_data->sfp_mux_address; in xgbe_phy_sfp_put_mux()
541 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_get_mux()
545 if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT) in xgbe_phy_sfp_get_mux()
549 mux_channel = 1 << phy_data->sfp_mux_channel; in xgbe_phy_sfp_get_mux()
551 i2c_op.target = phy_data->sfp_mux_address; in xgbe_phy_sfp_get_mux()
565 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_get_comm_ownership()
581 XP_SET_BITS(mutex_id, XP_I2C_MUTEX, ID, phy_data->port_id); in xgbe_phy_get_comm_ownership()
584 timeout = jiffies + (5 * HZ); in xgbe_phy_get_comm_ownership()
602 netdev_err(pdata->netdev, "unable to obtain hardware mutexes\n"); in xgbe_phy_get_comm_ownership()
604 return -ETIMEDOUT; in xgbe_phy_get_comm_ownership()
610 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_write_c22()
612 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL22) in xgbe_phy_mdio_mii_write_c22()
613 return -EOPNOTSUPP; in xgbe_phy_mdio_mii_write_c22()
615 return pdata->hw_if.write_ext_mii_regs_c22(pdata, addr, reg, val); in xgbe_phy_mdio_mii_write_c22()
621 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_write_c45()
623 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL45) in xgbe_phy_mdio_mii_write_c45()
624 return -EOPNOTSUPP; in xgbe_phy_mdio_mii_write_c45()
626 return pdata->hw_if.write_ext_mii_regs_c45(pdata, addr, devad, in xgbe_phy_mdio_mii_write_c45()
655 struct xgbe_prv_data *pdata = mii->priv; in xgbe_phy_mii_write_c22()
656 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_write_c22()
663 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_write_c22()
665 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_write_c22()
668 ret = -EOPNOTSUPP; in xgbe_phy_mii_write_c22()
678 struct xgbe_prv_data *pdata = mii->priv; in xgbe_phy_mii_write_c45()
679 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_write_c45()
686 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_write_c45()
687 ret = -EOPNOTSUPP; in xgbe_phy_mii_write_c45()
688 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_write_c45()
691 ret = -EOPNOTSUPP; in xgbe_phy_mii_write_c45()
701 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_read_c22()
703 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL22) in xgbe_phy_mdio_mii_read_c22()
704 return -EOPNOTSUPP; in xgbe_phy_mdio_mii_read_c22()
706 return pdata->hw_if.read_ext_mii_regs_c22(pdata, addr, reg); in xgbe_phy_mdio_mii_read_c22()
712 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_read_c45()
714 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL45) in xgbe_phy_mdio_mii_read_c45()
715 return -EOPNOTSUPP; in xgbe_phy_mdio_mii_read_c45()
717 return pdata->hw_if.read_ext_mii_regs_c45(pdata, addr, devad, reg); in xgbe_phy_mdio_mii_read_c45()
744 struct xgbe_prv_data *pdata = mii->priv; in xgbe_phy_mii_read_c22()
745 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_read_c22()
752 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_read_c22()
754 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_read_c22()
757 ret = -EOPNOTSUPP; in xgbe_phy_mii_read_c22()
767 struct xgbe_prv_data *pdata = mii->priv; in xgbe_phy_mii_read_c45()
768 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_read_c45()
775 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_read_c45()
776 ret = -EOPNOTSUPP; in xgbe_phy_mii_read_c45()
777 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_read_c45()
780 ret = -ENOTSUPP; in xgbe_phy_mii_read_c45()
789 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_sfp_phy_settings()
790 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_phy_settings()
792 if (!phy_data->sfp_mod_absent && !phy_data->sfp_changed) in xgbe_phy_sfp_phy_settings()
797 if (phy_data->sfp_mod_absent) { in xgbe_phy_sfp_phy_settings()
798 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
799 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
800 pdata->phy.autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
801 pdata->phy.pause_autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
814 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
819 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
820 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
821 pdata->phy.autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
822 pdata->phy.pause_autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
826 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) { in xgbe_phy_sfp_phy_settings()
827 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) in xgbe_phy_sfp_phy_settings()
829 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) in xgbe_phy_sfp_phy_settings()
831 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_sfp_phy_settings()
834 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_sfp_phy_settings()
843 pdata->phy.speed = SPEED_10000; in xgbe_phy_sfp_phy_settings()
844 pdata->phy.duplex = DUPLEX_FULL; in xgbe_phy_sfp_phy_settings()
845 pdata->phy.autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
846 pdata->phy.pause_autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
847 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_sfp_phy_settings()
848 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
870 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
871 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
872 pdata->phy.autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
873 pdata->phy.pause_autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
877 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
896 sfp_base = sfp_eeprom->base; in xgbe_phy_sfp_bit_rate()
914 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_free_phy_device()
916 if (phy_data->phydev) { in xgbe_phy_free_phy_device()
917 phy_detach(phy_data->phydev); in xgbe_phy_free_phy_device()
918 phy_device_remove(phy_data->phydev); in xgbe_phy_free_phy_device()
919 phy_device_free(phy_data->phydev); in xgbe_phy_free_phy_device()
920 phy_data->phydev = NULL; in xgbe_phy_free_phy_device()
926 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_finisar_phy_quirks()
927 unsigned int phy_id = phy_data->phydev->phy_id; in xgbe_phy_finisar_phy_quirks()
929 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_finisar_phy_quirks()
935 /* Enable Base-T AN */ in xgbe_phy_finisar_phy_quirks()
936 phy_write(phy_data->phydev, 0x16, 0x0001); in xgbe_phy_finisar_phy_quirks()
937 phy_write(phy_data->phydev, 0x00, 0x9140); in xgbe_phy_finisar_phy_quirks()
938 phy_write(phy_data->phydev, 0x16, 0x0000); in xgbe_phy_finisar_phy_quirks()
940 /* Enable SGMII at 100Base-T/1000Base-T Full Duplex */ in xgbe_phy_finisar_phy_quirks()
941 phy_write(phy_data->phydev, 0x1b, 0x9084); in xgbe_phy_finisar_phy_quirks()
942 phy_write(phy_data->phydev, 0x09, 0x0e00); in xgbe_phy_finisar_phy_quirks()
943 phy_write(phy_data->phydev, 0x00, 0x8140); in xgbe_phy_finisar_phy_quirks()
944 phy_write(phy_data->phydev, 0x04, 0x0d01); in xgbe_phy_finisar_phy_quirks()
945 phy_write(phy_data->phydev, 0x00, 0x9140); in xgbe_phy_finisar_phy_quirks()
947 linkmode_copy(phy_data->phydev->supported, PHY_GBIT_FEATURES); in xgbe_phy_finisar_phy_quirks()
949 phy_support_asym_pause(phy_data->phydev); in xgbe_phy_finisar_phy_quirks()
951 netif_dbg(pdata, drv, pdata->netdev, in xgbe_phy_finisar_phy_quirks()
959 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_belfuse_phy_quirks()
960 struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom; in xgbe_phy_belfuse_phy_quirks()
961 unsigned int phy_id = phy_data->phydev->phy_id; in xgbe_phy_belfuse_phy_quirks()
964 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_belfuse_phy_quirks()
967 if (memcmp(&sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_NAME], in xgbe_phy_belfuse_phy_quirks()
971 /* For Bel-Fuse, use the extra AN flag */ in xgbe_phy_belfuse_phy_quirks()
972 pdata->an_again = 1; in xgbe_phy_belfuse_phy_quirks()
974 if (memcmp(&sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_PN], in xgbe_phy_belfuse_phy_quirks()
981 /* Reset PHY - wait for self-clearing reset bit to clear */ in xgbe_phy_belfuse_phy_quirks()
982 genphy_soft_reset(phy_data->phydev); in xgbe_phy_belfuse_phy_quirks()
985 phy_write(phy_data->phydev, 0x18, 0x7007); in xgbe_phy_belfuse_phy_quirks()
986 reg = phy_read(phy_data->phydev, 0x18); in xgbe_phy_belfuse_phy_quirks()
987 phy_write(phy_data->phydev, 0x18, reg & ~0x0080); in xgbe_phy_belfuse_phy_quirks()
990 phy_write(phy_data->phydev, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
991 reg = phy_read(phy_data->phydev, 0x1c); in xgbe_phy_belfuse_phy_quirks()
994 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg | 0x0001); in xgbe_phy_belfuse_phy_quirks()
997 reg = phy_read(phy_data->phydev, 0x00); in xgbe_phy_belfuse_phy_quirks()
998 phy_write(phy_data->phydev, 0x00, reg | 0x00800); in xgbe_phy_belfuse_phy_quirks()
1000 /* Configure SGMII-to-Copper mode */ in xgbe_phy_belfuse_phy_quirks()
1001 phy_write(phy_data->phydev, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
1002 reg = phy_read(phy_data->phydev, 0x1c); in xgbe_phy_belfuse_phy_quirks()
1005 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg | 0x0004); in xgbe_phy_belfuse_phy_quirks()
1008 reg = phy_read(phy_data->phydev, 0x00); in xgbe_phy_belfuse_phy_quirks()
1009 phy_write(phy_data->phydev, 0x00, reg & ~0x00800); in xgbe_phy_belfuse_phy_quirks()
1012 phy_write(phy_data->phydev, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
1013 reg = phy_read(phy_data->phydev, 0x1c); in xgbe_phy_belfuse_phy_quirks()
1016 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg); in xgbe_phy_belfuse_phy_quirks()
1019 reg = phy_read(phy_data->phydev, 0x00); in xgbe_phy_belfuse_phy_quirks()
1020 phy_write(phy_data->phydev, 0x00, reg & ~0x00800); in xgbe_phy_belfuse_phy_quirks()
1022 linkmode_copy(phy_data->phydev->supported, PHY_GBIT_FEATURES); in xgbe_phy_belfuse_phy_quirks()
1023 phy_support_asym_pause(phy_data->phydev); in xgbe_phy_belfuse_phy_quirks()
1025 netif_dbg(pdata, drv, pdata->netdev, in xgbe_phy_belfuse_phy_quirks()
1042 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_find_phy_device()
1043 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_find_phy_device()
1048 if (phy_data->phydev) in xgbe_phy_find_phy_device()
1052 pdata->an_again = 0; in xgbe_phy_find_phy_device()
1055 if (phy_data->phydev_mode == XGBE_MDIO_MODE_NONE) in xgbe_phy_find_phy_device()
1059 if ((phy_data->port_mode == XGBE_PORT_MODE_SFP) && in xgbe_phy_find_phy_device()
1060 !phy_data->sfp_phy_avail) in xgbe_phy_find_phy_device()
1064 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->mdio_addr, in xgbe_phy_find_phy_device()
1065 phy_data->phydev_mode); in xgbe_phy_find_phy_device()
1067 netdev_err(pdata->netdev, in xgbe_phy_find_phy_device()
1069 phy_data->mdio_addr, phy_data->phydev_mode); in xgbe_phy_find_phy_device()
1074 phydev = get_phy_device(phy_data->mii, phy_data->mdio_addr, in xgbe_phy_find_phy_device()
1075 (phy_data->phydev_mode == XGBE_MDIO_MODE_CL45)); in xgbe_phy_find_phy_device()
1077 netdev_err(pdata->netdev, "get_phy_device failed\n"); in xgbe_phy_find_phy_device()
1078 return -ENODEV; in xgbe_phy_find_phy_device()
1080 netif_dbg(pdata, drv, pdata->netdev, "external PHY id is %#010x\n", in xgbe_phy_find_phy_device()
1081 phydev->phy_id); in xgbe_phy_find_phy_device()
1087 netdev_err(pdata->netdev, "phy_device_register failed\n"); in xgbe_phy_find_phy_device()
1092 ret = phy_attach_direct(pdata->netdev, phydev, phydev->dev_flags, in xgbe_phy_find_phy_device()
1095 netdev_err(pdata->netdev, "phy_attach_direct failed\n"); in xgbe_phy_find_phy_device()
1100 phy_data->phydev = phydev; in xgbe_phy_find_phy_device()
1104 linkmode_and(phydev->advertising, phydev->advertising, in xgbe_phy_find_phy_device()
1105 lks->link_modes.advertising); in xgbe_phy_find_phy_device()
1107 phy_start_aneg(phy_data->phydev); in xgbe_phy_find_phy_device()
1114 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_external_phy()
1117 if (!phy_data->sfp_changed) in xgbe_phy_sfp_external_phy()
1120 phy_data->sfp_phy_avail = 0; in xgbe_phy_sfp_external_phy()
1122 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_sfp_external_phy()
1131 phy_data->sfp_phy_avail = 1; in xgbe_phy_sfp_external_phy()
1136 u8 *sfp_extd = phy_data->sfp_eeprom.extd; in xgbe_phy_check_sfp_rx_los()
1141 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_RX_LOS) in xgbe_phy_check_sfp_rx_los()
1144 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_rx_los)) in xgbe_phy_check_sfp_rx_los()
1152 u8 *sfp_extd = phy_data->sfp_eeprom.extd; in xgbe_phy_check_sfp_tx_fault()
1157 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_TX_FAULT) in xgbe_phy_check_sfp_tx_fault()
1160 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_tx_fault)) in xgbe_phy_check_sfp_tx_fault()
1168 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_MOD_ABSENT) in xgbe_phy_check_sfp_mod_absent()
1171 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_mod_absent)) in xgbe_phy_check_sfp_mod_absent()
1179 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_parse_eeprom()
1180 struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom; in xgbe_phy_sfp_parse_eeprom()
1183 sfp_base = sfp_eeprom->base; in xgbe_phy_sfp_parse_eeprom()
1192 phy_data->sfp_tx_fault = xgbe_phy_check_sfp_tx_fault(phy_data); in xgbe_phy_sfp_parse_eeprom()
1193 phy_data->sfp_rx_los = xgbe_phy_check_sfp_rx_los(phy_data); in xgbe_phy_sfp_parse_eeprom()
1197 phy_data->sfp_cable = XGBE_SFP_CABLE_PASSIVE; in xgbe_phy_sfp_parse_eeprom()
1198 phy_data->sfp_cable_len = sfp_base[XGBE_SFP_BASE_CU_CABLE_LEN]; in xgbe_phy_sfp_parse_eeprom()
1200 phy_data->sfp_cable = XGBE_SFP_CABLE_ACTIVE; in xgbe_phy_sfp_parse_eeprom()
1202 phy_data->sfp_cable = XGBE_SFP_CABLE_FIBER; in xgbe_phy_sfp_parse_eeprom()
1206 if (phy_data->sfp_cable != XGBE_SFP_CABLE_FIBER && in xgbe_phy_sfp_parse_eeprom()
1208 phy_data->sfp_base = XGBE_SFP_BASE_10000_CR; in xgbe_phy_sfp_parse_eeprom()
1210 phy_data->sfp_base = XGBE_SFP_BASE_10000_SR; in xgbe_phy_sfp_parse_eeprom()
1212 phy_data->sfp_base = XGBE_SFP_BASE_10000_LR; in xgbe_phy_sfp_parse_eeprom()
1214 phy_data->sfp_base = XGBE_SFP_BASE_10000_LRM; in xgbe_phy_sfp_parse_eeprom()
1216 phy_data->sfp_base = XGBE_SFP_BASE_10000_ER; in xgbe_phy_sfp_parse_eeprom()
1218 phy_data->sfp_base = XGBE_SFP_BASE_1000_SX; in xgbe_phy_sfp_parse_eeprom()
1220 phy_data->sfp_base = XGBE_SFP_BASE_1000_LX; in xgbe_phy_sfp_parse_eeprom()
1222 phy_data->sfp_base = XGBE_SFP_BASE_1000_CX; in xgbe_phy_sfp_parse_eeprom()
1224 phy_data->sfp_base = XGBE_SFP_BASE_1000_T; in xgbe_phy_sfp_parse_eeprom()
1226 switch (phy_data->sfp_base) { in xgbe_phy_sfp_parse_eeprom()
1228 phy_data->sfp_speed = XGBE_SFP_SPEED_100_1000; in xgbe_phy_sfp_parse_eeprom()
1233 phy_data->sfp_speed = XGBE_SFP_SPEED_1000; in xgbe_phy_sfp_parse_eeprom()
1240 phy_data->sfp_speed = XGBE_SFP_SPEED_10000; in xgbe_phy_sfp_parse_eeprom()
1253 netif_dbg(pdata, drv, pdata->netdev, "SFP detected:\n"); in xgbe_phy_sfp_eeprom_info()
1254 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_NAME], in xgbe_phy_sfp_eeprom_info()
1257 netif_dbg(pdata, drv, pdata->netdev, " vendor: %s\n", in xgbe_phy_sfp_eeprom_info()
1260 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_PN], in xgbe_phy_sfp_eeprom_info()
1263 netif_dbg(pdata, drv, pdata->netdev, " part number: %s\n", in xgbe_phy_sfp_eeprom_info()
1266 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_REV], in xgbe_phy_sfp_eeprom_info()
1269 netif_dbg(pdata, drv, pdata->netdev, " revision level: %s\n", in xgbe_phy_sfp_eeprom_info()
1272 memcpy(sfp_data, &sfp_eeprom->extd[XGBE_SFP_BASE_VENDOR_SN], in xgbe_phy_sfp_eeprom_info()
1275 netif_dbg(pdata, drv, pdata->netdev, " serial number: %s\n", in xgbe_phy_sfp_eeprom_info()
1283 for (cc = 0; len; buf++, len--) in xgbe_phy_sfp_verify_eeprom()
1291 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_read_eeprom()
1298 dev_err_once(pdata->dev, "%s: I2C error setting SFP MUX\n", in xgbe_phy_sfp_read_eeprom()
1299 netdev_name(pdata->netdev)); in xgbe_phy_sfp_read_eeprom()
1309 dev_err_once(pdata->dev, "%s: I2C error reading SFP EEPROM\n", in xgbe_phy_sfp_read_eeprom()
1310 netdev_name(pdata->netdev)); in xgbe_phy_sfp_read_eeprom()
1317 sizeof(sfp_eeprom.base) - 1)) { in xgbe_phy_sfp_read_eeprom()
1318 ret = -EINVAL; in xgbe_phy_sfp_read_eeprom()
1324 sizeof(sfp_eeprom.extd) - 1)) { in xgbe_phy_sfp_read_eeprom()
1325 ret = -EINVAL; in xgbe_phy_sfp_read_eeprom()
1330 if (memcmp(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom))) { in xgbe_phy_sfp_read_eeprom()
1331 phy_data->sfp_changed = 1; in xgbe_phy_sfp_read_eeprom()
1336 memcpy(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom)); in xgbe_phy_sfp_read_eeprom()
1340 phy_data->sfp_changed = 0; in xgbe_phy_sfp_read_eeprom()
1351 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_signals()
1357 ret = xgbe_phy_i2c_read(pdata, phy_data->sfp_gpio_address, in xgbe_phy_sfp_signals()
1361 dev_err_once(pdata->dev, "%s: I2C error reading SFP GPIOs\n", in xgbe_phy_sfp_signals()
1362 netdev_name(pdata->netdev)); in xgbe_phy_sfp_signals()
1366 phy_data->sfp_gpio_inputs = (gpio_ports[1] << 8) | gpio_ports[0]; in xgbe_phy_sfp_signals()
1368 phy_data->sfp_mod_absent = xgbe_phy_check_sfp_mod_absent(phy_data); in xgbe_phy_sfp_signals()
1373 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_mod_absent()
1377 phy_data->sfp_mod_absent = 1; in xgbe_phy_sfp_mod_absent()
1378 phy_data->sfp_phy_avail = 0; in xgbe_phy_sfp_mod_absent()
1379 memset(&phy_data->sfp_eeprom, 0, sizeof(phy_data->sfp_eeprom)); in xgbe_phy_sfp_mod_absent()
1384 phy_data->sfp_rx_los = 0; in xgbe_phy_sfp_reset()
1385 phy_data->sfp_tx_fault = 0; in xgbe_phy_sfp_reset()
1386 phy_data->sfp_mod_absent = 1; in xgbe_phy_sfp_reset()
1387 phy_data->sfp_base = XGBE_SFP_BASE_UNKNOWN; in xgbe_phy_sfp_reset()
1388 phy_data->sfp_cable = XGBE_SFP_CABLE_UNKNOWN; in xgbe_phy_sfp_reset()
1389 phy_data->sfp_speed = XGBE_SFP_SPEED_UNKNOWN; in xgbe_phy_sfp_reset()
1394 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_detect()
1406 if (phy_data->sfp_mod_absent) { in xgbe_phy_sfp_detect()
1432 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_module_eeprom()
1438 rem = eeprom->len; in xgbe_phy_module_eeprom()
1440 if (!eeprom->len) { in xgbe_phy_module_eeprom()
1441 ret = -EINVAL; in xgbe_phy_module_eeprom()
1445 if ((eeprom->offset + eeprom->len) > XGBE_SFP_EEPROM_MAX) { in xgbe_phy_module_eeprom()
1446 ret = -EINVAL; in xgbe_phy_module_eeprom()
1450 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) { in xgbe_phy_module_eeprom()
1451 ret = -ENXIO; in xgbe_phy_module_eeprom()
1455 if (!netif_running(pdata->netdev)) { in xgbe_phy_module_eeprom()
1456 ret = -EIO; in xgbe_phy_module_eeprom()
1460 if (phy_data->sfp_mod_absent) { in xgbe_phy_module_eeprom()
1461 ret = -EIO; in xgbe_phy_module_eeprom()
1467 ret = -EIO; in xgbe_phy_module_eeprom()
1473 netdev_err(pdata->netdev, "I2C error setting SFP MUX\n"); in xgbe_phy_module_eeprom()
1474 ret = -EIO; in xgbe_phy_module_eeprom()
1484 netdev_err(pdata->netdev, in xgbe_phy_module_eeprom()
1486 ret = -EIO; in xgbe_phy_module_eeprom()
1500 netdev_err(pdata->netdev, in xgbe_phy_module_eeprom()
1502 ret = -EIO; in xgbe_phy_module_eeprom()
1507 for (i = 0, j = eeprom->offset; i < eeprom->len; i++, j++) { in xgbe_phy_module_eeprom()
1513 rem--; in xgbe_phy_module_eeprom()
1523 eeprom->len -= rem; in xgbe_phy_module_eeprom()
1531 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_module_info()
1533 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_module_info()
1534 return -ENXIO; in xgbe_phy_module_info()
1536 if (!netif_running(pdata->netdev)) in xgbe_phy_module_info()
1537 return -EIO; in xgbe_phy_module_info()
1539 if (phy_data->sfp_mod_absent) in xgbe_phy_module_info()
1540 return -EIO; in xgbe_phy_module_info()
1542 if (XGBE_SFP_DIAGS_SUPPORTED(&phy_data->sfp_eeprom)) { in xgbe_phy_module_info()
1543 modinfo->type = ETH_MODULE_SFF_8472; in xgbe_phy_module_info()
1544 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; in xgbe_phy_module_info()
1546 modinfo->type = ETH_MODULE_SFF_8079; in xgbe_phy_module_info()
1547 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; in xgbe_phy_module_info()
1555 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_phydev_flowctrl()
1556 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_phydev_flowctrl()
1560 pdata->phy.tx_pause = 0; in xgbe_phy_phydev_flowctrl()
1561 pdata->phy.rx_pause = 0; in xgbe_phy_phydev_flowctrl()
1563 if (!phy_data->phydev) in xgbe_phy_phydev_flowctrl()
1566 lcl_adv = linkmode_adv_to_lcl_adv_t(phy_data->phydev->advertising); in xgbe_phy_phydev_flowctrl()
1568 if (phy_data->phydev->pause) { in xgbe_phy_phydev_flowctrl()
1572 if (phy_data->phydev->asym_pause) { in xgbe_phy_phydev_flowctrl()
1579 pdata->phy.tx_pause = 1; in xgbe_phy_phydev_flowctrl()
1581 pdata->phy.rx_pause = 1; in xgbe_phy_phydev_flowctrl()
1586 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an37_sgmii_outcome()
1593 if (pdata->phy.pause_autoneg) in xgbe_phy_an37_sgmii_outcome()
1596 switch (pdata->an_status & XGBE_SGMII_AN_LINK_SPEED) { in xgbe_phy_an37_sgmii_outcome()
1598 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { in xgbe_phy_an37_sgmii_outcome()
1602 /* Half-duplex not supported */ in xgbe_phy_an37_sgmii_outcome()
1608 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { in xgbe_phy_an37_sgmii_outcome()
1612 /* Half-duplex not supported */ in xgbe_phy_an37_sgmii_outcome()
1618 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { in xgbe_phy_an37_sgmii_outcome()
1622 /* Half-duplex not supported */ in xgbe_phy_an37_sgmii_outcome()
1636 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an37_outcome()
1651 if (pdata->phy.pause_autoneg) { in xgbe_phy_an37_outcome()
1652 /* Set flow control based on auto-negotiation result */ in xgbe_phy_an37_outcome()
1653 pdata->phy.tx_pause = 0; in xgbe_phy_an37_outcome()
1654 pdata->phy.rx_pause = 0; in xgbe_phy_an37_outcome()
1657 pdata->phy.tx_pause = 1; in xgbe_phy_an37_outcome()
1658 pdata->phy.rx_pause = 1; in xgbe_phy_an37_outcome()
1661 pdata->phy.rx_pause = 1; in xgbe_phy_an37_outcome()
1663 pdata->phy.tx_pause = 1; in xgbe_phy_an37_outcome()
1679 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an73_redrv_outcome()
1680 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an73_redrv_outcome()
1688 if (pdata->phy.pause_autoneg) in xgbe_phy_an73_redrv_outcome()
1701 switch (phy_data->port_mode) { in xgbe_phy_an73_redrv_outcome()
1711 switch (phy_data->port_mode) { in xgbe_phy_an73_redrv_outcome()
1720 switch (phy_data->sfp_base) { in xgbe_phy_an73_redrv_outcome()
1722 if (phy_data->phydev && in xgbe_phy_an73_redrv_outcome()
1723 (phy_data->phydev->speed == SPEED_10)) in xgbe_phy_an73_redrv_outcome()
1725 else if (phy_data->phydev && in xgbe_phy_an73_redrv_outcome()
1726 (phy_data->phydev->speed == SPEED_100)) in xgbe_phy_an73_redrv_outcome()
1740 if (phy_data->phydev && in xgbe_phy_an73_redrv_outcome()
1741 (phy_data->phydev->speed == SPEED_10)) in xgbe_phy_an73_redrv_outcome()
1743 else if (phy_data->phydev && in xgbe_phy_an73_redrv_outcome()
1744 (phy_data->phydev->speed == SPEED_100)) in xgbe_phy_an73_redrv_outcome()
1765 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an73_outcome()
1780 if (pdata->phy.pause_autoneg) { in xgbe_phy_an73_outcome()
1781 /* Set flow control based on auto-negotiation result */ in xgbe_phy_an73_outcome()
1782 pdata->phy.tx_pause = 0; in xgbe_phy_an73_outcome()
1783 pdata->phy.rx_pause = 0; in xgbe_phy_an73_outcome()
1786 pdata->phy.tx_pause = 1; in xgbe_phy_an73_outcome()
1787 pdata->phy.rx_pause = 1; in xgbe_phy_an73_outcome()
1790 pdata->phy.rx_pause = 1; in xgbe_phy_an73_outcome()
1792 pdata->phy.tx_pause = 1; in xgbe_phy_an73_outcome()
1823 switch (pdata->an_mode) { in xgbe_phy_an_outcome()
1840 struct ethtool_link_ksettings *slks = &pdata->phy.lks; in xgbe_phy_an_advertising()
1841 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_advertising()
1845 /* Without a re-driver, just return current advertising */ in xgbe_phy_an_advertising()
1846 if (!phy_data->redrv) in xgbe_phy_an_advertising()
1849 /* With the KR re-driver we need to advertise a single speed */ in xgbe_phy_an_advertising()
1854 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_an_advertising()
1857 switch (phy_data->port_mode) { in xgbe_phy_an_advertising()
1871 if (phy_data->phydev && in xgbe_phy_an_advertising()
1872 (phy_data->phydev->speed == SPEED_10000)) in xgbe_phy_an_advertising()
1874 else if (phy_data->phydev && in xgbe_phy_an_advertising()
1875 (phy_data->phydev->speed == SPEED_2500)) in xgbe_phy_an_advertising()
1884 switch (phy_data->sfp_base) { in xgbe_phy_an_advertising()
1904 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an_config()
1905 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_config()
1912 if (!phy_data->phydev) in xgbe_phy_an_config()
1915 phy_data->phydev->autoneg = pdata->phy.autoneg; in xgbe_phy_an_config()
1916 linkmode_and(phy_data->phydev->advertising, in xgbe_phy_an_config()
1917 phy_data->phydev->supported, in xgbe_phy_an_config()
1918 lks->link_modes.advertising); in xgbe_phy_an_config()
1920 if (pdata->phy.autoneg != AUTONEG_ENABLE) { in xgbe_phy_an_config()
1921 phy_data->phydev->speed = pdata->phy.speed; in xgbe_phy_an_config()
1922 phy_data->phydev->duplex = pdata->phy.duplex; in xgbe_phy_an_config()
1925 ret = phy_start_aneg(phy_data->phydev); in xgbe_phy_an_config()
1932 switch (phy_data->sfp_base) { in xgbe_phy_an_sfp_mode()
1946 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_mode()
1948 /* A KR re-driver will always require CL73 AN */ in xgbe_phy_an_mode()
1949 if (phy_data->redrv) in xgbe_phy_an_mode()
1952 switch (phy_data->port_mode) { in xgbe_phy_an_mode()
1978 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode_mdio()
1981 redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000); in xgbe_phy_set_redrv_mode_mdio()
1984 return pdata->hw_if.write_ext_mii_regs_c22(pdata, phy_data->redrv_addr, in xgbe_phy_set_redrv_mode_mdio()
1991 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode_i2c()
1996 redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000); in xgbe_phy_set_redrv_mode_i2c()
2005 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode()
2009 if (!phy_data->redrv) in xgbe_phy_set_redrv_mode()
2013 if ((phy_data->port_mode == XGBE_PORT_MODE_SFP) && in xgbe_phy_set_redrv_mode()
2014 (phy_data->sfp_base != XGBE_SFP_BASE_1000_CX) && in xgbe_phy_set_redrv_mode()
2015 (phy_data->sfp_base != XGBE_SFP_BASE_10000_CR)) in xgbe_phy_set_redrv_mode()
2022 if (phy_data->redrv_if) in xgbe_phy_set_redrv_mode()
2037 if (pdata->rx_adapt_retries++ >= MAX_RX_ADAPT_RETRIES) { in xgbe_set_rx_adap_mode()
2038 pdata->rx_adapt_retries = 0; in xgbe_set_rx_adap_mode()
2051 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_rx_adaptation()
2083 netif_dbg(pdata, link, pdata->netdev, "Block_lock done"); in xgbe_rx_adaptation()
2084 pdata->rx_adapt_done = true; in xgbe_rx_adaptation()
2085 pdata->mode_set = false; in xgbe_rx_adaptation()
2090 xgbe_set_rx_adap_mode(pdata, phy_data->cur_mode); in xgbe_rx_adaptation()
2103 netif_dbg(pdata, link, pdata->netdev, in xgbe_phy_rx_adaptation()
2106 if (pdata->rx_adapt_retries++ >= MAX_RX_ADAPT_RETRIES) { in xgbe_phy_rx_adaptation()
2107 pdata->rx_adapt_retries = 0; in xgbe_phy_rx_adaptation()
2134 netif_err(pdata, link, pdata->netdev, "firmware mailbox reset performed\n"); in xgbe_phy_rx_reset()
2140 /* PLL_CTRL feature needs to be enabled for fixed PHY modes (Non-Autoneg) only */ in xgbe_phy_pll_ctrl()
2141 if (pdata->phy.autoneg != AUTONEG_DISABLE) in xgbe_phy_pll_ctrl()
2159 /* Disable PLL re-initialization during FW command processing */ in xgbe_phy_perform_ratechange()
2164 netif_dbg(pdata, link, pdata->netdev, in xgbe_phy_perform_ratechange()
2180 while (wait--) { in xgbe_phy_perform_ratechange()
2187 netif_dbg(pdata, link, pdata->netdev, in xgbe_phy_perform_ratechange()
2195 if (pdata->en_rx_adap && sub_cmd == XGBE_MB_SUBCMD_RX_ADAP && in xgbe_phy_perform_ratechange()
2197 netif_dbg(pdata, link, pdata->netdev, in xgbe_phy_perform_ratechange()
2199 pdata->mode_set = true; in xgbe_phy_perform_ratechange()
2208 /* Enable PLL re-initialization, not needed for PHY Power Off and RRC cmds */ in xgbe_phy_perform_ratechange()
2219 netif_dbg(pdata, link, pdata->netdev, "receiver reset complete\n"); in xgbe_phy_rrc()
2224 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_power_off()
2229 phy_data->cur_mode = XGBE_MODE_UNKNOWN; in xgbe_phy_power_off()
2231 netif_dbg(pdata, link, pdata->netdev, "phy powered off\n"); in xgbe_phy_power_off()
2236 struct xgbe_phy_data *phy_data = pdata->phy_data; in enable_rx_adap()
2239 /* Rx-Adaptation is not supported on older platforms(< 0x30H) */ in enable_rx_adap()
2240 ver = XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER); in enable_rx_adap()
2244 /* Re-driver models 4223 && 4227 do not support Rx-Adaptation */ in enable_rx_adap()
2245 if (phy_data->redrv && in enable_rx_adap()
2246 (phy_data->redrv_model == XGBE_PHY_REDRV_MODEL_4223 || in enable_rx_adap()
2247 phy_data->redrv_model == XGBE_PHY_REDRV_MODEL_4227)) in enable_rx_adap()
2250 /* 10G KR mode with AN does not support Rx-Adaptation */ in enable_rx_adap()
2252 phy_data->port_mode != XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG) in enable_rx_adap()
2255 pdata->en_rx_adap = 1; in enable_rx_adap()
2261 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfi_mode()
2266 if (phy_data->sfp_cable != XGBE_SFP_CABLE_PASSIVE) { in xgbe_phy_sfi_mode()
2267 pdata->en_rx_adap = 0; in xgbe_phy_sfi_mode()
2269 } else if ((phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE) && in xgbe_phy_sfi_mode()
2274 if (phy_data->sfp_cable_len <= 1) in xgbe_phy_sfi_mode()
2277 else if (phy_data->sfp_cable_len <= 3) in xgbe_phy_sfi_mode()
2285 phy_data->cur_mode = XGBE_MODE_SFI; in xgbe_phy_sfi_mode()
2287 netif_dbg(pdata, link, pdata->netdev, "10GbE SFI mode set\n"); in xgbe_phy_sfi_mode()
2292 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_x_mode()
2296 /* 1G/X */ in xgbe_phy_x_mode()
2299 phy_data->cur_mode = XGBE_MODE_X; in xgbe_phy_x_mode()
2301 netif_dbg(pdata, link, pdata->netdev, "1GbE X mode set\n"); in xgbe_phy_x_mode()
2306 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sgmii_1000_mode()
2313 phy_data->cur_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_sgmii_1000_mode()
2315 netif_dbg(pdata, link, pdata->netdev, "1GbE SGMII mode set\n"); in xgbe_phy_sgmii_1000_mode()
2320 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sgmii_100_mode()
2327 phy_data->cur_mode = XGBE_MODE_SGMII_100; in xgbe_phy_sgmii_100_mode()
2329 netif_dbg(pdata, link, pdata->netdev, "100MbE SGMII mode set\n"); in xgbe_phy_sgmii_100_mode()
2334 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sgmii_10_mode()
2341 phy_data->cur_mode = XGBE_MODE_SGMII_10; in xgbe_phy_sgmii_10_mode()
2343 netif_dbg(pdata, link, pdata->netdev, "10MbE SGMII mode set\n"); in xgbe_phy_sgmii_10_mode()
2348 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kr_mode()
2360 phy_data->cur_mode = XGBE_MODE_KR; in xgbe_phy_kr_mode()
2362 netif_dbg(pdata, link, pdata->netdev, "10GbE KR mode set\n"); in xgbe_phy_kr_mode()
2367 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kx_2500_mode()
2374 phy_data->cur_mode = XGBE_MODE_KX_2500; in xgbe_phy_kx_2500_mode()
2376 netif_dbg(pdata, link, pdata->netdev, "2.5GbE KX mode set\n"); in xgbe_phy_kx_2500_mode()
2381 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kx_1000_mode()
2388 phy_data->cur_mode = XGBE_MODE_KX_1000; in xgbe_phy_kx_1000_mode()
2390 netif_dbg(pdata, link, pdata->netdev, "1GbE KX mode set\n"); in xgbe_phy_kx_1000_mode()
2395 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cur_mode()
2397 return phy_data->cur_mode; in xgbe_phy_cur_mode()
2402 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_switch_baset_mode()
2404 /* No switching if not 10GBase-T */ in xgbe_phy_switch_baset_mode()
2405 if (phy_data->port_mode != XGBE_PORT_MODE_10GBASE_T) in xgbe_phy_switch_baset_mode()
2428 /* If we are in KR switch to KX, and vice-versa */ in xgbe_phy_switch_bp_mode()
2440 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_switch_mode()
2442 switch (phy_data->port_mode) { in xgbe_phy_switch_mode()
2503 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) in xgbe_phy_get_sfp_mode()
2540 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_get_mode()
2542 switch (phy_data->port_mode) { in xgbe_phy_get_mode()
2597 if (pdata->phy.autoneg == AUTONEG_ENABLE) { in xgbe_phy_check_mode()
2602 cur_mode = xgbe_phy_get_mode(pdata, pdata->phy.speed); in xgbe_phy_check_mode()
2613 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_basex_mode()
2630 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_baset_mode()
2656 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_sfp_mode()
2657 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_use_sfp_mode()
2661 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2666 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2671 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2676 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2681 if (phy_data->sfp_mod_absent) in xgbe_phy_use_sfp_mode()
2697 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_bp_2500_mode()
2711 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_bp_mode()
2727 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_use_mode()
2729 switch (phy_data->port_mode) { in xgbe_phy_use_mode()
2754 return (phy_data->port_mode == XGBE_PORT_MODE_1000BASE_X); in xgbe_phy_valid_speed_basex_mode()
2756 return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_R); in xgbe_phy_valid_speed_basex_mode()
2765 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_valid_speed_baset_mode()
2771 ver = XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER); in xgbe_phy_valid_speed_baset_mode()
2777 return ((phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T) || in xgbe_phy_valid_speed_baset_mode()
2778 (phy_data->port_mode == XGBE_PORT_MODE_NBASE_T)); in xgbe_phy_valid_speed_baset_mode()
2780 return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T); in xgbe_phy_valid_speed_baset_mode()
2789 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_valid_speed_sfp_mode()
2795 ver = XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER); in xgbe_phy_valid_speed_sfp_mode()
2797 (phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000)); in xgbe_phy_valid_speed_sfp_mode()
2799 return (phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000); in xgbe_phy_valid_speed_sfp_mode()
2801 return ((phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000) || in xgbe_phy_valid_speed_sfp_mode()
2802 (phy_data->sfp_speed == XGBE_SFP_SPEED_1000)); in xgbe_phy_valid_speed_sfp_mode()
2804 return (phy_data->sfp_speed == XGBE_SFP_SPEED_10000); in xgbe_phy_valid_speed_sfp_mode()
2833 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_valid_speed()
2835 switch (phy_data->port_mode) { in xgbe_phy_valid_speed()
2857 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_link_status()
2863 if (phy_data->port_mode == XGBE_PORT_MODE_SFP) { in xgbe_phy_link_status()
2867 if (phy_data->sfp_changed) { in xgbe_phy_link_status()
2872 if (phy_data->sfp_mod_absent || phy_data->sfp_rx_los) { in xgbe_phy_link_status()
2873 if (pdata->en_rx_adap) in xgbe_phy_link_status()
2874 pdata->rx_adapt_done = false; in xgbe_phy_link_status()
2879 if (phy_data->phydev) { in xgbe_phy_link_status()
2881 ret = phy_read_status(phy_data->phydev); in xgbe_phy_link_status()
2885 if ((pdata->phy.autoneg == AUTONEG_ENABLE) && in xgbe_phy_link_status()
2886 !phy_aneg_done(phy_data->phydev)) in xgbe_phy_link_status()
2889 if (!phy_data->phydev->link) in xgbe_phy_link_status()
2899 if (pdata->en_rx_adap) { in xgbe_phy_link_status()
2903 if ((reg & MDIO_STAT1_LSTATUS) && pdata->rx_adapt_done) in xgbe_phy_link_status()
2909 if (pdata->mode_set) { in xgbe_phy_link_status()
2912 pdata->rx_adapt_done = false; in xgbe_phy_link_status()
2913 xgbe_phy_set_mode(pdata, phy_data->cur_mode); in xgbe_phy_link_status()
2918 if ((reg & MDIO_STAT1_LSTATUS) && pdata->rx_adapt_done) in xgbe_phy_link_status()
2923 if (pdata->phy.autoneg == AUTONEG_ENABLE && in xgbe_phy_link_status()
2924 phy_data->port_mode == XGBE_PORT_MODE_BACKPLANE) { in xgbe_phy_link_status()
2925 if (!test_bit(XGBE_LINK_INIT, &pdata->dev_state)) { in xgbe_phy_link_status()
2926 netif_carrier_off(pdata->netdev); in xgbe_phy_link_status()
2932 if (pdata->vdata->enable_rrc && phy_data->rrc_count++ > XGBE_RRC_FREQUENCY) { in xgbe_phy_link_status()
2933 phy_data->rrc_count = 0; in xgbe_phy_link_status()
2942 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_gpio_setup()
2944 phy_data->sfp_gpio_address = XGBE_GPIO_ADDRESS_PCA9555 + in xgbe_phy_sfp_gpio_setup()
2945 XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2948 phy_data->sfp_gpio_mask = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2951 phy_data->sfp_gpio_rx_los = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2953 phy_data->sfp_gpio_tx_fault = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2955 phy_data->sfp_gpio_mod_absent = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2957 phy_data->sfp_gpio_rate_select = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2961 dev_dbg(pdata->dev, "SFP: gpio_address=%#x\n", in xgbe_phy_sfp_gpio_setup()
2962 phy_data->sfp_gpio_address); in xgbe_phy_sfp_gpio_setup()
2963 dev_dbg(pdata->dev, "SFP: gpio_mask=%#x\n", in xgbe_phy_sfp_gpio_setup()
2964 phy_data->sfp_gpio_mask); in xgbe_phy_sfp_gpio_setup()
2965 dev_dbg(pdata->dev, "SFP: gpio_rx_los=%u\n", in xgbe_phy_sfp_gpio_setup()
2966 phy_data->sfp_gpio_rx_los); in xgbe_phy_sfp_gpio_setup()
2967 dev_dbg(pdata->dev, "SFP: gpio_tx_fault=%u\n", in xgbe_phy_sfp_gpio_setup()
2968 phy_data->sfp_gpio_tx_fault); in xgbe_phy_sfp_gpio_setup()
2969 dev_dbg(pdata->dev, "SFP: gpio_mod_absent=%u\n", in xgbe_phy_sfp_gpio_setup()
2970 phy_data->sfp_gpio_mod_absent); in xgbe_phy_sfp_gpio_setup()
2971 dev_dbg(pdata->dev, "SFP: gpio_rate_select=%u\n", in xgbe_phy_sfp_gpio_setup()
2972 phy_data->sfp_gpio_rate_select); in xgbe_phy_sfp_gpio_setup()
2978 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_comm_setup()
2981 mux_addr_hi = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_HI); in xgbe_phy_sfp_comm_setup()
2982 mux_addr_lo = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_LO); in xgbe_phy_sfp_comm_setup()
2986 phy_data->sfp_comm = XGBE_SFP_COMM_PCA9545; in xgbe_phy_sfp_comm_setup()
2987 phy_data->sfp_mux_address = (mux_addr_hi << 2) + mux_addr_lo; in xgbe_phy_sfp_comm_setup()
2988 phy_data->sfp_mux_channel = XP_GET_BITS(pdata->pp4, XP_PROP_4, in xgbe_phy_sfp_comm_setup()
2992 dev_dbg(pdata->dev, "SFP: mux_address=%#x\n", in xgbe_phy_sfp_comm_setup()
2993 phy_data->sfp_mux_address); in xgbe_phy_sfp_comm_setup()
2994 dev_dbg(pdata->dev, "SFP: mux_channel=%u\n", in xgbe_phy_sfp_comm_setup()
2995 phy_data->sfp_mux_channel); in xgbe_phy_sfp_comm_setup()
3007 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_int_mdio_reset()
3010 ret = pdata->hw_if.set_gpio(pdata, phy_data->mdio_reset_gpio); in xgbe_phy_int_mdio_reset()
3014 ret = pdata->hw_if.clr_gpio(pdata, phy_data->mdio_reset_gpio); in xgbe_phy_int_mdio_reset()
3021 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_i2c_mdio_reset()
3027 ret = xgbe_phy_i2c_read(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
3039 if (phy_data->mdio_reset_gpio < 8) in xgbe_phy_i2c_mdio_reset()
3040 gpio_data[1] |= (1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
3042 gpio_data[2] |= (1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
3045 ret = xgbe_phy_i2c_write(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
3051 if (phy_data->mdio_reset_gpio < 8) in xgbe_phy_i2c_mdio_reset()
3052 gpio_data[1] &= ~(1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
3054 gpio_data[2] &= ~(1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
3057 ret = xgbe_phy_i2c_write(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
3065 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_reset()
3068 if (phy_data->conn_type != XGBE_CONN_TYPE_MDIO) in xgbe_phy_mdio_reset()
3075 if (phy_data->mdio_reset == XGBE_MDIO_RESET_I2C_GPIO) in xgbe_phy_mdio_reset()
3077 else if (phy_data->mdio_reset == XGBE_MDIO_RESET_INT_GPIO) in xgbe_phy_mdio_reset()
3087 if (!phy_data->redrv) in xgbe_phy_redrv_error()
3090 if (phy_data->redrv_if >= XGBE_PHY_REDRV_IF_MAX) in xgbe_phy_redrv_error()
3093 switch (phy_data->redrv_model) { in xgbe_phy_redrv_error()
3095 if (phy_data->redrv_lane > 3) in xgbe_phy_redrv_error()
3099 if (phy_data->redrv_lane > 1) in xgbe_phy_redrv_error()
3111 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_reset_setup()
3113 if (phy_data->conn_type != XGBE_CONN_TYPE_MDIO) in xgbe_phy_mdio_reset_setup()
3116 phy_data->mdio_reset = XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET); in xgbe_phy_mdio_reset_setup()
3117 switch (phy_data->mdio_reset) { in xgbe_phy_mdio_reset_setup()
3123 dev_err(pdata->dev, "unsupported MDIO reset (%#x)\n", in xgbe_phy_mdio_reset_setup()
3124 phy_data->mdio_reset); in xgbe_phy_mdio_reset_setup()
3125 return -EINVAL; in xgbe_phy_mdio_reset_setup()
3128 if (phy_data->mdio_reset == XGBE_MDIO_RESET_I2C_GPIO) { in xgbe_phy_mdio_reset_setup()
3129 phy_data->mdio_reset_addr = XGBE_GPIO_ADDRESS_PCA9555 + in xgbe_phy_mdio_reset_setup()
3130 XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
3132 phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
3134 } else if (phy_data->mdio_reset == XGBE_MDIO_RESET_INT_GPIO) { in xgbe_phy_mdio_reset_setup()
3135 phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
3144 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_port_mode_mismatch()
3148 ver = XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER); in xgbe_phy_port_mode_mismatch()
3149 if ((ver < 0x30 && ver != 0x21) && (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10)) in xgbe_phy_port_mode_mismatch()
3152 switch (phy_data->port_mode) { in xgbe_phy_port_mode_mismatch()
3155 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
3156 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
3160 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) in xgbe_phy_port_mode_mismatch()
3164 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) || in xgbe_phy_port_mode_mismatch()
3165 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
3166 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000)) in xgbe_phy_port_mode_mismatch()
3170 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_port_mode_mismatch()
3174 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) || in xgbe_phy_port_mode_mismatch()
3175 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
3176 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
3177 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500)) in xgbe_phy_port_mode_mismatch()
3181 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) || in xgbe_phy_port_mode_mismatch()
3182 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
3183 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
3184 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) || in xgbe_phy_port_mode_mismatch()
3185 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
3189 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) in xgbe_phy_port_mode_mismatch()
3193 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) || in xgbe_phy_port_mode_mismatch()
3194 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
3195 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
3196 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
3208 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_conn_type_mismatch()
3210 switch (phy_data->port_mode) { in xgbe_phy_conn_type_mismatch()
3214 if (phy_data->conn_type == XGBE_CONN_TYPE_BACKPLANE) in xgbe_phy_conn_type_mismatch()
3222 if (phy_data->conn_type == XGBE_CONN_TYPE_MDIO) in xgbe_phy_conn_type_mismatch()
3226 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_conn_type_mismatch()
3238 if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS)) in xgbe_phy_port_enabled()
3240 if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE)) in xgbe_phy_port_enabled()
3248 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cdr_track()
3250 if (!pdata->debugfs_an_cdr_workaround) in xgbe_phy_cdr_track()
3253 if (!phy_data->phy_cdr_notrack) in xgbe_phy_cdr_track()
3256 usleep_range(phy_data->phy_cdr_delay, in xgbe_phy_cdr_track()
3257 phy_data->phy_cdr_delay + 500); in xgbe_phy_cdr_track()
3263 phy_data->phy_cdr_notrack = 0; in xgbe_phy_cdr_track()
3268 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cdr_notrack()
3270 if (!pdata->debugfs_an_cdr_workaround) in xgbe_phy_cdr_notrack()
3273 if (phy_data->phy_cdr_notrack) in xgbe_phy_cdr_notrack()
3282 phy_data->phy_cdr_notrack = 1; in xgbe_phy_cdr_notrack()
3287 if (!pdata->debugfs_an_cdr_track_early) in xgbe_phy_kr_training_post()
3293 if (pdata->debugfs_an_cdr_track_early) in xgbe_phy_kr_training_pre()
3299 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_post()
3301 switch (pdata->an_mode) { in xgbe_phy_an_post()
3304 if (phy_data->cur_mode != XGBE_MODE_KR) in xgbe_phy_an_post()
3309 switch (pdata->an_result) { in xgbe_phy_an_post()
3314 if (phy_data->phy_cdr_delay < XGBE_CDR_DELAY_MAX) in xgbe_phy_an_post()
3315 phy_data->phy_cdr_delay += XGBE_CDR_DELAY_INC; in xgbe_phy_an_post()
3317 phy_data->phy_cdr_delay = XGBE_CDR_DELAY_INIT; in xgbe_phy_an_post()
3328 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_pre()
3330 switch (pdata->an_mode) { in xgbe_phy_an_pre()
3333 if (phy_data->cur_mode != XGBE_MODE_KR) in xgbe_phy_an_pre()
3345 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_stop()
3361 pdata->i2c_if.i2c_stop(pdata); in xgbe_phy_stop()
3366 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_start()
3370 ret = pdata->i2c_if.i2c_start(pdata); in xgbe_phy_start()
3374 /* Set the proper MDIO mode for the re-driver */ in xgbe_phy_start()
3375 if (phy_data->redrv && !phy_data->redrv_if) { in xgbe_phy_start()
3376 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->redrv_addr, in xgbe_phy_start()
3379 netdev_err(pdata->netdev, in xgbe_phy_start()
3381 phy_data->redrv_addr); in xgbe_phy_start()
3387 xgbe_phy_set_mode(pdata, phy_data->start_mode); in xgbe_phy_start()
3393 switch (phy_data->port_mode) { in xgbe_phy_start()
3409 pdata->i2c_if.i2c_stop(pdata); in xgbe_phy_start()
3416 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_reset()
3421 cur_mode = phy_data->cur_mode; in xgbe_phy_reset()
3425 if (!phy_data->phydev) in xgbe_phy_reset()
3433 return phy_init_hw(phy_data->phydev); in xgbe_phy_reset()
3438 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_exit()
3441 mdiobus_unregister(phy_data->mii); in xgbe_phy_exit()
3446 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_init()
3453 dev_info(pdata->dev, "device is not enabled\n"); in xgbe_phy_init()
3454 return -ENODEV; in xgbe_phy_init()
3458 ret = pdata->i2c_if.i2c_init(pdata); in xgbe_phy_init()
3462 phy_data = devm_kzalloc(pdata->dev, sizeof(*phy_data), GFP_KERNEL); in xgbe_phy_init()
3464 return -ENOMEM; in xgbe_phy_init()
3465 pdata->phy_data = phy_data; in xgbe_phy_init()
3467 phy_data->port_mode = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_MODE); in xgbe_phy_init()
3468 phy_data->port_id = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_ID); in xgbe_phy_init()
3469 phy_data->port_speeds = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS); in xgbe_phy_init()
3470 phy_data->conn_type = XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE); in xgbe_phy_init()
3471 phy_data->mdio_addr = XP_GET_BITS(pdata->pp0, XP_PROP_0, MDIO_ADDR); in xgbe_phy_init()
3473 dev_dbg(pdata->dev, "port mode=%u\n", phy_data->port_mode); in xgbe_phy_init()
3474 dev_dbg(pdata->dev, "port id=%u\n", phy_data->port_id); in xgbe_phy_init()
3475 dev_dbg(pdata->dev, "port speeds=%#x\n", phy_data->port_speeds); in xgbe_phy_init()
3476 dev_dbg(pdata->dev, "conn type=%u\n", phy_data->conn_type); in xgbe_phy_init()
3477 dev_dbg(pdata->dev, "mdio addr=%u\n", phy_data->mdio_addr); in xgbe_phy_init()
3480 phy_data->redrv = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_PRESENT); in xgbe_phy_init()
3481 phy_data->redrv_if = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_IF); in xgbe_phy_init()
3482 phy_data->redrv_addr = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_ADDR); in xgbe_phy_init()
3483 phy_data->redrv_lane = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_LANE); in xgbe_phy_init()
3484 phy_data->redrv_model = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_MODEL); in xgbe_phy_init()
3485 if (phy_data->redrv && netif_msg_probe(pdata)) { in xgbe_phy_init()
3486 dev_dbg(pdata->dev, "redrv present\n"); in xgbe_phy_init()
3487 dev_dbg(pdata->dev, "redrv i/f=%u\n", phy_data->redrv_if); in xgbe_phy_init()
3488 dev_dbg(pdata->dev, "redrv addr=%#x\n", phy_data->redrv_addr); in xgbe_phy_init()
3489 dev_dbg(pdata->dev, "redrv lane=%u\n", phy_data->redrv_lane); in xgbe_phy_init()
3490 dev_dbg(pdata->dev, "redrv model=%u\n", phy_data->redrv_model); in xgbe_phy_init()
3495 dev_err(pdata->dev, "phy mode/connection mismatch (%#x/%#x)\n", in xgbe_phy_init()
3496 phy_data->port_mode, phy_data->conn_type); in xgbe_phy_init()
3497 return -EINVAL; in xgbe_phy_init()
3502 dev_err(pdata->dev, "phy mode/speed mismatch (%#x/%#x)\n", in xgbe_phy_init()
3503 phy_data->port_mode, phy_data->port_speeds); in xgbe_phy_init()
3504 return -EINVAL; in xgbe_phy_init()
3512 /* Validate the re-driver information */ in xgbe_phy_init()
3514 dev_err(pdata->dev, "phy re-driver settings error\n"); in xgbe_phy_init()
3515 return -EINVAL; in xgbe_phy_init()
3517 pdata->kr_redrv = phy_data->redrv; in xgbe_phy_init()
3520 phy_data->cur_mode = XGBE_MODE_UNKNOWN; in xgbe_phy_init()
3525 switch (phy_data->port_mode) { in xgbe_phy_init()
3534 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3536 phy_data->start_mode = XGBE_MODE_KX_1000; in xgbe_phy_init()
3538 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_init()
3540 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_init()
3542 phy_data->start_mode = XGBE_MODE_KR; in xgbe_phy_init()
3545 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3552 phy_data->start_mode = XGBE_MODE_KX_2500; in xgbe_phy_init()
3554 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3557 /* MDIO 1GBase-T support */ in xgbe_phy_init()
3563 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) { in xgbe_phy_init()
3565 phy_data->start_mode = XGBE_MODE_SGMII_10; in xgbe_phy_init()
3567 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3569 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3571 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3573 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3576 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3579 /* MDIO Base-X support */ in xgbe_phy_init()
3586 phy_data->start_mode = XGBE_MODE_X; in xgbe_phy_init()
3588 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3591 /* MDIO NBase-T support */ in xgbe_phy_init()
3597 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) { in xgbe_phy_init()
3599 phy_data->start_mode = XGBE_MODE_SGMII_10; in xgbe_phy_init()
3601 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3603 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3605 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3607 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3609 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) { in xgbe_phy_init()
3611 phy_data->start_mode = XGBE_MODE_KX_2500; in xgbe_phy_init()
3614 phy_data->phydev_mode = XGBE_MDIO_MODE_CL45; in xgbe_phy_init()
3617 /* 10GBase-T support */ in xgbe_phy_init()
3623 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) { in xgbe_phy_init()
3625 phy_data->start_mode = XGBE_MODE_SGMII_10; in xgbe_phy_init()
3627 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3629 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3631 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3633 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3635 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) { in xgbe_phy_init()
3637 phy_data->start_mode = XGBE_MODE_KX_2500; in xgbe_phy_init()
3639 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_init()
3641 phy_data->start_mode = XGBE_MODE_KR; in xgbe_phy_init()
3644 phy_data->phydev_mode = XGBE_MDIO_MODE_CL45; in xgbe_phy_init()
3647 /* 10GBase-R support */ in xgbe_phy_init()
3657 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_init()
3659 phy_data->start_mode = XGBE_MODE_SFI; in xgbe_phy_init()
3661 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3671 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) in xgbe_phy_init()
3672 phy_data->start_mode = XGBE_MODE_SGMII_10; in xgbe_phy_init()
3673 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) in xgbe_phy_init()
3674 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3675 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_init()
3676 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3677 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) in xgbe_phy_init()
3678 phy_data->start_mode = XGBE_MODE_SFI; in xgbe_phy_init()
3680 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3685 return -EINVAL; in xgbe_phy_init()
3689 dev_dbg(pdata->dev, "phy supported=0x%*pb\n", in xgbe_phy_init()
3691 lks->link_modes.supported); in xgbe_phy_init()
3693 if ((phy_data->conn_type & XGBE_CONN_TYPE_MDIO) && in xgbe_phy_init()
3694 (phy_data->phydev_mode != XGBE_MDIO_MODE_NONE)) { in xgbe_phy_init()
3695 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->mdio_addr, in xgbe_phy_init()
3696 phy_data->phydev_mode); in xgbe_phy_init()
3698 dev_err(pdata->dev, in xgbe_phy_init()
3700 phy_data->mdio_addr, phy_data->phydev_mode); in xgbe_phy_init()
3701 return -EINVAL; in xgbe_phy_init()
3705 if (phy_data->redrv && !phy_data->redrv_if) { in xgbe_phy_init()
3706 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->redrv_addr, in xgbe_phy_init()
3709 dev_err(pdata->dev, in xgbe_phy_init()
3711 phy_data->redrv_addr); in xgbe_phy_init()
3712 return -EINVAL; in xgbe_phy_init()
3716 phy_data->phy_cdr_delay = XGBE_CDR_DELAY_INIT; in xgbe_phy_init()
3719 mii = devm_mdiobus_alloc(pdata->dev); in xgbe_phy_init()
3721 dev_err(pdata->dev, "mdiobus_alloc failed\n"); in xgbe_phy_init()
3722 return -ENOMEM; in xgbe_phy_init()
3725 mii->priv = pdata; in xgbe_phy_init()
3726 mii->name = "amd-xgbe-mii"; in xgbe_phy_init()
3727 mii->read = xgbe_phy_mii_read_c22; in xgbe_phy_init()
3728 mii->write = xgbe_phy_mii_write_c22; in xgbe_phy_init()
3729 mii->read_c45 = xgbe_phy_mii_read_c45; in xgbe_phy_init()
3730 mii->write_c45 = xgbe_phy_mii_write_c45; in xgbe_phy_init()
3731 mii->parent = pdata->dev; in xgbe_phy_init()
3732 mii->phy_mask = ~0; in xgbe_phy_init()
3733 snprintf(mii->id, sizeof(mii->id), "%s", dev_name(pdata->dev)); in xgbe_phy_init()
3736 dev_err(pdata->dev, "mdiobus_register failed\n"); in xgbe_phy_init()
3739 phy_data->mii = mii; in xgbe_phy_init()
3746 struct xgbe_phy_impl_if *phy_impl = &phy_if->phy_impl; in xgbe_init_function_ptrs_phy_v2()
3748 phy_impl->init = xgbe_phy_init; in xgbe_init_function_ptrs_phy_v2()
3749 phy_impl->exit = xgbe_phy_exit; in xgbe_init_function_ptrs_phy_v2()
3751 phy_impl->reset = xgbe_phy_reset; in xgbe_init_function_ptrs_phy_v2()
3752 phy_impl->start = xgbe_phy_start; in xgbe_init_function_ptrs_phy_v2()
3753 phy_impl->stop = xgbe_phy_stop; in xgbe_init_function_ptrs_phy_v2()
3755 phy_impl->link_status = xgbe_phy_link_status; in xgbe_init_function_ptrs_phy_v2()
3757 phy_impl->valid_speed = xgbe_phy_valid_speed; in xgbe_init_function_ptrs_phy_v2()
3759 phy_impl->use_mode = xgbe_phy_use_mode; in xgbe_init_function_ptrs_phy_v2()
3760 phy_impl->set_mode = xgbe_phy_set_mode; in xgbe_init_function_ptrs_phy_v2()
3761 phy_impl->get_mode = xgbe_phy_get_mode; in xgbe_init_function_ptrs_phy_v2()
3762 phy_impl->switch_mode = xgbe_phy_switch_mode; in xgbe_init_function_ptrs_phy_v2()
3763 phy_impl->cur_mode = xgbe_phy_cur_mode; in xgbe_init_function_ptrs_phy_v2()
3765 phy_impl->an_mode = xgbe_phy_an_mode; in xgbe_init_function_ptrs_phy_v2()
3767 phy_impl->an_config = xgbe_phy_an_config; in xgbe_init_function_ptrs_phy_v2()
3769 phy_impl->an_advertising = xgbe_phy_an_advertising; in xgbe_init_function_ptrs_phy_v2()
3771 phy_impl->an_outcome = xgbe_phy_an_outcome; in xgbe_init_function_ptrs_phy_v2()
3773 phy_impl->an_pre = xgbe_phy_an_pre; in xgbe_init_function_ptrs_phy_v2()
3774 phy_impl->an_post = xgbe_phy_an_post; in xgbe_init_function_ptrs_phy_v2()
3776 phy_impl->kr_training_pre = xgbe_phy_kr_training_pre; in xgbe_init_function_ptrs_phy_v2()
3777 phy_impl->kr_training_post = xgbe_phy_kr_training_post; in xgbe_init_function_ptrs_phy_v2()
3779 phy_impl->module_info = xgbe_phy_module_info; in xgbe_init_function_ptrs_phy_v2()
3780 phy_impl->module_eeprom = xgbe_phy_module_eeprom; in xgbe_init_function_ptrs_phy_v2()