Lines Matching refs:u32
38 u32 offset; in get_sq_desc_regular_queue()
53 u32 dst_offset; in ena_com_write_bounce_buffer_to_dev()
237 u32 last = 0; in ena_com_cdesc_rx_pkt_get()
286 meta_desc->word2 |= ((u32)ena_meta->mss << in ena_com_create_meta()
296 meta_desc->len_ctrl |= ((u32)io_sq->phase << in ena_com_create_meta()
309 meta_desc->word2 |= ((u32)ena_meta->l4_hdr_len << in ena_com_create_meta()
441 desc->buff_addr_hi_hdr_sz |= ((u32)header_len << in ena_com_prepare_tx()
444 desc->len_ctrl |= ((u32)io_sq->phase << ENA_ETH_IO_TX_DESC_PHASE_SHIFT) & in ena_com_prepare_tx()
450 desc->meta_ctrl |= ((u32)ena_tx_ctx->req_id << in ena_com_prepare_tx()
499 desc->len_ctrl |= ((u32)io_sq->phase << in ena_com_prepare_tx()
510 desc->buff_addr_lo = (u32)ena_bufs->paddr; in ena_com_prepare_tx()
621 desc->buff_addr_lo = (u32)ena_buf->paddr; in ena_com_add_single_rx_desc()