Lines Matching refs:ena_dev
71 static int ena_com_mem_addr_set(struct ena_com_dev *ena_dev, in ena_com_mem_addr_set() argument
75 if ((addr & GENMASK_ULL(ena_dev->dma_addr_bits - 1, 0)) != addr) { in ena_com_mem_addr_set()
76 netdev_err(ena_dev->net_device, in ena_com_mem_addr_set()
89 struct ena_com_dev *ena_dev = admin_queue->ena_dev; in ena_com_admin_init_sq() local
96 netdev_err(ena_dev->net_device, "Memory allocation failed\n"); in ena_com_admin_init_sq()
111 struct ena_com_dev *ena_dev = admin_queue->ena_dev; in ena_com_admin_init_cq() local
118 netdev_err(ena_dev->net_device, "Memory allocation failed\n"); in ena_com_admin_init_cq()
128 static int ena_com_admin_init_aenq(struct ena_com_dev *ena_dev, in ena_com_admin_init_aenq() argument
131 struct ena_com_aenq *aenq = &ena_dev->aenq; in ena_com_admin_init_aenq()
135 ena_dev->aenq.q_depth = ENA_ASYNC_QUEUE_DEPTH; in ena_com_admin_init_aenq()
137 aenq->entries = dma_alloc_coherent(ena_dev->dmadev, size, &aenq->dma_addr, GFP_KERNEL); in ena_com_admin_init_aenq()
140 netdev_err(ena_dev->net_device, "Memory allocation failed\n"); in ena_com_admin_init_aenq()
150 writel(addr_low, ena_dev->reg_bar + ENA_REGS_AENQ_BASE_LO_OFF); in ena_com_admin_init_aenq()
151 writel(addr_high, ena_dev->reg_bar + ENA_REGS_AENQ_BASE_HI_OFF); in ena_com_admin_init_aenq()
154 aenq_caps |= ena_dev->aenq.q_depth & ENA_REGS_AENQ_CAPS_AENQ_DEPTH_MASK; in ena_com_admin_init_aenq()
158 writel(aenq_caps, ena_dev->reg_bar + ENA_REGS_AENQ_CAPS_OFF); in ena_com_admin_init_aenq()
161 netdev_err(ena_dev->net_device, "AENQ handlers pointer is NULL\n"); in ena_com_admin_init_aenq()
181 netdev_err(admin_queue->ena_dev->net_device, in get_comp_ctxt()
188 netdev_err(admin_queue->ena_dev->net_device, "Completion context is NULL\n"); in get_comp_ctxt()
193 netdev_err(admin_queue->ena_dev->net_device, "Completion context is occupied\n"); in get_comp_ctxt()
223 netdev_dbg(admin_queue->ena_dev->net_device, "Admin queue is full.\n"); in __ena_com_submit_admin_cmd()
265 struct ena_com_dev *ena_dev = admin_queue->ena_dev; in ena_com_init_comp_ctxt() local
272 netdev_err(ena_dev->net_device, "Memory allocation failed\n"); in ena_com_init_comp_ctxt()
310 static int ena_com_init_io_sq(struct ena_com_dev *ena_dev, in ena_com_init_io_sq() argument
318 io_sq->dma_addr_bits = (u8)ena_dev->dma_addr_bits; in ena_com_init_io_sq()
328 dma_alloc_coherent(ena_dev->dmadev, size, &io_sq->desc_addr.phys_addr, in ena_com_init_io_sq()
332 dma_alloc_coherent(ena_dev->dmadev, size, in ena_com_init_io_sq()
337 netdev_err(ena_dev->net_device, "Memory allocation failed\n"); in ena_com_init_io_sq()
345 ena_dev->llq_info.desc_list_entry_size; in ena_com_init_io_sq()
353 io_sq->bounce_buf_ctrl.base_buffer = devm_kzalloc(ena_dev->dmadev, size, GFP_KERNEL); in ena_com_init_io_sq()
356 devm_kzalloc(ena_dev->dmadev, size, GFP_KERNEL); in ena_com_init_io_sq()
359 netdev_err(ena_dev->net_device, "Bounce buffer memory allocation failed\n"); in ena_com_init_io_sq()
363 memcpy(&io_sq->llq_info, &ena_dev->llq_info, in ena_com_init_io_sq()
388 static int ena_com_init_io_cq(struct ena_com_dev *ena_dev, in ena_com_init_io_cq() argument
405 dma_alloc_coherent(ena_dev->dmadev, size, &io_cq->cdesc_addr.phys_addr, GFP_KERNEL); in ena_com_init_io_cq()
408 dma_alloc_coherent(ena_dev->dmadev, size, &io_cq->cdesc_addr.phys_addr, in ena_com_init_io_cq()
413 netdev_err(ena_dev->net_device, "Memory allocation failed\n"); in ena_com_init_io_cq()
434 netdev_err(admin_queue->ena_dev->net_device, in ena_com_handle_single_admin_completion()
491 netdev_err(admin_queue->ena_dev->net_device, "Admin command failed[%u]\n", in ena_com_comp_status_to_errno()
540 netdev_err(admin_queue->ena_dev->net_device, in ena_com_wait_and_process_admin_cq_polling()
553 admin_queue->ena_dev->ena_min_poll_delay_us); in ena_com_wait_and_process_admin_cq_polling()
557 netdev_err(admin_queue->ena_dev->net_device, "Command was aborted\n"); in ena_com_wait_and_process_admin_cq_polling()
579 static int ena_com_set_llq(struct ena_com_dev *ena_dev) in ena_com_set_llq() argument
584 struct ena_com_llq_info *llq_info = &ena_dev->llq_info; in ena_com_set_llq()
588 admin_queue = &ena_dev->admin_queue; in ena_com_set_llq()
609 netdev_err(ena_dev->net_device, "Failed to set LLQ configurations: %d\n", ret); in ena_com_set_llq()
614 static int ena_com_config_llq_info(struct ena_com_dev *ena_dev, in ena_com_config_llq_info() argument
618 struct ena_com_llq_info *llq_info = &ena_dev->llq_info; in ena_com_config_llq_info()
631 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
646 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
652 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
676 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
681 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
690 netdev_err(ena_dev->net_device, "Illegal entry size %d\n", in ena_com_config_llq_info()
714 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
720 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
737 rc = ena_com_set_llq(ena_dev); in ena_com_config_llq_info()
739 netdev_err(ena_dev->net_device, "Cannot set LLQ configuration: %d\n", rc); in ena_com_config_llq_info()
765 netdev_err(admin_queue->ena_dev->net_device, in ena_com_wait_and_process_admin_cq_interrupts()
772 netdev_err(admin_queue->ena_dev->net_device, in ena_com_wait_and_process_admin_cq_interrupts()
797 static u32 ena_com_reg_bar_read32(struct ena_com_dev *ena_dev, u16 offset) in ena_com_reg_bar_read32() argument
799 struct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read; in ena_com_reg_bar_read32()
813 return readl(ena_dev->reg_bar + offset); in ena_com_reg_bar_read32()
824 writel(mmio_read_reg, ena_dev->reg_bar + ENA_REGS_MMIO_REG_READ_OFF); in ena_com_reg_bar_read32()
834 netdev_err(ena_dev->net_device, in ena_com_reg_bar_read32()
842 netdev_err(ena_dev->net_device, "Read failure: wrong offset provided\n"); in ena_com_reg_bar_read32()
871 static int ena_com_destroy_io_sq(struct ena_com_dev *ena_dev, in ena_com_destroy_io_sq() argument
874 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_destroy_io_sq()
901 netdev_err(ena_dev->net_device, "Failed to destroy io sq error: %d\n", ret); in ena_com_destroy_io_sq()
906 static void ena_com_io_queue_free(struct ena_com_dev *ena_dev, in ena_com_io_queue_free() argument
915 dma_free_coherent(ena_dev->dmadev, size, io_cq->cdesc_addr.virt_addr, in ena_com_io_queue_free()
924 dma_free_coherent(ena_dev->dmadev, size, io_sq->desc_addr.virt_addr, in ena_com_io_queue_free()
931 devm_kfree(ena_dev->dmadev, io_sq->bounce_buf_ctrl.base_buffer); in ena_com_io_queue_free()
936 static int wait_for_reset_state(struct ena_com_dev *ena_dev, u32 timeout, in wait_for_reset_state() argument
946 val = ena_com_reg_bar_read32(ena_dev, ENA_REGS_DEV_STS_OFF); in wait_for_reset_state()
949 netdev_err(ena_dev->net_device, "Reg read timeout occurred\n"); in wait_for_reset_state()
960 ena_delay_exponential_backoff_us(exp++, ena_dev->ena_min_poll_delay_us); in wait_for_reset_state()
964 static bool ena_com_check_supported_feature_id(struct ena_com_dev *ena_dev, in ena_com_check_supported_feature_id() argument
971 !(ena_dev->supported_features & feature_mask)) in ena_com_check_supported_feature_id()
977 static int ena_com_get_feature_ex(struct ena_com_dev *ena_dev, in ena_com_get_feature_ex() argument
988 if (!ena_com_check_supported_feature_id(ena_dev, feature_id)) { in ena_com_get_feature_ex()
989 netdev_dbg(ena_dev->net_device, "Feature %d isn't supported\n", feature_id); in ena_com_get_feature_ex()
994 admin_queue = &ena_dev->admin_queue; in ena_com_get_feature_ex()
1004 ret = ena_com_mem_addr_set(ena_dev, in ena_com_get_feature_ex()
1008 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_get_feature_ex()
1025 netdev_err(ena_dev->net_device, in ena_com_get_feature_ex()
1031 static int ena_com_get_feature(struct ena_com_dev *ena_dev, in ena_com_get_feature() argument
1036 return ena_com_get_feature_ex(ena_dev, in ena_com_get_feature()
1044 int ena_com_get_current_hash_function(struct ena_com_dev *ena_dev) in ena_com_get_current_hash_function() argument
1046 return ena_dev->rss.hash_func; in ena_com_get_current_hash_function()
1049 static void ena_com_hash_key_fill_default_key(struct ena_com_dev *ena_dev) in ena_com_hash_key_fill_default_key() argument
1052 (ena_dev->rss).hash_key; in ena_com_hash_key_fill_default_key()
1061 static int ena_com_hash_key_allocate(struct ena_com_dev *ena_dev) in ena_com_hash_key_allocate() argument
1063 struct ena_rss *rss = &ena_dev->rss; in ena_com_hash_key_allocate()
1065 if (!ena_com_check_supported_feature_id(ena_dev, ENA_ADMIN_RSS_HASH_FUNCTION)) in ena_com_hash_key_allocate()
1068 rss->hash_key = dma_alloc_coherent(ena_dev->dmadev, sizeof(*rss->hash_key), in ena_com_hash_key_allocate()
1077 static void ena_com_hash_key_destroy(struct ena_com_dev *ena_dev) in ena_com_hash_key_destroy() argument
1079 struct ena_rss *rss = &ena_dev->rss; in ena_com_hash_key_destroy()
1082 dma_free_coherent(ena_dev->dmadev, sizeof(*rss->hash_key), rss->hash_key, in ena_com_hash_key_destroy()
1087 static int ena_com_hash_ctrl_init(struct ena_com_dev *ena_dev) in ena_com_hash_ctrl_init() argument
1089 struct ena_rss *rss = &ena_dev->rss; in ena_com_hash_ctrl_init()
1091 rss->hash_ctrl = dma_alloc_coherent(ena_dev->dmadev, sizeof(*rss->hash_ctrl), in ena_com_hash_ctrl_init()
1100 static void ena_com_hash_ctrl_destroy(struct ena_com_dev *ena_dev) in ena_com_hash_ctrl_destroy() argument
1102 struct ena_rss *rss = &ena_dev->rss; in ena_com_hash_ctrl_destroy()
1105 dma_free_coherent(ena_dev->dmadev, sizeof(*rss->hash_ctrl), rss->hash_ctrl, in ena_com_hash_ctrl_destroy()
1110 static int ena_com_indirect_table_allocate(struct ena_com_dev *ena_dev, in ena_com_indirect_table_allocate() argument
1113 struct ena_rss *rss = &ena_dev->rss; in ena_com_indirect_table_allocate()
1118 ret = ena_com_get_feature(ena_dev, &get_resp, in ena_com_indirect_table_allocate()
1125 netdev_err(ena_dev->net_device, in ena_com_indirect_table_allocate()
1135 rss->rss_ind_tbl = dma_alloc_coherent(ena_dev->dmadev, tbl_size, &rss->rss_ind_tbl_dma_addr, in ena_com_indirect_table_allocate()
1141 rss->host_rss_ind_tbl = devm_kzalloc(ena_dev->dmadev, tbl_size, GFP_KERNEL); in ena_com_indirect_table_allocate()
1153 dma_free_coherent(ena_dev->dmadev, tbl_size, rss->rss_ind_tbl, rss->rss_ind_tbl_dma_addr); in ena_com_indirect_table_allocate()
1160 static void ena_com_indirect_table_destroy(struct ena_com_dev *ena_dev) in ena_com_indirect_table_destroy() argument
1162 struct ena_rss *rss = &ena_dev->rss; in ena_com_indirect_table_destroy()
1167 dma_free_coherent(ena_dev->dmadev, tbl_size, rss->rss_ind_tbl, in ena_com_indirect_table_destroy()
1172 devm_kfree(ena_dev->dmadev, rss->host_rss_ind_tbl); in ena_com_indirect_table_destroy()
1176 static int ena_com_create_io_sq(struct ena_com_dev *ena_dev, in ena_com_create_io_sq() argument
1179 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_create_io_sq()
1212 ret = ena_com_mem_addr_set(ena_dev, in ena_com_create_io_sq()
1216 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_create_io_sq()
1227 netdev_err(ena_dev->net_device, "Failed to create IO SQ. error: %d\n", ret); in ena_com_create_io_sq()
1233 io_sq->db_addr = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_sq()
1237 io_sq->header_addr = (u8 __iomem *)((uintptr_t)ena_dev->mem_bar in ena_com_create_io_sq()
1241 (u8 __iomem *)((uintptr_t)ena_dev->mem_bar + in ena_com_create_io_sq()
1245 netdev_dbg(ena_dev->net_device, "Created sq[%u], depth[%u]\n", io_sq->idx, io_sq->q_depth); in ena_com_create_io_sq()
1250 static int ena_com_ind_tbl_convert_to_device(struct ena_com_dev *ena_dev) in ena_com_ind_tbl_convert_to_device() argument
1252 struct ena_rss *rss = &ena_dev->rss; in ena_com_ind_tbl_convert_to_device()
1262 io_sq = &ena_dev->io_sq_queues[qid]; in ena_com_ind_tbl_convert_to_device()
1273 static void ena_com_update_intr_delay_resolution(struct ena_com_dev *ena_dev, in ena_com_update_intr_delay_resolution() argument
1276 u16 prev_intr_delay_resolution = ena_dev->intr_delay_resolution; in ena_com_update_intr_delay_resolution()
1279 netdev_err(ena_dev->net_device, in ena_com_update_intr_delay_resolution()
1285 ena_dev->intr_moder_rx_interval = in ena_com_update_intr_delay_resolution()
1286 ena_dev->intr_moder_rx_interval * in ena_com_update_intr_delay_resolution()
1291 ena_dev->intr_moder_tx_interval = in ena_com_update_intr_delay_resolution()
1292 ena_dev->intr_moder_tx_interval * in ena_com_update_intr_delay_resolution()
1296 ena_dev->intr_delay_resolution = intr_delay_resolution; in ena_com_update_intr_delay_resolution()
1317 netdev_dbg(admin_queue->ena_dev->net_device, in ena_com_execute_admin_command()
1320 netdev_err(admin_queue->ena_dev->net_device, in ena_com_execute_admin_command()
1329 netdev_err(admin_queue->ena_dev->net_device, in ena_com_execute_admin_command()
1332 netdev_dbg(admin_queue->ena_dev->net_device, in ena_com_execute_admin_command()
1338 int ena_com_create_io_cq(struct ena_com_dev *ena_dev, in ena_com_create_io_cq() argument
1341 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_create_io_cq()
1358 ret = ena_com_mem_addr_set(ena_dev, in ena_com_create_io_cq()
1362 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_create_io_cq()
1372 netdev_err(ena_dev->net_device, "Failed to create IO CQ. error: %d\n", ret); in ena_com_create_io_cq()
1378 io_cq->unmask_reg = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_cq()
1383 (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_cq()
1388 (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_cq()
1391 netdev_dbg(ena_dev->net_device, "Created cq[%u], depth[%u]\n", io_cq->idx, io_cq->q_depth); in ena_com_create_io_cq()
1396 int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid, in ena_com_get_io_handlers() argument
1401 netdev_err(ena_dev->net_device, "Invalid queue number %d but the max is %d\n", qid, in ena_com_get_io_handlers()
1406 *io_sq = &ena_dev->io_sq_queues[qid]; in ena_com_get_io_handlers()
1407 *io_cq = &ena_dev->io_cq_queues[qid]; in ena_com_get_io_handlers()
1412 void ena_com_abort_admin_commands(struct ena_com_dev *ena_dev) in ena_com_abort_admin_commands() argument
1414 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_abort_admin_commands()
1432 void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev) in ena_com_wait_for_abort_completion() argument
1434 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_wait_for_abort_completion()
1441 ena_delay_exponential_backoff_us(exp++, ena_dev->ena_min_poll_delay_us); in ena_com_wait_for_abort_completion()
1447 int ena_com_destroy_io_cq(struct ena_com_dev *ena_dev, in ena_com_destroy_io_cq() argument
1450 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_destroy_io_cq()
1467 netdev_err(ena_dev->net_device, "Failed to destroy IO CQ. error: %d\n", ret); in ena_com_destroy_io_cq()
1472 bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev) in ena_com_get_admin_running_state() argument
1474 return ena_dev->admin_queue.running_state; in ena_com_get_admin_running_state()
1477 void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state) in ena_com_set_admin_running_state() argument
1479 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_set_admin_running_state()
1483 ena_dev->admin_queue.running_state = state; in ena_com_set_admin_running_state()
1487 void ena_com_admin_aenq_enable(struct ena_com_dev *ena_dev) in ena_com_admin_aenq_enable() argument
1489 u16 depth = ena_dev->aenq.q_depth; in ena_com_admin_aenq_enable()
1491 WARN(ena_dev->aenq.head != depth, "Invalid AENQ state\n"); in ena_com_admin_aenq_enable()
1496 writel(depth, ena_dev->reg_bar + ENA_REGS_AENQ_HEAD_DB_OFF); in ena_com_admin_aenq_enable()
1499 int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag) in ena_com_set_aenq_config() argument
1507 ret = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_AENQ_CONFIG, 0); in ena_com_set_aenq_config()
1509 dev_info(ena_dev->dmadev, "Can't get aenq configuration\n"); in ena_com_set_aenq_config()
1514 netdev_warn(ena_dev->net_device, in ena_com_set_aenq_config()
1521 admin_queue = &ena_dev->admin_queue; in ena_com_set_aenq_config()
1535 netdev_err(ena_dev->net_device, "Failed to config AENQ ret: %d\n", ret); in ena_com_set_aenq_config()
1540 int ena_com_get_dma_width(struct ena_com_dev *ena_dev) in ena_com_get_dma_width() argument
1542 u32 caps = ena_com_reg_bar_read32(ena_dev, ENA_REGS_CAPS_OFF); in ena_com_get_dma_width()
1546 netdev_err(ena_dev->net_device, "Reg read timeout occurred\n"); in ena_com_get_dma_width()
1553 netdev_dbg(ena_dev->net_device, "ENA dma width: %d\n", width); in ena_com_get_dma_width()
1556 netdev_err(ena_dev->net_device, "DMA width illegal value: %d\n", width); in ena_com_get_dma_width()
1560 ena_dev->dma_addr_bits = width; in ena_com_get_dma_width()
1565 int ena_com_validate_version(struct ena_com_dev *ena_dev) in ena_com_validate_version() argument
1574 ver = ena_com_reg_bar_read32(ena_dev, ENA_REGS_VERSION_OFF); in ena_com_validate_version()
1575 ctrl_ver = ena_com_reg_bar_read32(ena_dev, in ena_com_validate_version()
1579 netdev_err(ena_dev->net_device, "Reg read timeout occurred\n"); in ena_com_validate_version()
1583 dev_info(ena_dev->dmadev, "ENA device version: %d.%d\n", in ena_com_validate_version()
1587 dev_info(ena_dev->dmadev, "ENA controller version: %d.%d.%d implementation version %d\n", in ena_com_validate_version()
1603 netdev_err(ena_dev->net_device, in ena_com_validate_version()
1612 ena_com_free_ena_admin_queue_comp_ctx(struct ena_com_dev *ena_dev, in ena_com_free_ena_admin_queue_comp_ctx() argument
1619 devm_kfree(ena_dev->dmadev, admin_queue->comp_ctx); in ena_com_free_ena_admin_queue_comp_ctx()
1624 void ena_com_admin_destroy(struct ena_com_dev *ena_dev) in ena_com_admin_destroy() argument
1626 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_admin_destroy()
1629 struct ena_com_aenq *aenq = &ena_dev->aenq; in ena_com_admin_destroy()
1632 ena_com_free_ena_admin_queue_comp_ctx(ena_dev, admin_queue); in ena_com_admin_destroy()
1636 dma_free_coherent(ena_dev->dmadev, size, sq->entries, sq->dma_addr); in ena_com_admin_destroy()
1641 dma_free_coherent(ena_dev->dmadev, size, cq->entries, cq->dma_addr); in ena_com_admin_destroy()
1645 if (ena_dev->aenq.entries) in ena_com_admin_destroy()
1646 dma_free_coherent(ena_dev->dmadev, size, aenq->entries, aenq->dma_addr); in ena_com_admin_destroy()
1650 void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling) in ena_com_set_admin_polling_mode() argument
1657 writel(mask_value, ena_dev->reg_bar + ENA_REGS_INTR_MASK_OFF); in ena_com_set_admin_polling_mode()
1658 ena_dev->admin_queue.polling = polling; in ena_com_set_admin_polling_mode()
1661 void ena_com_set_admin_auto_polling_mode(struct ena_com_dev *ena_dev, in ena_com_set_admin_auto_polling_mode() argument
1664 ena_dev->admin_queue.auto_polling = polling; in ena_com_set_admin_auto_polling_mode()
1667 int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev) in ena_com_mmio_reg_read_request_init() argument
1669 struct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read; in ena_com_mmio_reg_read_request_init()
1672 mmio_read->read_resp = dma_alloc_coherent(ena_dev->dmadev, sizeof(*mmio_read->read_resp), in ena_com_mmio_reg_read_request_init()
1677 ena_com_mmio_reg_read_request_write_dev_addr(ena_dev); in ena_com_mmio_reg_read_request_init()
1690 void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev, bool readless_supported) in ena_com_set_mmio_read_mode() argument
1692 struct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read; in ena_com_set_mmio_read_mode()
1697 void ena_com_mmio_reg_read_request_destroy(struct ena_com_dev *ena_dev) in ena_com_mmio_reg_read_request_destroy() argument
1699 struct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read; in ena_com_mmio_reg_read_request_destroy()
1701 writel(0x0, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_LO_OFF); in ena_com_mmio_reg_read_request_destroy()
1702 writel(0x0, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_HI_OFF); in ena_com_mmio_reg_read_request_destroy()
1704 dma_free_coherent(ena_dev->dmadev, sizeof(*mmio_read->read_resp), mmio_read->read_resp, in ena_com_mmio_reg_read_request_destroy()
1710 void ena_com_mmio_reg_read_request_write_dev_addr(struct ena_com_dev *ena_dev) in ena_com_mmio_reg_read_request_write_dev_addr() argument
1712 struct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read; in ena_com_mmio_reg_read_request_write_dev_addr()
1718 writel(addr_low, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_LO_OFF); in ena_com_mmio_reg_read_request_write_dev_addr()
1719 writel(addr_high, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_HI_OFF); in ena_com_mmio_reg_read_request_write_dev_addr()
1722 int ena_com_admin_init(struct ena_com_dev *ena_dev, in ena_com_admin_init() argument
1725 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_admin_init()
1729 dev_sts = ena_com_reg_bar_read32(ena_dev, ENA_REGS_DEV_STS_OFF); in ena_com_admin_init()
1732 netdev_err(ena_dev->net_device, "Reg read timeout occurred\n"); in ena_com_admin_init()
1737 netdev_err(ena_dev->net_device, "Device isn't ready, abort com init\n"); in ena_com_admin_init()
1743 admin_queue->q_dmadev = ena_dev->dmadev; in ena_com_admin_init()
1763 admin_queue->sq.db_addr = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_admin_init()
1769 writel(addr_low, ena_dev->reg_bar + ENA_REGS_AQ_BASE_LO_OFF); in ena_com_admin_init()
1770 writel(addr_high, ena_dev->reg_bar + ENA_REGS_AQ_BASE_HI_OFF); in ena_com_admin_init()
1775 writel(addr_low, ena_dev->reg_bar + ENA_REGS_ACQ_BASE_LO_OFF); in ena_com_admin_init()
1776 writel(addr_high, ena_dev->reg_bar + ENA_REGS_ACQ_BASE_HI_OFF); in ena_com_admin_init()
1790 writel(aq_caps, ena_dev->reg_bar + ENA_REGS_AQ_CAPS_OFF); in ena_com_admin_init()
1791 writel(acq_caps, ena_dev->reg_bar + ENA_REGS_ACQ_CAPS_OFF); in ena_com_admin_init()
1792 ret = ena_com_admin_init_aenq(ena_dev, aenq_handlers); in ena_com_admin_init()
1796 admin_queue->ena_dev = ena_dev; in ena_com_admin_init()
1801 ena_com_admin_destroy(ena_dev); in ena_com_admin_init()
1806 int ena_com_create_io_queue(struct ena_com_dev *ena_dev, in ena_com_create_io_queue() argument
1814 netdev_err(ena_dev->net_device, "Qid (%d) is bigger than max num of queues (%d)\n", in ena_com_create_io_queue()
1819 io_sq = &ena_dev->io_sq_queues[ctx->qid]; in ena_com_create_io_queue()
1820 io_cq = &ena_dev->io_cq_queues[ctx->qid]; in ena_com_create_io_queue()
1840 io_sq->tx_max_header_size = min_t(u32, ena_dev->tx_max_header_size, SZ_256); in ena_com_create_io_queue()
1842 ret = ena_com_init_io_sq(ena_dev, ctx, io_sq); in ena_com_create_io_queue()
1845 ret = ena_com_init_io_cq(ena_dev, ctx, io_cq); in ena_com_create_io_queue()
1849 ret = ena_com_create_io_cq(ena_dev, io_cq); in ena_com_create_io_queue()
1853 ret = ena_com_create_io_sq(ena_dev, io_sq, io_cq->idx); in ena_com_create_io_queue()
1860 ena_com_destroy_io_cq(ena_dev, io_cq); in ena_com_create_io_queue()
1862 ena_com_io_queue_free(ena_dev, io_sq, io_cq); in ena_com_create_io_queue()
1866 void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid) in ena_com_destroy_io_queue() argument
1872 netdev_err(ena_dev->net_device, "Qid (%d) is bigger than max num of queues (%d)\n", in ena_com_destroy_io_queue()
1877 io_sq = &ena_dev->io_sq_queues[qid]; in ena_com_destroy_io_queue()
1878 io_cq = &ena_dev->io_cq_queues[qid]; in ena_com_destroy_io_queue()
1880 ena_com_destroy_io_sq(ena_dev, io_sq); in ena_com_destroy_io_queue()
1881 ena_com_destroy_io_cq(ena_dev, io_cq); in ena_com_destroy_io_queue()
1883 ena_com_io_queue_free(ena_dev, io_sq, io_cq); in ena_com_destroy_io_queue()
1886 int ena_com_get_link_params(struct ena_com_dev *ena_dev, in ena_com_get_link_params() argument
1889 return ena_com_get_feature(ena_dev, resp, ENA_ADMIN_LINK_CONFIG, 0); in ena_com_get_link_params()
1892 int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev, in ena_com_get_dev_attr_feat() argument
1898 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_get_dev_attr_feat()
1906 ena_dev->supported_features = get_resp.u.dev_attr.supported_features; in ena_com_get_dev_attr_feat()
1907 ena_dev->capabilities = get_resp.u.dev_attr.capabilities; in ena_com_get_dev_attr_feat()
1909 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { in ena_com_get_dev_attr_feat()
1910 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_get_dev_attr_feat()
1921 ena_dev->tx_max_header_size = in ena_com_get_dev_attr_feat()
1924 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_get_dev_attr_feat()
1928 ena_dev->tx_max_header_size = in ena_com_get_dev_attr_feat()
1935 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_get_dev_attr_feat()
1943 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_get_dev_attr_feat()
1954 rc = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_HW_HINTS, 0); in ena_com_get_dev_attr_feat()
1963 rc = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_LLQ, 0); in ena_com_get_dev_attr_feat()
1974 void ena_com_admin_q_comp_intr_handler(struct ena_com_dev *ena_dev) in ena_com_admin_q_comp_intr_handler() argument
1976 ena_com_handle_admin_completion(&ena_dev->admin_queue); in ena_com_admin_q_comp_intr_handler()
1982 static ena_aenq_handler ena_com_get_specific_aenq_cb(struct ena_com_dev *ena_dev, in ena_com_get_specific_aenq_cb() argument
1985 struct ena_aenq_handlers *aenq_handlers = ena_dev->aenq.aenq_handlers; in ena_com_get_specific_aenq_cb()
1997 void ena_com_aenq_intr_handler(struct ena_com_dev *ena_dev, void *data) in ena_com_aenq_intr_handler() argument
2001 struct ena_com_aenq *aenq = &ena_dev->aenq; in ena_com_aenq_intr_handler()
2022 netdev_dbg(ena_dev->net_device, "AENQ! Group[%x] Syndrome[%x] timestamp: [%llus]\n", in ena_com_aenq_intr_handler()
2026 handler_cb = ena_com_get_specific_aenq_cb(ena_dev, in ena_com_aenq_intr_handler()
2051 writel_relaxed((u32)aenq->head, ena_dev->reg_bar + ENA_REGS_AENQ_HEAD_DB_OFF); in ena_com_aenq_intr_handler()
2054 int ena_com_dev_reset(struct ena_com_dev *ena_dev, in ena_com_dev_reset() argument
2060 stat = ena_com_reg_bar_read32(ena_dev, ENA_REGS_DEV_STS_OFF); in ena_com_dev_reset()
2061 cap = ena_com_reg_bar_read32(ena_dev, ENA_REGS_CAPS_OFF); in ena_com_dev_reset()
2064 netdev_err(ena_dev->net_device, "Reg read32 timeout occurred\n"); in ena_com_dev_reset()
2069 netdev_err(ena_dev->net_device, "Device isn't ready, can't reset device\n"); in ena_com_dev_reset()
2076 netdev_err(ena_dev->net_device, "Invalid timeout value\n"); in ena_com_dev_reset()
2084 writel(reset_val, ena_dev->reg_bar + ENA_REGS_DEV_CTL_OFF); in ena_com_dev_reset()
2087 ena_com_mmio_reg_read_request_write_dev_addr(ena_dev); in ena_com_dev_reset()
2089 rc = wait_for_reset_state(ena_dev, timeout, in ena_com_dev_reset()
2092 netdev_err(ena_dev->net_device, "Reset indication didn't turn on\n"); in ena_com_dev_reset()
2097 writel(0, ena_dev->reg_bar + ENA_REGS_DEV_CTL_OFF); in ena_com_dev_reset()
2098 rc = wait_for_reset_state(ena_dev, timeout, 0); in ena_com_dev_reset()
2100 netdev_err(ena_dev->net_device, "Reset indication didn't turn off\n"); in ena_com_dev_reset()
2108 ena_dev->admin_queue.completion_timeout = timeout * 100000; in ena_com_dev_reset()
2110 ena_dev->admin_queue.completion_timeout = ADMIN_CMD_TIMEOUT_US; in ena_com_dev_reset()
2115 static int ena_get_dev_stats(struct ena_com_dev *ena_dev, in ena_get_dev_stats() argument
2124 admin_queue = &ena_dev->admin_queue; in ena_get_dev_stats()
2137 netdev_err(ena_dev->net_device, "Failed to get stats. error: %d\n", ret); in ena_get_dev_stats()
2142 int ena_com_get_eni_stats(struct ena_com_dev *ena_dev, in ena_com_get_eni_stats() argument
2148 if (!ena_com_get_cap(ena_dev, ENA_ADMIN_ENI_STATS)) { in ena_com_get_eni_stats()
2149 netdev_err(ena_dev->net_device, "Capability %d isn't supported\n", in ena_com_get_eni_stats()
2155 ret = ena_get_dev_stats(ena_dev, &ctx, ENA_ADMIN_GET_STATS_TYPE_ENI); in ena_com_get_eni_stats()
2163 int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev, in ena_com_get_dev_basic_stats() argument
2170 ret = ena_get_dev_stats(ena_dev, &ctx, ENA_ADMIN_GET_STATS_TYPE_BASIC); in ena_com_get_dev_basic_stats()
2178 int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, u32 mtu) in ena_com_set_dev_mtu() argument
2185 if (!ena_com_check_supported_feature_id(ena_dev, ENA_ADMIN_MTU)) { in ena_com_set_dev_mtu()
2186 netdev_dbg(ena_dev->net_device, "Feature %d isn't supported\n", ENA_ADMIN_MTU); in ena_com_set_dev_mtu()
2191 admin_queue = &ena_dev->admin_queue; in ena_com_set_dev_mtu()
2205 netdev_err(ena_dev->net_device, "Failed to set mtu %d. error: %d\n", mtu, ret); in ena_com_set_dev_mtu()
2210 int ena_com_get_offload_settings(struct ena_com_dev *ena_dev, in ena_com_get_offload_settings() argument
2216 ret = ena_com_get_feature(ena_dev, &resp, in ena_com_get_offload_settings()
2219 netdev_err(ena_dev->net_device, "Failed to get offload capabilities %d\n", ret); in ena_com_get_offload_settings()
2228 int ena_com_set_hash_function(struct ena_com_dev *ena_dev) in ena_com_set_hash_function() argument
2230 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_set_hash_function()
2231 struct ena_rss *rss = &ena_dev->rss; in ena_com_set_hash_function()
2237 if (!ena_com_check_supported_feature_id(ena_dev, ENA_ADMIN_RSS_HASH_FUNCTION)) { in ena_com_set_hash_function()
2238 netdev_dbg(ena_dev->net_device, "Feature %d isn't supported\n", in ena_com_set_hash_function()
2244 ret = ena_com_get_feature(ena_dev, &get_resp, in ena_com_set_hash_function()
2250 netdev_err(ena_dev->net_device, "Func hash %d isn't supported by device, abort\n", in ena_com_set_hash_function()
2264 ret = ena_com_mem_addr_set(ena_dev, in ena_com_set_hash_function()
2268 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_set_hash_function()
2280 netdev_err(ena_dev->net_device, "Failed to set hash function %d. error: %d\n", in ena_com_set_hash_function()
2288 int ena_com_fill_hash_function(struct ena_com_dev *ena_dev, in ena_com_fill_hash_function() argument
2295 struct ena_rss *rss = &ena_dev->rss; in ena_com_fill_hash_function()
2304 rc = ena_com_get_feature_ex(ena_dev, &get_resp, in ena_com_fill_hash_function()
2312 netdev_err(ena_dev->net_device, "Flow hash function %d isn't supported\n", func); in ena_com_fill_hash_function()
2318 netdev_err(ena_dev->net_device, in ena_com_fill_hash_function()
2330 rc = ena_com_set_hash_function(ena_dev); in ena_com_fill_hash_function()
2339 int ena_com_get_hash_function(struct ena_com_dev *ena_dev, in ena_com_get_hash_function() argument
2342 struct ena_rss *rss = &ena_dev->rss; in ena_com_get_hash_function()
2349 rc = ena_com_get_feature_ex(ena_dev, &get_resp, in ena_com_get_hash_function()
2366 int ena_com_get_hash_key(struct ena_com_dev *ena_dev, u8 *key) in ena_com_get_hash_key() argument
2369 ena_dev->rss.hash_key; in ena_com_get_hash_key()
2378 int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev, in ena_com_get_hash_ctrl() argument
2382 struct ena_rss *rss = &ena_dev->rss; in ena_com_get_hash_ctrl()
2386 rc = ena_com_get_feature_ex(ena_dev, &get_resp, in ena_com_get_hash_ctrl()
2399 int ena_com_set_hash_ctrl(struct ena_com_dev *ena_dev) in ena_com_set_hash_ctrl() argument
2401 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_set_hash_ctrl()
2402 struct ena_rss *rss = &ena_dev->rss; in ena_com_set_hash_ctrl()
2408 if (!ena_com_check_supported_feature_id(ena_dev, ENA_ADMIN_RSS_HASH_INPUT)) { in ena_com_set_hash_ctrl()
2409 netdev_dbg(ena_dev->net_device, "Feature %d isn't supported\n", in ena_com_set_hash_ctrl()
2424 ret = ena_com_mem_addr_set(ena_dev, in ena_com_set_hash_ctrl()
2428 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_set_hash_ctrl()
2439 netdev_err(ena_dev->net_device, "Failed to set hash input. error: %d\n", ret); in ena_com_set_hash_ctrl()
2444 int ena_com_set_default_hash_ctrl(struct ena_com_dev *ena_dev) in ena_com_set_default_hash_ctrl() argument
2446 struct ena_rss *rss = &ena_dev->rss; in ena_com_set_default_hash_ctrl()
2453 rc = ena_com_get_hash_ctrl(ena_dev, 0, NULL); in ena_com_set_default_hash_ctrl()
2489 netdev_err(ena_dev->net_device, in ena_com_set_default_hash_ctrl()
2497 rc = ena_com_set_hash_ctrl(ena_dev); in ena_com_set_default_hash_ctrl()
2501 ena_com_get_hash_ctrl(ena_dev, 0, NULL); in ena_com_set_default_hash_ctrl()
2506 int ena_com_fill_hash_ctrl(struct ena_com_dev *ena_dev, in ena_com_fill_hash_ctrl() argument
2510 struct ena_rss *rss = &ena_dev->rss; in ena_com_fill_hash_ctrl()
2516 netdev_err(ena_dev->net_device, "Invalid proto num (%u)\n", proto); in ena_com_fill_hash_ctrl()
2521 rc = ena_com_get_hash_ctrl(ena_dev, proto, NULL); in ena_com_fill_hash_ctrl()
2528 netdev_err(ena_dev->net_device, in ena_com_fill_hash_ctrl()
2535 rc = ena_com_set_hash_ctrl(ena_dev); in ena_com_fill_hash_ctrl()
2539 ena_com_get_hash_ctrl(ena_dev, 0, NULL); in ena_com_fill_hash_ctrl()
2544 int ena_com_indirect_table_fill_entry(struct ena_com_dev *ena_dev, in ena_com_indirect_table_fill_entry() argument
2547 struct ena_rss *rss = &ena_dev->rss; in ena_com_indirect_table_fill_entry()
2560 int ena_com_indirect_table_set(struct ena_com_dev *ena_dev) in ena_com_indirect_table_set() argument
2562 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_indirect_table_set()
2563 struct ena_rss *rss = &ena_dev->rss; in ena_com_indirect_table_set()
2568 if (!ena_com_check_supported_feature_id(ena_dev, ENA_ADMIN_RSS_INDIRECTION_TABLE_CONFIG)) { in ena_com_indirect_table_set()
2569 netdev_dbg(ena_dev->net_device, "Feature %d isn't supported\n", in ena_com_indirect_table_set()
2574 ret = ena_com_ind_tbl_convert_to_device(ena_dev); in ena_com_indirect_table_set()
2576 netdev_err(ena_dev->net_device, in ena_com_indirect_table_set()
2590 ret = ena_com_mem_addr_set(ena_dev, in ena_com_indirect_table_set()
2594 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_indirect_table_set()
2608 netdev_err(ena_dev->net_device, "Failed to set indirect table. error: %d\n", ret); in ena_com_indirect_table_set()
2613 int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl) in ena_com_indirect_table_get() argument
2615 struct ena_rss *rss = &ena_dev->rss; in ena_com_indirect_table_get()
2623 rc = ena_com_get_feature_ex(ena_dev, &get_resp, in ena_com_indirect_table_get()
2639 int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 indr_tbl_log_size) in ena_com_rss_init() argument
2643 memset(&ena_dev->rss, 0x0, sizeof(ena_dev->rss)); in ena_com_rss_init()
2645 rc = ena_com_indirect_table_allocate(ena_dev, indr_tbl_log_size); in ena_com_rss_init()
2653 rc = ena_com_hash_key_allocate(ena_dev); in ena_com_rss_init()
2655 ena_com_hash_key_fill_default_key(ena_dev); in ena_com_rss_init()
2659 rc = ena_com_hash_ctrl_init(ena_dev); in ena_com_rss_init()
2666 ena_com_hash_key_destroy(ena_dev); in ena_com_rss_init()
2668 ena_com_indirect_table_destroy(ena_dev); in ena_com_rss_init()
2674 void ena_com_rss_destroy(struct ena_com_dev *ena_dev) in ena_com_rss_destroy() argument
2676 ena_com_indirect_table_destroy(ena_dev); in ena_com_rss_destroy()
2677 ena_com_hash_key_destroy(ena_dev); in ena_com_rss_destroy()
2678 ena_com_hash_ctrl_destroy(ena_dev); in ena_com_rss_destroy()
2680 memset(&ena_dev->rss, 0x0, sizeof(ena_dev->rss)); in ena_com_rss_destroy()
2683 int ena_com_allocate_host_info(struct ena_com_dev *ena_dev) in ena_com_allocate_host_info() argument
2685 struct ena_host_attribute *host_attr = &ena_dev->host_attr; in ena_com_allocate_host_info()
2687 host_attr->host_info = dma_alloc_coherent(ena_dev->dmadev, SZ_4K, in ena_com_allocate_host_info()
2699 int ena_com_allocate_debug_area(struct ena_com_dev *ena_dev, in ena_com_allocate_debug_area() argument
2702 struct ena_host_attribute *host_attr = &ena_dev->host_attr; in ena_com_allocate_debug_area()
2705 dma_alloc_coherent(ena_dev->dmadev, debug_area_size, in ena_com_allocate_debug_area()
2717 void ena_com_delete_host_info(struct ena_com_dev *ena_dev) in ena_com_delete_host_info() argument
2719 struct ena_host_attribute *host_attr = &ena_dev->host_attr; in ena_com_delete_host_info()
2722 dma_free_coherent(ena_dev->dmadev, SZ_4K, host_attr->host_info, in ena_com_delete_host_info()
2728 void ena_com_delete_debug_area(struct ena_com_dev *ena_dev) in ena_com_delete_debug_area() argument
2730 struct ena_host_attribute *host_attr = &ena_dev->host_attr; in ena_com_delete_debug_area()
2733 dma_free_coherent(ena_dev->dmadev, host_attr->debug_area_size, in ena_com_delete_debug_area()
2739 int ena_com_set_host_attributes(struct ena_com_dev *ena_dev) in ena_com_set_host_attributes() argument
2741 struct ena_host_attribute *host_attr = &ena_dev->host_attr; in ena_com_set_host_attributes()
2753 admin_queue = &ena_dev->admin_queue; in ena_com_set_host_attributes()
2758 ret = ena_com_mem_addr_set(ena_dev, in ena_com_set_host_attributes()
2762 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_set_host_attributes()
2766 ret = ena_com_mem_addr_set(ena_dev, in ena_com_set_host_attributes()
2770 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_set_host_attributes()
2783 netdev_err(ena_dev->net_device, "Failed to set host attributes: %d\n", ret); in ena_com_set_host_attributes()
2789 bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev) in ena_com_interrupt_moderation_supported() argument
2791 return ena_com_check_supported_feature_id(ena_dev, in ena_com_interrupt_moderation_supported()
2795 static int ena_com_update_nonadaptive_moderation_interval(struct ena_com_dev *ena_dev, in ena_com_update_nonadaptive_moderation_interval() argument
2801 netdev_err(ena_dev->net_device, "Illegal interrupt delay granularity value\n"); in ena_com_update_nonadaptive_moderation_interval()
2810 int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev, in ena_com_update_nonadaptive_moderation_interval_tx() argument
2813 return ena_com_update_nonadaptive_moderation_interval(ena_dev, in ena_com_update_nonadaptive_moderation_interval_tx()
2815 ena_dev->intr_delay_resolution, in ena_com_update_nonadaptive_moderation_interval_tx()
2816 &ena_dev->intr_moder_tx_interval); in ena_com_update_nonadaptive_moderation_interval_tx()
2819 int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev, in ena_com_update_nonadaptive_moderation_interval_rx() argument
2822 return ena_com_update_nonadaptive_moderation_interval(ena_dev, in ena_com_update_nonadaptive_moderation_interval_rx()
2824 ena_dev->intr_delay_resolution, in ena_com_update_nonadaptive_moderation_interval_rx()
2825 &ena_dev->intr_moder_rx_interval); in ena_com_update_nonadaptive_moderation_interval_rx()
2828 int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev) in ena_com_init_interrupt_moderation() argument
2834 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_init_interrupt_moderation()
2839 netdev_dbg(ena_dev->net_device, "Feature %d isn't supported\n", in ena_com_init_interrupt_moderation()
2843 netdev_err(ena_dev->net_device, in ena_com_init_interrupt_moderation()
2848 ena_com_disable_adaptive_moderation(ena_dev); in ena_com_init_interrupt_moderation()
2854 ena_com_update_intr_delay_resolution(ena_dev, delay_resolution); in ena_com_init_interrupt_moderation()
2857 ena_com_disable_adaptive_moderation(ena_dev); in ena_com_init_interrupt_moderation()
2862 unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev) in ena_com_get_nonadaptive_moderation_interval_tx() argument
2864 return ena_dev->intr_moder_tx_interval; in ena_com_get_nonadaptive_moderation_interval_tx()
2867 unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev) in ena_com_get_nonadaptive_moderation_interval_rx() argument
2869 return ena_dev->intr_moder_rx_interval; in ena_com_get_nonadaptive_moderation_interval_rx()
2872 int ena_com_config_dev_mode(struct ena_com_dev *ena_dev, in ena_com_config_dev_mode() argument
2876 struct ena_com_llq_info *llq_info = &ena_dev->llq_info; in ena_com_config_dev_mode()
2880 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; in ena_com_config_dev_mode()
2884 rc = ena_com_config_llq_info(ena_dev, llq_features, llq_default_cfg); in ena_com_config_dev_mode()
2888 ena_dev->tx_max_header_size = llq_info->desc_list_entry_size - in ena_com_config_dev_mode()
2891 if (unlikely(ena_dev->tx_max_header_size == 0)) { in ena_com_config_dev_mode()
2892 netdev_err(ena_dev->net_device, "The size of the LLQ entry is smaller than needed\n"); in ena_com_config_dev_mode()
2896 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_DEV; in ena_com_config_dev_mode()