Lines Matching refs:WD_CMDREG5
71 #define WD_CMDREG5 5 /* Offset to 16-bit-only ASIC register 5. */ macro
235 int asic_reg5 = inb(ioaddr+WD_CMDREG5); in wd_probe1()
237 outb( NIC16 | (asic_reg5&0x1f), ioaddr+WD_CMDREG5); in wd_probe1()
267 int high_addr_bits = inb(ioaddr+WD_CMDREG5) & 0x1f; in wd_probe1()
382 outb(ei_status.reg5, ioaddr+WD_CMDREG5); in wd_open()
402 outb(NIC16 | ((dev->mem_start>>19) & 0x1f), wd_cmd_port+WD_CMDREG5); in wd_reset_8390()
421 outb(ISA16 | ei_status.reg5, wd_cmdreg+WD_CMDREG5); in wd_get_8390_hdr()
458 outb(ei_status.reg5, wd_cmdreg+WD_CMDREG5); in wd_block_input()
471 outb(ISA16 | ei_status.reg5, wd_cmdreg+WD_CMDREG5); in wd_block_output()
473 outb(ei_status.reg5, wd_cmdreg+WD_CMDREG5); in wd_block_output()
490 outb(ei_status.reg5, wd_cmdreg + WD_CMDREG5 ); in wd_close()