Lines Matching refs:a5psw_reg_readl
76 static u32 a5psw_reg_readl(struct a5psw *a5psw, int offset) in a5psw_reg_readl() function
87 reg = a5psw_reg_readl(a5psw, offset); in a5psw_reg_rmw()
177 u32 reg = a5psw_reg_readl(a5psw, A5PSW_AUTH_PORT(port)); in a5psw_port_authorize_set()
261 cmd_cfg = a5psw_reg_readl(a5psw, A5PSW_CMD_CFG(port)); in a5psw_phylink_mac_link_down()
517 lk_data.hi = a5psw_reg_readl(a5psw, A5PSW_LK_DATA_HI); in a5psw_port_fdb_add()
566 lk_data.hi = a5psw_reg_readl(a5psw, A5PSW_LK_DATA_HI); in a5psw_port_fdb_del()
623 lk_data.hi = a5psw_reg_readl(a5psw, A5PSW_LK_DATA_HI); in a5psw_port_fdb_dump()
629 lk_data.lo = a5psw_reg_readl(a5psw, A5PSW_LK_DATA_LO); in a5psw_port_fdb_dump()
668 vlan_res = a5psw_reg_readl(a5psw, A5PSW_VLAN_RES(i)); in a5psw_find_vlan_entry()
683 vlan_res = a5psw_reg_readl(a5psw, A5PSW_VLAN_RES(i)); in a5psw_new_vlan_res_entry()
708 reg = a5psw_reg_readl(a5psw, vlan_res_off); in a5psw_port_vlan_tagged_cfg()
780 reg_lo = a5psw_reg_readl(a5psw, offset + A5PSW_PORT_OFFSET(port)); in a5psw_read_stat()
782 reg_hi = a5psw_reg_readl(a5psw, A5PSW_STATS_HIWORD); in a5psw_read_stat()
1057 ret = a5psw_reg_readl(a5psw, A5PSW_MDIO_DATA) & A5PSW_MDIO_DATA_MASK; in a5psw_mdio_read()
1059 status = a5psw_reg_readl(a5psw, A5PSW_MDIO_CFG_STATUS); in a5psw_mdio_read()