dsa/mv88e6xxx/chip.h

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3  * Marvell 88E6xxx Ethernet switch single-chip definition
14 #include <linux/gpio/consumer.h>
28 /* PVT limits for 4-bit port and 5-bit switch */
110  * enum mv88e6xxx_edsa_support - Ethertype DSA tag support level
149 	 * ports 2-4 are not routet to pins.
152 	/* Multi-chip Addressing Mode.
154 	 * when it is non-zero, and use indirect access to internal registers.
157 	/* Dual-chip Addressing Mode
159 	 * allowing two to coexist on the same SMI interface.
344 	/* Handles automatic disabling and re-enabling of the PHY
358 	/* A switch may have a GPIO line tied to its reset pin. Parse
374 	 * off a GPIO as interrupt source
392 	/* GPIO resources */
415 	/* Per-port timestamping resources. */
498 #define LINK_UNFORCED		-2
517 #define SPEED_UNFORCED		-2
518 #define DUPLEX_UNFORCED		-2
640 	/* GPIO operations */
672 	/* Get/set data on GPIO pin */
673 	int (*get_data)(struct mv88e6xxx_chip *chip, unsigned int pin);
674 	int (*set_data)(struct mv88e6xxx_chip *chip, unsigned int pin,
677 	/* get/set GPIO direction */
678 	int (*get_dir)(struct mv88e6xxx_chip *chip, unsigned int pin);
679 	int (*set_dir)(struct mv88e6xxx_chip *chip, unsigned int pin,
682 	/* get/set GPIO pin control */
683 	int (*get_pctl)(struct mv88e6xxx_chip *chip, unsigned int pin,
685 	int (*set_pctl)(struct mv88e6xxx_chip *chip, unsigned int pin,
690 	/* Access port-scoped Precision Time Protocol registers */
711 	int (*ptp_verify)(struct ptp_clock_info *ptp, unsigned int pin,
747 	return chip->info->max_sid > 0 &&  in mv88e6xxx_has_stu()
748 		chip->info->ops->stu_loadpurge &&  in mv88e6xxx_has_stu()
749 		chip->info->ops->stu_getnext;  in mv88e6xxx_has_stu()
754 	return chip->info->pvt;  in mv88e6xxx_has_pvt()
759 	return !!chip->info->global2_addr;  in mv88e6xxx_has_lag()
764 	return chip->info->num_databases;  in mv88e6xxx_num_databases()
769 	return chip->info->num_macs;  in mv88e6xxx_num_macs()
774 	return chip->info->num_ports;  in mv88e6xxx_num_ports()
779 	return chip->info->max_vid;  in mv88e6xxx_max_vid()
784 	return chip->info->max_sid;  in mv88e6xxx_max_sid()
789 	return GENMASK((s32)mv88e6xxx_num_ports(chip) - 1, 0);  in mv88e6xxx_port_mask()
794 	return chip->info->num_gpio;  in mv88e6xxx_num_gpio()
799 	return (chip->info->invalid_port_mask & BIT(port)) != 0;  in mv88e6xxx_is_invalid_port()
805 	chip->ports[port].mab = mab;  in mv88e6xxx_port_set_mab()
818 	mutex_lock(&chip->reg_lock);  in mv88e6xxx_reg_lock()
823 	mutex_unlock(&chip->reg_lock);  in mv88e6xxx_reg_unlock()