net/dsa/mt7530.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
15 #define MT7530_MAX_MTU	(15 * 1024 - ETH_HLEN - ETH_FCS_LEN - MTK_HDR_LEN)
300 /* Register for port port-and-protocol based vlan 1 control */
403 /* MT7531 SGMII register group */
404 #define MT7531_SGMII_REG_BASE(p)	(0x5000 + ((p) - 5) * 0x1000)
540 /* Registers for RGMII and SGMII PLL clock */
602 /* LED enable, 0: Disable, 1: Enable (Default) */
608 /* GPIO output enable, 0: Disable, 1: Enable */
621 /* Registers for core PLL access through mmd indirect */
699 /* struct mt7530_port -	This is the main data structure for holding the state
701  * @enable:	The status used for show port is enabled or not.
708 	bool enable;  member
731 /* struct mt753x_info -	This is the main data structure for holding the specific
772 /* struct mt7530_priv -	This is the main data structure for holding the state
776  * @bus:		The bus used for the device and built-in PHY
791  * @irq_enable:		IRQ enable bits, synced to SYS_INT_EN
792  * @create_sgmii:	Pointer to function creating SGMII PCS instance(s)
830 	e->port = port;  in mt7530_hw_vlan_entry_init()
831 	e->untagged = untagged;  in mt7530_hw_vlan_entry_init()
851 	p->priv = priv;  in INIT_MT7530_DUMMY_POLL()
852 	p->reg = reg;  in INIT_MT7530_DUMMY_POLL()