135 static void ctucan_write32(struct ctucan_priv *priv, enum ctu_can_fd_can_registers reg, u32 val)  in ctucan_write32()  function
180 	ctucan_write32(priv, CTUCANFD_MODE, REG_MODE_RST);  in ctucan_reset()
240 		ctucan_write32(priv, CTUCANFD_BTR, btr);  in ctucan_set_btr()
248 		ctucan_write32(priv, CTUCANFD_BTR_FD, btr);  in ctucan_set_btr()
316 	ctucan_write32(priv, CTUCANFD_TRV_DELAY, ssp_cfg);  in ctucan_set_secondary_sample_point()
361 	ctucan_write32(priv, CTUCANFD_MODE, mode_reg);  in ctucan_set_mode()
386 	ctucan_write32(priv, CTUCANFD_TX_PRIORITY, priv->txb_prio);  in ctucan_chip_start()
421 	ctucan_write32(priv, CTUCANFD_INT_MASK_SET, int_msk);  in ctucan_chip_start()
422 	ctucan_write32(priv, CTUCANFD_INT_ENA_SET, int_ena);  in ctucan_chip_start()
430 	ctucan_write32(priv, CTUCANFD_MODE, mode_reg);  in ctucan_chip_start()
581 	ctucan_write32(priv, CTUCANFD_TX_COMMAND, tx_cmd);  in ctucan_give_txtb_cmd()
957 		ctucan_write32(priv, CTUCANFD_COMMAND, REG_COMMAND_CDO);  in ctucan_rx_poll()
965 			ctucan_write32(priv, CTUCANFD_INT_STAT, REG_INT_STAT_RBNEI);  in ctucan_rx_poll()
966 			ctucan_write32(priv, CTUCANFD_INT_MASK_CLR, REG_INT_STAT_RBNEI);  in ctucan_rx_poll()
985 	ctucan_write32(priv, CTUCANFD_TX_PRIORITY, prio);  in ctucan_rotate_txb_prio()
1075 			ctucan_write32(priv, CTUCANFD_INT_STAT, REG_INT_STAT_TXBHCI);  in ctucan_tx_interrupt()
1121 			ctucan_write32(priv, CTUCANFD_INT_MASK_SET, icr);  in ctucan_interrupt()
1122 			ctucan_write32(priv, CTUCANFD_INT_STAT, icr);  in ctucan_interrupt()
1140 			ctucan_write32(priv, CTUCANFD_INT_STAT, icr);  in ctucan_interrupt()
1161 	ctucan_write32(priv, CTUCANFD_INT_ENA_CLR, imask);  in ctucan_interrupt()
1162 	ctucan_write32(priv, CTUCANFD_INT_MASK_SET, imask);  in ctucan_interrupt()
1181 	ctucan_write32(priv, CTUCANFD_INT_ENA_CLR, mask);  in ctucan_chip_stop()
1182 	ctucan_write32(priv, CTUCANFD_INT_MASK_SET, mask);  in ctucan_chip_stop()
1185 	ctucan_write32(priv, CTUCANFD_MODE, mode);  in ctucan_chip_stop()