Lines Matching refs:cc770_write_reg
143 cc770_write_reg(priv, msgobj[mo].config, msgcfg); in enable_all_objs()
144 cc770_write_reg(priv, msgobj[mo].ctrl0, in enable_all_objs()
149 cc770_write_reg(priv, msgobj[mo].ctrl1, in enable_all_objs()
153 cc770_write_reg(priv, msgobj[mo].ctrl1, in enable_all_objs()
160 cc770_write_reg(priv, msgobj[mo].ctrl1, in enable_all_objs()
163 cc770_write_reg(priv, msgobj[mo].ctrl0, in enable_all_objs()
181 cc770_write_reg(priv, msgobj[mo].ctrl1, in disable_all_objs()
184 cc770_write_reg(priv, msgobj[mo].ctrl0, in disable_all_objs()
189 cc770_write_reg(priv, msgobj[mo].ctrl1, in disable_all_objs()
192 cc770_write_reg(priv, msgobj[mo].ctrl0, in disable_all_objs()
204 cc770_write_reg(priv, control, CTRL_CCE | CTRL_INI); in set_reset_mode()
212 cc770_write_reg(priv, status, 0); in set_reset_mode()
226 cc770_write_reg(priv, status, STAT_LEC_MASK); in set_normal_mode()
235 cc770_write_reg(priv, control, priv->control_normal_mode); in set_normal_mode()
245 cc770_write_reg(priv, control, (CTRL_CCE | CTRL_INI)); in chipset_init()
248 cc770_write_reg(priv, clkout, priv->clkout); in chipset_init()
251 cc770_write_reg(priv, cpu_interface, priv->cpu_interface); in chipset_init()
254 cc770_write_reg(priv, bus_config, priv->bus_config); in chipset_init()
260 cc770_write_reg(priv, status, 0); in chipset_init()
264 cc770_write_reg(priv, msgobj[mo].ctrl0, in chipset_init()
267 cc770_write_reg(priv, msgobj[mo].ctrl0, in chipset_init()
270 cc770_write_reg(priv, msgobj[mo].ctrl1, in chipset_init()
274 cc770_write_reg(priv, msgobj[mo].data[data], 0); in chipset_init()
276 cc770_write_reg(priv, msgobj[mo].id[id], 0); in chipset_init()
277 cc770_write_reg(priv, msgobj[mo].config, 0); in chipset_init()
281 cc770_write_reg(priv, global_mask_std[0], 0); in chipset_init()
282 cc770_write_reg(priv, global_mask_std[1], 0); in chipset_init()
283 cc770_write_reg(priv, global_mask_ext[0], 0); in chipset_init()
284 cc770_write_reg(priv, global_mask_ext[1], 0); in chipset_init()
285 cc770_write_reg(priv, global_mask_ext[2], 0); in chipset_init()
286 cc770_write_reg(priv, global_mask_ext[3], 0); in chipset_init()
295 cc770_write_reg(priv, control, CTRL_CCE | CTRL_EAF | CTRL_INI); in cc770_probe_chip()
297 cc770_write_reg(priv, cpu_interface, priv->cpu_interface); in cc770_probe_chip()
310 cc770_write_reg(priv, msgobj[1].data[1], 0x25); in cc770_probe_chip()
311 cc770_write_reg(priv, msgobj[2].data[3], 0x52); in cc770_probe_chip()
312 cc770_write_reg(priv, msgobj[10].data[6], 0xc3); in cc770_probe_chip()
369 cc770_write_reg(priv, bit_timing_0, btr0); in cc770_set_bittiming()
370 cc770_write_reg(priv, bit_timing_1, btr1); in cc770_set_bittiming()
398 cc770_write_reg(priv, msgobj[mo].ctrl0, in cc770_tx()
400 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_tx()
405 cc770_write_reg(priv, msgobj[mo].config, in cc770_tx()
407 cc770_write_reg(priv, msgobj[mo].id[3], id << 3); in cc770_tx()
408 cc770_write_reg(priv, msgobj[mo].id[2], id >> 5); in cc770_tx()
409 cc770_write_reg(priv, msgobj[mo].id[1], id >> 13); in cc770_tx()
410 cc770_write_reg(priv, msgobj[mo].id[0], id >> 21); in cc770_tx()
413 cc770_write_reg(priv, msgobj[mo].config, (dlc << 4) | rtr); in cc770_tx()
414 cc770_write_reg(priv, msgobj[mo].id[0], id >> 3); in cc770_tx()
415 cc770_write_reg(priv, msgobj[mo].id[1], id << 5); in cc770_tx()
419 cc770_write_reg(priv, msgobj[mo].data[i], cf->data[i]); in cc770_tx()
421 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_tx()
423 cc770_write_reg(priv, msgobj[mo].ctrl0, in cc770_tx()
523 cc770_write_reg(priv, control, CTRL_INI); in cc770_err()
588 cc770_write_reg(priv, status, STAT_LEC_MASK); in cc770_status_interrupt()
626 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_rx_interrupt()
631 cc770_write_reg(priv, msgobj[mo].ctrl0, in cc770_rx_interrupt()
634 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_rx_interrupt()
655 cc770_write_reg(priv, msgobj[mo].ctrl0, in cc770_rtr_interrupt()
658 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_rtr_interrupt()
673 cc770_write_reg(priv, msgobj[mo].ctrl0, in cc770_tx_interrupt()
675 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_tx_interrupt()