Lines Matching refs:TXX9_NDFMCR
23 #define TXX9_NDFMCR 0x04 macro
113 u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); in txx9ndfmc_write_buf()
115 txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_WE, TXX9_NDFMCR); in txx9ndfmc_write_buf()
118 txx9ndfmc_write(dev, mcr, TXX9_NDFMCR); in txx9ndfmc_write_buf()
138 u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); in txx9ndfmc_cmd_ctrl()
149 txx9ndfmc_write(dev, mcr, TXX9_NDFMCR); in txx9ndfmc_cmd_ctrl()
172 u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); in txx9ndfmc_calculate_ecc()
175 txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_OFF, TXX9_NDFMCR); in txx9ndfmc_calculate_ecc()
176 txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_READ, TXX9_NDFMCR); in txx9ndfmc_calculate_ecc()
183 txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_OFF, TXX9_NDFMCR); in txx9ndfmc_calculate_ecc()
211 u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); in txx9ndfmc_enable_hwecc()
214 txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_RESET, TXX9_NDFMCR); in txx9ndfmc_enable_hwecc()
215 txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_OFF, TXX9_NDFMCR); in txx9ndfmc_enable_hwecc()
216 txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_ON, TXX9_NDFMCR); in txx9ndfmc_enable_hwecc()
245 TXX9_NDFMCR_BSPRT : 0, TXX9_NDFMCR); in txx9ndfmc_initialize()