95 #define FIFO_DEPTH		8  macro
97 #define BCH_SEQ_READS		(32 / FIFO_DEPTH)
915 	unsigned int last_len = len % FIFO_DEPTH;  in marvell_nfc_xfer_data_in_pio()
916 	unsigned int last_full_offset = round_down(len, FIFO_DEPTH);  in marvell_nfc_xfer_data_in_pio()
919 	for (i = 0; i < last_full_offset; i += FIFO_DEPTH)  in marvell_nfc_xfer_data_in_pio()
920 		ioread32_rep(nfc->regs + NDDB, in + i, FIFO_REP(FIFO_DEPTH));  in marvell_nfc_xfer_data_in_pio()
923 		u8 tmp_buf[FIFO_DEPTH];  in marvell_nfc_xfer_data_in_pio()
925 		ioread32_rep(nfc->regs + NDDB, tmp_buf, FIFO_REP(FIFO_DEPTH));  in marvell_nfc_xfer_data_in_pio()
935 	unsigned int last_len = len % FIFO_DEPTH;  in marvell_nfc_xfer_data_out_pio()
936 	unsigned int last_full_offset = round_down(len, FIFO_DEPTH);  in marvell_nfc_xfer_data_out_pio()
939 	for (i = 0; i < last_full_offset; i += FIFO_DEPTH)  in marvell_nfc_xfer_data_out_pio()
940 		iowrite32_rep(nfc->regs + NDDB, out + i, FIFO_REP(FIFO_DEPTH));  in marvell_nfc_xfer_data_out_pio()
943 		u8 tmp_buf[FIFO_DEPTH];  in marvell_nfc_xfer_data_out_pio()
946 		iowrite32_rep(nfc->regs + NDDB, tmp_buf, FIFO_REP(FIFO_DEPTH));  in marvell_nfc_xfer_data_out_pio()
1353 	for (i = 0; i < data_len; i += FIFO_DEPTH * BCH_SEQ_READS) {  in marvell_nfc_hw_ecc_bch_read_chunk()
1357 					     FIFO_DEPTH * BCH_SEQ_READS);  in marvell_nfc_hw_ecc_bch_read_chunk()
1358 		data += FIFO_DEPTH * BCH_SEQ_READS;  in marvell_nfc_hw_ecc_bch_read_chunk()
1361 	for (i = 0; i < spare_len; i += FIFO_DEPTH * BCH_SEQ_READS) {  in marvell_nfc_hw_ecc_bch_read_chunk()
1365 					     FIFO_DEPTH * BCH_SEQ_READS);  in marvell_nfc_hw_ecc_bch_read_chunk()
1366 		spare += FIFO_DEPTH * BCH_SEQ_READS;  in marvell_nfc_hw_ecc_bch_read_chunk()
1772 				nfc_op->ndcb[3] |= round_up(len, FIFO_DEPTH);  in marvell_nfc_parse_instructions()
1786 				nfc_op->ndcb[3] |= round_up(len, FIFO_DEPTH);  in marvell_nfc_parse_instructions()