144 	struct ebu_nand_controller *ebu_host = nand_get_controller_data(chip);  in ebu_nand_readb()  local
145 	u8 cs_num = ebu_host->cs_num;  in ebu_nand_readb()
148 	val = readb(ebu_host->cs[cs_num].chipaddr + HSNAND_CS_OFFS);  in ebu_nand_readb()
155 	struct ebu_nand_controller *ebu_host = nand_get_controller_data(chip);  in ebu_nand_writeb()  local
156 	u8 cs_num = ebu_host->cs_num;  in ebu_nand_writeb()
158 	writeb(value, ebu_host->cs[cs_num].chipaddr + offset);  in ebu_nand_writeb()
180 	struct ebu_nand_controller *ebu_host = nand_get_controller_data(chip);  in ebu_nand_disable()  local
182 	writel(0, ebu_host->ebu + EBU_CON);  in ebu_nand_disable()
187 	struct ebu_nand_controller *ebu_host = nand_get_controller_data(chip);  in ebu_select_chip()  local
188 	void __iomem *nand_con = ebu_host->ebu + EBU_CON;  in ebu_select_chip()
189 	u32 cs = ebu_host->cs_num;  in ebu_select_chip()
271 	struct ebu_nand_controller *ebu_host = cookie;  in ebu_dma_rx_callback()  local
273 	dmaengine_terminate_async(ebu_host->dma_rx);  in ebu_dma_rx_callback()
275 	complete(&ebu_host->dma_access_complete);  in ebu_dma_rx_callback()
280 	struct ebu_nand_controller *ebu_host = cookie;  in ebu_dma_tx_callback()  local
282 	dmaengine_terminate_async(ebu_host->dma_tx);  in ebu_dma_tx_callback()
284 	complete(&ebu_host->dma_access_complete);  in ebu_dma_tx_callback()
287 static int ebu_dma_start(struct ebu_nand_controller *ebu_host, u32 dir,  in ebu_dma_start()  argument
301 		chan = ebu_host->dma_rx;  in ebu_dma_start()
302 		dma_completion = &ebu_host->dma_access_complete;  in ebu_dma_start()
305 		chan = ebu_host->dma_tx;  in ebu_dma_start()
306 		dma_completion = &ebu_host->dma_access_complete;  in ebu_dma_start()
312 		dev_err(ebu_host->dev, "Failed to map DMA buffer\n");  in ebu_dma_start()
324 	tx->callback_param = ebu_host;  in ebu_dma_start()
329 		dev_err(ebu_host->dev, "dma_submit_error %d\n", cookie);  in ebu_dma_start()
340 		dev_err(ebu_host->dev, "I/O Error in DMA RX (status %d)\n",  in ebu_dma_start()
350 	dma_unmap_single(ebu_host->dev, buf_dma, len, dir);  in ebu_dma_start()
355 static void ebu_nand_trigger(struct ebu_nand_controller *ebu_host,  in ebu_nand_trigger()  argument
361 	writel(val, ebu_host->hsnand + HSNAND_CTL1);  in ebu_nand_trigger()
363 	writel(val, ebu_host->hsnand + HSNAND_CTL2);  in ebu_nand_trigger()
365 	writel(ebu_host->nd_para0, ebu_host->hsnand + HSNAND_PARA0);  in ebu_nand_trigger()
368 	writel(0xFFFFFFFF, ebu_host->hsnand + HSNAND_CMSG_0);  in ebu_nand_trigger()
369 	writel(0xFFFFFFFF, ebu_host->hsnand + HSNAND_CMSG_1);  in ebu_nand_trigger()
372 	       ebu_host->hsnand + HSNAND_INT_MSK_CTL);  in ebu_nand_trigger()
380 	       HSNAND_CTL_ECC_OFF_V8TH | HSNAND_CTL_CE_SEL_CS(ebu_host->cs_num) |  in ebu_nand_trigger()
382 	       ebu_host->hsnand + HSNAND_CTL);  in ebu_nand_trigger()
389 	struct ebu_nand_controller *ebu_host = nand_get_controller_data(chip);  in ebu_nand_read_page_hwecc()  local
392 	ebu_nand_trigger(ebu_host, page, NAND_CMD_READ0);  in ebu_nand_read_page_hwecc()
394 	ret = ebu_dma_start(ebu_host, DMA_DEV_TO_MEM, buf, mtd->writesize);  in ebu_nand_read_page_hwecc()
401 	reg_data = readl(ebu_host->hsnand + HSNAND_CTL);  in ebu_nand_read_page_hwecc()
403 	writel(reg_data, ebu_host->hsnand + HSNAND_CTL);  in ebu_nand_read_page_hwecc()
412 	struct ebu_nand_controller *ebu_host = nand_get_controller_data(chip);  in ebu_nand_write_page_hwecc()  local
413 	void __iomem *int_sta = ebu_host->hsnand + HSNAND_INT_STA;  in ebu_nand_write_page_hwecc()
417 	ebu_nand_trigger(ebu_host, page, NAND_CMD_SEQIN);  in ebu_nand_write_page_hwecc()
419 	ret = ebu_dma_start(ebu_host, DMA_MEM_TO_DEV, buf, mtd->writesize);  in ebu_nand_write_page_hwecc()
425 		writel(reg, ebu_host->hsnand + HSNAND_CMSG_0);  in ebu_nand_write_page_hwecc()
428 		writel(reg, ebu_host->hsnand + HSNAND_CMSG_1);  in ebu_nand_write_page_hwecc()
436 	reg_data = readl(ebu_host->hsnand + HSNAND_CTL);  in ebu_nand_write_page_hwecc()
438 	writel(reg_data, ebu_host->hsnand + HSNAND_CTL);  in ebu_nand_write_page_hwecc()
448 	struct ebu_nand_controller *ebu_host = nand_get_controller_data(chip);  in ebu_nand_attach_chip()  local
503 	ebu_host->nd_para0 = pagesize | pg_per_blk | HSNAND_PARA0_BYP_EN_NP |  in ebu_nand_attach_chip()
567 static void ebu_dma_cleanup(struct ebu_nand_controller *ebu_host)  in ebu_dma_cleanup()  argument
569 	if (ebu_host->dma_rx)  in ebu_dma_cleanup()
570 		dma_release_channel(ebu_host->dma_rx);  in ebu_dma_cleanup()
572 	if (ebu_host->dma_tx)  in ebu_dma_cleanup()
573 		dma_release_channel(ebu_host->dma_tx);  in ebu_dma_cleanup()
579 	struct ebu_nand_controller *ebu_host;  in ebu_nand_probe()  local
588 	ebu_host = devm_kzalloc(dev, sizeof(*ebu_host), GFP_KERNEL);  in ebu_nand_probe()
589 	if (!ebu_host)  in ebu_nand_probe()
592 	ebu_host->dev = dev;  in ebu_nand_probe()
593 	nand_controller_init(&ebu_host->controller);  in ebu_nand_probe()
595 	ebu_host->ebu = devm_platform_ioremap_resource_byname(pdev, "ebunand");  in ebu_nand_probe()
596 	if (IS_ERR(ebu_host->ebu))  in ebu_nand_probe()
597 		return PTR_ERR(ebu_host->ebu);  in ebu_nand_probe()
599 	ebu_host->hsnand = devm_platform_ioremap_resource_byname(pdev, "hsnand");  in ebu_nand_probe()
600 	if (IS_ERR(ebu_host->hsnand))  in ebu_nand_probe()
601 		return PTR_ERR(ebu_host->hsnand);  in ebu_nand_probe()
619 	ebu_host->cs_num = cs;  in ebu_nand_probe()
627 	ebu_host->cs[cs].chipaddr = devm_platform_ioremap_resource_byname(pdev,  in ebu_nand_probe()
629 	if (IS_ERR(ebu_host->cs[cs].chipaddr)) {  in ebu_nand_probe()
630 		ret = PTR_ERR(ebu_host->cs[cs].chipaddr);  in ebu_nand_probe()
634 	ebu_host->clk = devm_clk_get_enabled(dev, NULL);  in ebu_nand_probe()
635 	if (IS_ERR(ebu_host->clk)) {  in ebu_nand_probe()
636 		ret = dev_err_probe(dev, PTR_ERR(ebu_host->clk),  in ebu_nand_probe()
641 	ebu_host->dma_tx = dma_request_chan(dev, "tx");  in ebu_nand_probe()
642 	if (IS_ERR(ebu_host->dma_tx)) {  in ebu_nand_probe()
643 		ret = dev_err_probe(dev, PTR_ERR(ebu_host->dma_tx),  in ebu_nand_probe()
648 	ebu_host->dma_rx = dma_request_chan(dev, "rx");  in ebu_nand_probe()
649 	if (IS_ERR(ebu_host->dma_rx)) {  in ebu_nand_probe()
650 		ret = dev_err_probe(dev, PTR_ERR(ebu_host->dma_rx),  in ebu_nand_probe()
652 		ebu_host->dma_rx = NULL;  in ebu_nand_probe()
667 	ebu_host->cs[cs].addr_sel = res->start;  in ebu_nand_probe()
668 	writel(ebu_host->cs[cs].addr_sel | EBU_ADDR_MASK(5) | EBU_ADDR_SEL_REGEN,  in ebu_nand_probe()
669 	       ebu_host->ebu + EBU_ADDR_SEL(cs));  in ebu_nand_probe()
671 	nand_set_flash_node(&ebu_host->chip, chip_np);  in ebu_nand_probe()
673 	mtd = nand_to_mtd(&ebu_host->chip);  in ebu_nand_probe()
675 		dev_err(ebu_host->dev, "NAND label property is mandatory\n");  in ebu_nand_probe()
681 	ebu_host->dev = dev;  in ebu_nand_probe()
683 	platform_set_drvdata(pdev, ebu_host);  in ebu_nand_probe()
684 	nand_set_controller_data(&ebu_host->chip, ebu_host);  in ebu_nand_probe()
686 	nand = &ebu_host->chip;  in ebu_nand_probe()
687 	nand->controller = &ebu_host->controller;  in ebu_nand_probe()
691 	ret = nand_scan(&ebu_host->chip, 1);  in ebu_nand_probe()
702 	nand_cleanup(&ebu_host->chip);  in ebu_nand_probe()
704 	ebu_dma_cleanup(ebu_host);  in ebu_nand_probe()
713 	struct ebu_nand_controller *ebu_host = platform_get_drvdata(pdev);  in ebu_nand_remove()  local
716 	ret = mtd_device_unregister(nand_to_mtd(&ebu_host->chip));  in ebu_nand_remove()
718 	nand_cleanup(&ebu_host->chip);  in ebu_nand_remove()
719 	ebu_nand_disable(&ebu_host->chip);  in ebu_nand_remove()
720 	ebu_dma_cleanup(ebu_host);  in ebu_nand_remove()