164 	void __iomem		*regs_va;  member
278 	writel_relaxed(value | tclr | tar, host->regs_va + FSMC_PC);  in fsmc_nand_setup()
279 	writel_relaxed(thiz | thold | twait | tset, host->regs_va + COMM);  in fsmc_nand_setup()
280 	writel_relaxed(thiz | thold | twait | tset, host->regs_va + ATTRIB);  in fsmc_nand_setup()
378 	writel_relaxed(readl(host->regs_va + FSMC_PC) & ~FSMC_ECCPLEN_256,  in fsmc_enable_hwecc()
379 		       host->regs_va + FSMC_PC);  in fsmc_enable_hwecc()
380 	writel_relaxed(readl(host->regs_va + FSMC_PC) & ~FSMC_ECCEN,  in fsmc_enable_hwecc()
381 		       host->regs_va + FSMC_PC);  in fsmc_enable_hwecc()
382 	writel_relaxed(readl(host->regs_va + FSMC_PC) | FSMC_ECCEN,  in fsmc_enable_hwecc()
383 		       host->regs_va + FSMC_PC);  in fsmc_enable_hwecc()
399 		if (readl_relaxed(host->regs_va + STS) & FSMC_CODE_RDY)  in fsmc_read_hwecc_ecc4()
410 	ecc_tmp = readl_relaxed(host->regs_va + ECC1);  in fsmc_read_hwecc_ecc4()
416 	ecc_tmp = readl_relaxed(host->regs_va + ECC2);  in fsmc_read_hwecc_ecc4()
422 	ecc_tmp = readl_relaxed(host->regs_va + ECC3);  in fsmc_read_hwecc_ecc4()
428 	ecc_tmp = readl_relaxed(host->regs_va + STS);  in fsmc_read_hwecc_ecc4()
445 	ecc_tmp = readl_relaxed(host->regs_va + ECC1);  in fsmc_read_hwecc_ecc1()
787 	num_err = (readl_relaxed(host->regs_va + STS) >> 10) & 0xF;  in fsmc_bch8_correct_data()
830 	ecc1 = readl_relaxed(host->regs_va + ECC1);  in fsmc_bch8_correct_data()
831 	ecc2 = readl_relaxed(host->regs_va + ECC2);  in fsmc_bch8_correct_data()
832 	ecc3 = readl_relaxed(host->regs_va + ECC3);  in fsmc_bch8_correct_data()
833 	ecc4 = readl_relaxed(host->regs_va + STS);  in fsmc_bch8_correct_data()
1012 	val = readl(host->regs_va + FSMC_PC);  in fsmc_nand_disable()
1014 	writel(val, host->regs_va + FSMC_PC);  in fsmc_nand_disable()
1066 	host->regs_va = base + FSMC_NOR_REG_SIZE +  in fsmc_nand_probe()