143 static struct s3c_onenand *onenand;  variable
147 	return readl(onenand->base + offset);  in s3c_read_reg()
152 	writel(value, onenand->base + offset);  in s3c_write_reg()
157 	return readl(onenand->ahb_addr + cmd);  in s3c_read_cmd()
162 	writel(value, onenand->ahb_addr + cmd);  in s3c_write_cmd()
172 			(unsigned int) onenand->base + i,  in s3c_dump_reg()
218 	struct onenand_chip *this = onenand->mtd->priv;  in s3c_onenand_readw()
219 	struct device *dev = &onenand->pdev->dev;  in s3c_onenand_readw()
251 	if ((unsigned long)addr < ONENAND_DATARAM && onenand->bootram_command) {  in s3c_onenand_readw()
260 	value = s3c_read_cmd(CMD_MAP_11(onenand, word_addr)) & 0xffff;  in s3c_onenand_readw()
268 	struct onenand_chip *this = onenand->mtd->priv;  in s3c_onenand_writew()
269 	struct device *dev = &onenand->pdev->dev;  in s3c_onenand_writew()
294 			onenand->bootram_command = 1;  in s3c_onenand_writew()
299 			onenand->bootram_command = 0;  in s3c_onenand_writew()
307 	s3c_write_cmd(value, CMD_MAP_11(onenand, word_addr));  in s3c_onenand_writew()
312 	struct device *dev = &onenand->pdev->dev;  in s3c_onenand_wait()
390 	mem_addr = onenand->mem_addr(fba, fpa, fsa);  in s3c_onenand_command()
391 	cmd_map_01 = CMD_MAP_01(onenand, mem_addr);  in s3c_onenand_command()
392 	cmd_map_10 = CMD_MAP_10(onenand, mem_addr);  in s3c_onenand_command()
409 	m = onenand->page_buf;  in s3c_onenand_command()
410 	s = onenand->oob_buf;  in s3c_onenand_command()
482 		p = onenand->page_buf;  in s3c_get_bufferram()
486 		p = onenand->oob_buf;  in s3c_get_bufferram()
520 	void __iomem *base = onenand->dma_addr;  in s5pc110_dma_poll()
564 	void __iomem *base = onenand->dma_addr;  in s5pc110_onenand_irq()
578 	if (!onenand->complete.done)  in s5pc110_onenand_irq()
579 		complete(&onenand->complete);  in s5pc110_onenand_irq()
586 	void __iomem *base = onenand->dma_addr;  in s5pc110_dma_irq()
611 	wait_for_completion_timeout(&onenand->complete, msecs_to_jiffies(20));  in s5pc110_dma_irq()
624 	struct device *dev = &onenand->pdev->dev;  in s5pc110_read_bufferram()
635 		!onenand->dma_addr || count != mtd->writesize)  in s5pc110_read_bufferram()
654 		dma_src = onenand->phys_base + (p - this->base);  in s5pc110_read_bufferram()
658 		dma_src = onenand->phys_base + (p - this->base);  in s5pc110_read_bufferram()
730 	struct device *dev = &onenand->pdev->dev;  in s3c_onenand_check_lock_status()
736 		unsigned int mem_addr = onenand->mem_addr(block, 0, 0);  in s3c_onenand_check_lock_status()
737 		s3c_read_cmd(CMD_MAP_01(onenand, mem_addr));  in s3c_onenand_check_lock_status()
753 	start_mem_addr = onenand->mem_addr(start, 0, 0);  in s3c_onenand_do_lock_cmd()
755 	end_mem_addr = onenand->mem_addr(end, 0, 0);  in s3c_onenand_do_lock_cmd()
758 		s3c_write_cmd(ONENAND_LOCK_START, CMD_MAP_10(onenand,  in s3c_onenand_do_lock_cmd()
760 		s3c_write_cmd(ONENAND_LOCK_END, CMD_MAP_10(onenand,  in s3c_onenand_do_lock_cmd()
763 		s3c_write_cmd(ONENAND_UNLOCK_START, CMD_MAP_10(onenand,  in s3c_onenand_do_lock_cmd()
765 		s3c_write_cmd(ONENAND_UNLOCK_END, CMD_MAP_10(onenand,  in s3c_onenand_do_lock_cmd()
805 	onenand->mtd = mtd;  in s3c_onenand_setup()
807 	if (onenand->type == TYPE_S3C6400) {  in s3c_onenand_setup()
808 		onenand->mem_addr = s3c6400_mem_addr;  in s3c_onenand_setup()
809 		onenand->cmd_map = s3c64xx_cmd_map;  in s3c_onenand_setup()
810 	} else if (onenand->type == TYPE_S3C6410) {  in s3c_onenand_setup()
811 		onenand->mem_addr = s3c6410_mem_addr;  in s3c_onenand_setup()
812 		onenand->cmd_map = s3c64xx_cmd_map;  in s3c_onenand_setup()
813 	} else if (onenand->type == TYPE_S5PC110) {  in s3c_onenand_setup()
850 	onenand = devm_kzalloc(&pdev->dev, sizeof(struct s3c_onenand),  in s3c_onenand_probe()
852 	if (!onenand)  in s3c_onenand_probe()
858 	onenand->pdev = pdev;  in s3c_onenand_probe()
859 	onenand->type = platform_get_device_id(pdev)->driver_data;  in s3c_onenand_probe()
863 	onenand->base = devm_platform_get_and_ioremap_resource(pdev, 0, &r);  in s3c_onenand_probe()
864 	if (IS_ERR(onenand->base))  in s3c_onenand_probe()
865 		return PTR_ERR(onenand->base);  in s3c_onenand_probe()
867 	onenand->phys_base = r->start;  in s3c_onenand_probe()
870 	this->base = onenand->base;  in s3c_onenand_probe()
875 	if (onenand->type != TYPE_S5PC110) {  in s3c_onenand_probe()
876 		onenand->ahb_addr = devm_platform_ioremap_resource(pdev, 1);  in s3c_onenand_probe()
877 		if (IS_ERR(onenand->ahb_addr))  in s3c_onenand_probe()
878 			return PTR_ERR(onenand->ahb_addr);  in s3c_onenand_probe()
881 		onenand->page_buf = devm_kzalloc(&pdev->dev, SZ_4K,  in s3c_onenand_probe()
883 		if (!onenand->page_buf)  in s3c_onenand_probe()
887 		onenand->oob_buf = devm_kzalloc(&pdev->dev, 128, GFP_KERNEL);  in s3c_onenand_probe()
888 		if (!onenand->oob_buf)  in s3c_onenand_probe()
896 		onenand->dma_addr = devm_platform_ioremap_resource(pdev, 1);  in s3c_onenand_probe()
897 		if (IS_ERR(onenand->dma_addr))  in s3c_onenand_probe()
898 			return PTR_ERR(onenand->dma_addr);  in s3c_onenand_probe()
904 			init_completion(&onenand->complete);  in s3c_onenand_probe()
909 					       &onenand);  in s3c_onenand_probe()
921 	if (onenand->type != TYPE_S5PC110) {  in s3c_onenand_probe()
928 		dev_info(&onenand->pdev->dev, "OneNAND Sync. Burst Read enabled\n");  in s3c_onenand_probe()