Lines Matching refs:sdmmc_base

186 	void __iomem *sdmmc_base;  member
212 u32 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); in wmt_set_sd_power()
219 writeb(reg_tmp, priv->sdmmc_base + SDMMC_BUSMODE); in wmt_set_sd_power()
235 tmp_resp = readb(priv->sdmmc_base + SDMMC_RSP); in wmt_mci_read_response()
237 tmp_resp = readb(priv->sdmmc_base + SDMMC_RSP + in wmt_mci_read_response()
249 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR); in wmt_mci_start_command()
250 writeb(reg_tmp | CTLR_CMD_START, priv->sdmmc_base + SDMMC_CTLR); in wmt_mci_start_command()
262 writeb(command, priv->sdmmc_base + SDMMC_CMD); in wmt_mci_send_command()
263 writel(arg, priv->sdmmc_base + SDMMC_ARG); in wmt_mci_send_command()
264 writeb(rsptype, priv->sdmmc_base + SDMMC_RSPTYPE); in wmt_mci_send_command()
267 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR); in wmt_mci_send_command()
268 writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR); in wmt_mci_send_command()
274 writeb(0xFF, priv->sdmmc_base + SDMMC_STS0); in wmt_mci_send_command()
275 writeb(0xFF, priv->sdmmc_base + SDMMC_STS1); in wmt_mci_send_command()
276 writeb(0xFF, priv->sdmmc_base + SDMMC_STS2); in wmt_mci_send_command()
277 writeb(0xFF, priv->sdmmc_base + SDMMC_STS3); in wmt_mci_send_command()
280 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR); in wmt_mci_send_command()
282 priv->sdmmc_base + SDMMC_CTLR); in wmt_mci_send_command()
289 writel(DMA_ISR_INT_STS, priv->sdmmc_base + SDDMA_ISR); in wmt_mci_disable_dma()
290 writel(0, priv->sdmmc_base + SDDMA_IER); in wmt_mci_disable_dma()
340 status = readl(priv->sdmmc_base + SDDMA_CCR) & 0x0F; in wmt_mci_dma_isr()
380 status0 = readb(priv->sdmmc_base + SDMMC_STS0); in wmt_mci_regular_isr()
381 status1 = readb(priv->sdmmc_base + SDMMC_STS1); in wmt_mci_regular_isr()
382 status2 = readb(priv->sdmmc_base + SDMMC_STS2); in wmt_mci_regular_isr()
385 reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0); in wmt_mci_regular_isr()
396 writeb(STS0_DEVICE_INS, priv->sdmmc_base + SDMMC_STS0); in wmt_mci_regular_isr()
454 writeb(status0, priv->sdmmc_base + SDMMC_STS0); in wmt_mci_regular_isr()
455 writeb(status1, priv->sdmmc_base + SDMMC_STS1); in wmt_mci_regular_isr()
456 writeb(status2, priv->sdmmc_base + SDMMC_STS2); in wmt_mci_regular_isr()
469 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); in wmt_reset_hardware()
470 writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + SDMMC_BUSMODE); in wmt_reset_hardware()
473 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR); in wmt_reset_hardware()
474 writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR); in wmt_reset_hardware()
477 writew(BLKL_INT_ENABLE | BLKL_GPI_CD, priv->sdmmc_base + SDMMC_BLKLEN); in wmt_reset_hardware()
480 writeb(0xFF, priv->sdmmc_base + SDMMC_STS0); in wmt_reset_hardware()
481 writeb(0xFF, priv->sdmmc_base + SDMMC_STS1); in wmt_reset_hardware()
484 writeb(INT0_CD_INT_EN | INT0_DI_INT_EN, priv->sdmmc_base + in wmt_reset_hardware()
487 INT1_CMD_RES_TOUT_INT_EN, priv->sdmmc_base + SDMMC_INTMASK1); in wmt_reset_hardware()
490 writew(8191, priv->sdmmc_base + SDMMC_DMATIMEOUT); in wmt_reset_hardware()
493 reg_tmp = readb(priv->sdmmc_base + SDMMC_STS2); in wmt_reset_hardware()
494 writeb(reg_tmp | STS2_DIS_FORCECLK, priv->sdmmc_base + SDMMC_STS2); in wmt_reset_hardware()
506 writel(DMA_GCR_SOFT_RESET, priv->sdmmc_base + SDDMA_GCR); in wmt_dma_init()
507 writel(DMA_GCR_DMA_EN, priv->sdmmc_base + SDDMA_GCR); in wmt_dma_init()
508 if ((readl(priv->sdmmc_base + SDDMA_GCR) & DMA_GCR_DMA_EN) != 0) in wmt_dma_init()
532 writel(DMA_IER_INT_EN, priv->sdmmc_base + SDDMA_IER); in wmt_dma_config()
535 writel(descaddr, priv->sdmmc_base + SDDMA_DESPR); in wmt_dma_config()
537 writel(0x00, priv->sdmmc_base + SDDMA_CCR); in wmt_dma_config()
540 reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR); in wmt_dma_config()
541 writel(reg_tmp & DMA_CCR_IF_TO_PERIPHERAL, priv->sdmmc_base + in wmt_dma_config()
544 reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR); in wmt_dma_config()
545 writel(reg_tmp | DMA_CCR_PERIPHERAL_TO_IF, priv->sdmmc_base + in wmt_dma_config()
554 reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR); in wmt_dma_start()
555 writel(reg_tmp | DMA_CCR_RUN, priv->sdmmc_base + SDDMA_CCR); in wmt_dma_start()
609 reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN); in wmt_mci_request()
611 priv->sdmmc_base + SDMMC_BLKLEN); in wmt_mci_request()
614 writew(req->data->blocks, priv->sdmmc_base + SDMMC_BLKCNT); in wmt_mci_request()
687 busmode = readb(priv->sdmmc_base + SDMMC_BUSMODE); in wmt_mci_set_ios()
688 extctrl = readb(priv->sdmmc_base + SDMMC_EXTCTRL); in wmt_mci_set_ios()
705 writeb(busmode, priv->sdmmc_base + SDMMC_BUSMODE); in wmt_mci_set_ios()
706 writeb(extctrl, priv->sdmmc_base + SDMMC_EXTCTRL); in wmt_mci_set_ios()
713 return !(readb(priv->sdmmc_base + SDMMC_STS0) & STS0_WRITE_PROTECT); in wmt_mci_get_ro()
719 u32 cd = (readb(priv->sdmmc_base + SDMMC_STS0) & STS0_CD_GPI) >> 3; in wmt_mci_get_cd()
807 priv->sdmmc_base = of_iomap(np, 0); in wmt_mci_probe()
808 if (!priv->sdmmc_base) { in wmt_mci_probe()
875 iounmap(priv->sdmmc_base); in wmt_mci_probe()
892 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); in wmt_mci_remove()
893 writel(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + SDMMC_BUSMODE); in wmt_mci_remove()
894 reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN); in wmt_mci_remove()
895 writew(reg_tmp & ~(0xA000), priv->sdmmc_base + SDMMC_BLKLEN); in wmt_mci_remove()
896 writeb(0xFF, priv->sdmmc_base + SDMMC_STS0); in wmt_mci_remove()
897 writeb(0xFF, priv->sdmmc_base + SDMMC_STS1); in wmt_mci_remove()
908 iounmap(priv->sdmmc_base); in wmt_mci_remove()
929 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); in wmt_mci_suspend()
930 writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + in wmt_mci_suspend()
933 reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN); in wmt_mci_suspend()
934 writew(reg_tmp & 0x5FFF, priv->sdmmc_base + SDMMC_BLKLEN); in wmt_mci_suspend()
936 writeb(0xFF, priv->sdmmc_base + SDMMC_STS0); in wmt_mci_suspend()
937 writeb(0xFF, priv->sdmmc_base + SDMMC_STS1); in wmt_mci_suspend()
953 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE); in wmt_mci_resume()
954 writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + in wmt_mci_resume()
957 reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN); in wmt_mci_resume()
959 priv->sdmmc_base + SDMMC_BLKLEN); in wmt_mci_resume()
961 reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0); in wmt_mci_resume()
962 writeb(reg_tmp | INT0_DI_INT_EN, priv->sdmmc_base + in wmt_mci_resume()