Lines Matching +full:sh +full:- +full:mmcif
1 // SPDX-License-Identifier: GPL-2.0
3 * MMCIF eMMC driver.
10 * The MMCIF driver is now processing MMC requests asynchronously, according
13 * The MMCIF driver processes MMC requests in up to 3 stages: command, optional
23 * request- and stage-specific handler methods.
39 #include <linux/dma-mapping.h>
46 #include <linux/mmc/slot-gpio.h>
252 { .compatible = "renesas,sh-mmcif" },
257 #define sh_mmcif_host_to_dev(host) (&host->pd->dev)
262 writel(val | readl(host->addr + reg), host->addr + reg); in sh_mmcif_bitset()
268 writel(~val & readl(host->addr + reg), host->addr + reg); in sh_mmcif_bitclr()
274 struct mmc_request *mrq = host->mrq; in sh_mmcif_dma_complete()
279 if (WARN(!mrq || !mrq->data, "%s: NULL data in DMA completion!\n", in sh_mmcif_dma_complete()
283 complete(&host->dma_complete); in sh_mmcif_dma_complete()
288 struct mmc_data *data = host->mrq->data; in sh_mmcif_start_dma_rx()
289 struct scatterlist *sg = data->sg; in sh_mmcif_start_dma_rx()
291 struct dma_chan *chan = host->chan_rx; in sh_mmcif_start_dma_rx()
293 dma_cookie_t cookie = -EINVAL; in sh_mmcif_start_dma_rx()
296 ret = dma_map_sg(chan->device->dev, sg, data->sg_len, in sh_mmcif_start_dma_rx()
299 host->dma_active = true; in sh_mmcif_start_dma_rx()
305 desc->callback = sh_mmcif_dma_complete; in sh_mmcif_start_dma_rx()
306 desc->callback_param = host; in sh_mmcif_start_dma_rx()
311 dev_dbg(dev, "%s(): mapped %d -> %d, cookie %d\n", in sh_mmcif_start_dma_rx()
312 __func__, data->sg_len, ret, cookie); in sh_mmcif_start_dma_rx()
317 ret = -EIO; in sh_mmcif_start_dma_rx()
318 host->chan_rx = NULL; in sh_mmcif_start_dma_rx()
319 host->dma_active = false; in sh_mmcif_start_dma_rx()
322 chan = host->chan_tx; in sh_mmcif_start_dma_rx()
324 host->chan_tx = NULL; in sh_mmcif_start_dma_rx()
333 desc, cookie, data->sg_len); in sh_mmcif_start_dma_rx()
338 struct mmc_data *data = host->mrq->data; in sh_mmcif_start_dma_tx()
339 struct scatterlist *sg = data->sg; in sh_mmcif_start_dma_tx()
341 struct dma_chan *chan = host->chan_tx; in sh_mmcif_start_dma_tx()
343 dma_cookie_t cookie = -EINVAL; in sh_mmcif_start_dma_tx()
346 ret = dma_map_sg(chan->device->dev, sg, data->sg_len, in sh_mmcif_start_dma_tx()
349 host->dma_active = true; in sh_mmcif_start_dma_tx()
355 desc->callback = sh_mmcif_dma_complete; in sh_mmcif_start_dma_tx()
356 desc->callback_param = host; in sh_mmcif_start_dma_tx()
361 dev_dbg(dev, "%s(): mapped %d -> %d, cookie %d\n", in sh_mmcif_start_dma_tx()
362 __func__, data->sg_len, ret, cookie); in sh_mmcif_start_dma_tx()
367 ret = -EIO; in sh_mmcif_start_dma_tx()
368 host->chan_tx = NULL; in sh_mmcif_start_dma_tx()
369 host->dma_active = false; in sh_mmcif_start_dma_tx()
372 chan = host->chan_rx; in sh_mmcif_start_dma_tx()
374 host->chan_rx = NULL; in sh_mmcif_start_dma_tx()
406 res = platform_get_resource(host->pd, IORESOURCE_MEM, 0); in sh_mmcif_dma_slave_config()
408 return -EINVAL; in sh_mmcif_dma_slave_config()
413 cfg.src_addr = res->start + MMCIF_CE_DATA; in sh_mmcif_dma_slave_config()
416 cfg.dst_addr = res->start + MMCIF_CE_DATA; in sh_mmcif_dma_slave_config()
426 host->dma_active = false; in sh_mmcif_request_dma()
429 if (IS_ENABLED(CONFIG_SUPERH) && dev->platform_data) { in sh_mmcif_request_dma()
430 struct sh_mmcif_plat_data *pdata = dev->platform_data; in sh_mmcif_request_dma()
432 host->chan_tx = sh_mmcif_request_dma_pdata(host, in sh_mmcif_request_dma()
433 pdata->slave_id_tx); in sh_mmcif_request_dma()
434 host->chan_rx = sh_mmcif_request_dma_pdata(host, in sh_mmcif_request_dma()
435 pdata->slave_id_rx); in sh_mmcif_request_dma()
437 host->chan_tx = dma_request_chan(dev, "tx"); in sh_mmcif_request_dma()
438 if (IS_ERR(host->chan_tx)) in sh_mmcif_request_dma()
439 host->chan_tx = NULL; in sh_mmcif_request_dma()
440 host->chan_rx = dma_request_chan(dev, "rx"); in sh_mmcif_request_dma()
441 if (IS_ERR(host->chan_rx)) in sh_mmcif_request_dma()
442 host->chan_rx = NULL; in sh_mmcif_request_dma()
444 dev_dbg(dev, "%s: got channel TX %p RX %p\n", __func__, host->chan_tx, in sh_mmcif_request_dma()
445 host->chan_rx); in sh_mmcif_request_dma()
447 if (!host->chan_tx || !host->chan_rx || in sh_mmcif_request_dma()
448 sh_mmcif_dma_slave_config(host, host->chan_tx, DMA_MEM_TO_DEV) || in sh_mmcif_request_dma()
449 sh_mmcif_dma_slave_config(host, host->chan_rx, DMA_DEV_TO_MEM)) in sh_mmcif_request_dma()
455 if (host->chan_tx) in sh_mmcif_request_dma()
456 dma_release_channel(host->chan_tx); in sh_mmcif_request_dma()
457 if (host->chan_rx) in sh_mmcif_request_dma()
458 dma_release_channel(host->chan_rx); in sh_mmcif_request_dma()
459 host->chan_tx = host->chan_rx = NULL; in sh_mmcif_request_dma()
466 if (host->chan_tx) { in sh_mmcif_release_dma()
467 struct dma_chan *chan = host->chan_tx; in sh_mmcif_release_dma()
468 host->chan_tx = NULL; in sh_mmcif_release_dma()
471 if (host->chan_rx) { in sh_mmcif_release_dma()
472 struct dma_chan *chan = host->chan_rx; in sh_mmcif_release_dma()
473 host->chan_rx = NULL; in sh_mmcif_release_dma()
477 host->dma_active = false; in sh_mmcif_release_dma()
483 struct sh_mmcif_plat_data *p = dev->platform_data; in sh_mmcif_clock_control()
484 bool sup_pclk = p ? p->sup_pclk : false; in sh_mmcif_clock_control()
485 unsigned int current_clk = clk_get_rate(host->clk); in sh_mmcif_clock_control()
494 if (host->clkdiv_map) { in sh_mmcif_clock_control()
501 for (i = 31; i >= 0; i--) { in sh_mmcif_clock_control()
502 if (!((1 << i) & host->clkdiv_map)) in sh_mmcif_clock_control()
507 * -> parent_freq = clk x div in sh_mmcif_clock_control()
511 freq = clk_round_rate(host->clk, clk * div); in sh_mmcif_clock_control()
513 diff = (myclk > clk) ? myclk - clk : clk - myclk; in sh_mmcif_clock_control()
525 clk_set_rate(host->clk, best_freq); in sh_mmcif_clock_control()
530 clkdiv = (fls(DIV_ROUND_UP(current_clk, clk) - 1) - 1) << 16; in sh_mmcif_clock_control()
541 tmp = 0x010f0000 & sh_mmcif_readl(host->addr, MMCIF_CE_CLK_CTRL); in sh_mmcif_sync_reset()
543 sh_mmcif_writel(host->addr, MMCIF_CE_VERSION, SOFT_RST_ON); in sh_mmcif_sync_reset()
544 sh_mmcif_writel(host->addr, MMCIF_CE_VERSION, SOFT_RST_OFF); in sh_mmcif_sync_reset()
545 if (host->ccs_enable) in sh_mmcif_sync_reset()
547 if (host->clk_ctrl2_enable) in sh_mmcif_sync_reset()
548 sh_mmcif_writel(host->addr, MMCIF_CE_CLK_CTRL2, 0x0F0F0000); in sh_mmcif_sync_reset()
561 host->sd_error = false; in sh_mmcif_error_manage()
563 state1 = sh_mmcif_readl(host->addr, MMCIF_CE_HOST_STS1); in sh_mmcif_error_manage()
564 state2 = sh_mmcif_readl(host->addr, MMCIF_CE_HOST_STS2); in sh_mmcif_error_manage()
571 for (timeout = 10000; timeout; timeout--) { in sh_mmcif_error_manage()
572 if (!(sh_mmcif_readl(host->addr, MMCIF_CE_HOST_STS1) in sh_mmcif_error_manage()
580 return -EIO; in sh_mmcif_error_manage()
584 return -EIO; in sh_mmcif_error_manage()
589 host->state, host->wait_for); in sh_mmcif_error_manage()
590 ret = -EIO; in sh_mmcif_error_manage()
593 host->state, host->wait_for); in sh_mmcif_error_manage()
594 ret = -ETIMEDOUT; in sh_mmcif_error_manage()
597 host->state, host->wait_for); in sh_mmcif_error_manage()
598 ret = -EIO; in sh_mmcif_error_manage()
605 struct mmc_data *data = host->mrq->data; in sh_mmcif_next_block()
607 host->sg_blkidx += host->blocksize; in sh_mmcif_next_block()
609 /* data->sg->length must be a multiple of host->blocksize? */ in sh_mmcif_next_block()
610 BUG_ON(host->sg_blkidx > data->sg->length); in sh_mmcif_next_block()
612 if (host->sg_blkidx == data->sg->length) { in sh_mmcif_next_block()
613 host->sg_blkidx = 0; in sh_mmcif_next_block()
614 if (++host->sg_idx < data->sg_len) in sh_mmcif_next_block()
615 host->pio_ptr = sg_virt(++data->sg); in sh_mmcif_next_block()
617 host->pio_ptr = p; in sh_mmcif_next_block()
620 return host->sg_idx != data->sg_len; in sh_mmcif_next_block()
626 host->blocksize = (sh_mmcif_readl(host->addr, MMCIF_CE_BLOCK_SET) & in sh_mmcif_single_read()
629 host->wait_for = MMCIF_WAIT_FOR_READ; in sh_mmcif_single_read()
638 struct mmc_data *data = host->mrq->data; in sh_mmcif_read_block()
639 u32 *p = sg_virt(data->sg); in sh_mmcif_read_block()
642 if (host->sd_error) { in sh_mmcif_read_block()
643 data->error = sh_mmcif_error_manage(host); in sh_mmcif_read_block()
644 dev_dbg(dev, "%s(): %d\n", __func__, data->error); in sh_mmcif_read_block()
648 for (i = 0; i < host->blocksize / 4; i++) in sh_mmcif_read_block()
649 *p++ = sh_mmcif_readl(host->addr, MMCIF_CE_DATA); in sh_mmcif_read_block()
653 host->wait_for = MMCIF_WAIT_FOR_READ_END; in sh_mmcif_read_block()
661 struct mmc_data *data = mrq->data; in sh_mmcif_multi_read()
663 if (!data->sg_len || !data->sg->length) in sh_mmcif_multi_read()
666 host->blocksize = sh_mmcif_readl(host->addr, MMCIF_CE_BLOCK_SET) & in sh_mmcif_multi_read()
669 host->wait_for = MMCIF_WAIT_FOR_MREAD; in sh_mmcif_multi_read()
670 host->sg_idx = 0; in sh_mmcif_multi_read()
671 host->sg_blkidx = 0; in sh_mmcif_multi_read()
672 host->pio_ptr = sg_virt(data->sg); in sh_mmcif_multi_read()
680 struct mmc_data *data = host->mrq->data; in sh_mmcif_mread_block()
681 u32 *p = host->pio_ptr; in sh_mmcif_mread_block()
684 if (host->sd_error) { in sh_mmcif_mread_block()
685 data->error = sh_mmcif_error_manage(host); in sh_mmcif_mread_block()
686 dev_dbg(dev, "%s(): %d\n", __func__, data->error); in sh_mmcif_mread_block()
690 BUG_ON(!data->sg->length); in sh_mmcif_mread_block()
692 for (i = 0; i < host->blocksize / 4; i++) in sh_mmcif_mread_block()
693 *p++ = sh_mmcif_readl(host->addr, MMCIF_CE_DATA); in sh_mmcif_mread_block()
706 host->blocksize = (sh_mmcif_readl(host->addr, MMCIF_CE_BLOCK_SET) & in sh_mmcif_single_write()
709 host->wait_for = MMCIF_WAIT_FOR_WRITE; in sh_mmcif_single_write()
718 struct mmc_data *data = host->mrq->data; in sh_mmcif_write_block()
719 u32 *p = sg_virt(data->sg); in sh_mmcif_write_block()
722 if (host->sd_error) { in sh_mmcif_write_block()
723 data->error = sh_mmcif_error_manage(host); in sh_mmcif_write_block()
724 dev_dbg(dev, "%s(): %d\n", __func__, data->error); in sh_mmcif_write_block()
728 for (i = 0; i < host->blocksize / 4; i++) in sh_mmcif_write_block()
729 sh_mmcif_writel(host->addr, MMCIF_CE_DATA, *p++); in sh_mmcif_write_block()
733 host->wait_for = MMCIF_WAIT_FOR_WRITE_END; in sh_mmcif_write_block()
741 struct mmc_data *data = mrq->data; in sh_mmcif_multi_write()
743 if (!data->sg_len || !data->sg->length) in sh_mmcif_multi_write()
746 host->blocksize = sh_mmcif_readl(host->addr, MMCIF_CE_BLOCK_SET) & in sh_mmcif_multi_write()
749 host->wait_for = MMCIF_WAIT_FOR_MWRITE; in sh_mmcif_multi_write()
750 host->sg_idx = 0; in sh_mmcif_multi_write()
751 host->sg_blkidx = 0; in sh_mmcif_multi_write()
752 host->pio_ptr = sg_virt(data->sg); in sh_mmcif_multi_write()
760 struct mmc_data *data = host->mrq->data; in sh_mmcif_mwrite_block()
761 u32 *p = host->pio_ptr; in sh_mmcif_mwrite_block()
764 if (host->sd_error) { in sh_mmcif_mwrite_block()
765 data->error = sh_mmcif_error_manage(host); in sh_mmcif_mwrite_block()
766 dev_dbg(dev, "%s(): %d\n", __func__, data->error); in sh_mmcif_mwrite_block()
770 BUG_ON(!data->sg->length); in sh_mmcif_mwrite_block()
772 for (i = 0; i < host->blocksize / 4; i++) in sh_mmcif_mwrite_block()
773 sh_mmcif_writel(host->addr, MMCIF_CE_DATA, *p++); in sh_mmcif_mwrite_block()
786 if (cmd->flags & MMC_RSP_136) { in sh_mmcif_get_response()
787 cmd->resp[0] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP3); in sh_mmcif_get_response()
788 cmd->resp[1] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP2); in sh_mmcif_get_response()
789 cmd->resp[2] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP1); in sh_mmcif_get_response()
790 cmd->resp[3] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP0); in sh_mmcif_get_response()
792 cmd->resp[0] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP0); in sh_mmcif_get_response()
798 cmd->resp[0] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP_CMD12); in sh_mmcif_get_cmd12response()
805 struct mmc_data *data = mrq->data; in sh_mmcif_set_cmd()
806 struct mmc_command *cmd = mrq->cmd; in sh_mmcif_set_cmd()
807 u32 opc = cmd->opcode; in sh_mmcif_set_cmd()
833 switch (host->bus_width) { in sh_mmcif_set_cmd()
847 switch (host->timing) { in sh_mmcif_set_cmd()
852 * capability. MMCIF implementations with this in sh_mmcif_set_cmd()
867 data->blocks << 16); in sh_mmcif_set_cmd()
905 return -EINVAL; in sh_mmcif_data_trans()
912 struct mmc_command *cmd = mrq->cmd; in sh_mmcif_start_cmd()
917 if (cmd->flags & MMC_RSP_BUSY) in sh_mmcif_start_cmd()
922 if (host->ccs_enable) in sh_mmcif_start_cmd()
925 if (mrq->data) { in sh_mmcif_start_cmd()
926 sh_mmcif_writel(host->addr, MMCIF_CE_BLOCK_SET, 0); in sh_mmcif_start_cmd()
927 sh_mmcif_writel(host->addr, MMCIF_CE_BLOCK_SET, in sh_mmcif_start_cmd()
928 mrq->data->blksz); in sh_mmcif_start_cmd()
932 if (host->ccs_enable) in sh_mmcif_start_cmd()
933 sh_mmcif_writel(host->addr, MMCIF_CE_INT, 0xD80430C0); in sh_mmcif_start_cmd()
935 sh_mmcif_writel(host->addr, MMCIF_CE_INT, 0xD80430C0 | INT_CCS); in sh_mmcif_start_cmd()
936 sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, mask); in sh_mmcif_start_cmd()
938 sh_mmcif_writel(host->addr, MMCIF_CE_ARG, cmd->arg); in sh_mmcif_start_cmd()
940 spin_lock_irqsave(&host->lock, flags); in sh_mmcif_start_cmd()
941 sh_mmcif_writel(host->addr, MMCIF_CE_CMD_SET, opc); in sh_mmcif_start_cmd()
943 host->wait_for = MMCIF_WAIT_FOR_CMD; in sh_mmcif_start_cmd()
944 schedule_delayed_work(&host->timeout_work, host->timeout); in sh_mmcif_start_cmd()
945 spin_unlock_irqrestore(&host->lock, flags); in sh_mmcif_start_cmd()
953 switch (mrq->cmd->opcode) { in sh_mmcif_stop_cmd()
962 mrq->stop->error = sh_mmcif_error_manage(host); in sh_mmcif_stop_cmd()
966 host->wait_for = MMCIF_WAIT_FOR_STOP; in sh_mmcif_stop_cmd()
975 spin_lock_irqsave(&host->lock, flags); in sh_mmcif_request()
976 if (host->state != STATE_IDLE) { in sh_mmcif_request()
978 __func__, host->state); in sh_mmcif_request()
979 spin_unlock_irqrestore(&host->lock, flags); in sh_mmcif_request()
980 mrq->cmd->error = -EAGAIN; in sh_mmcif_request()
985 host->state = STATE_REQUEST; in sh_mmcif_request()
986 spin_unlock_irqrestore(&host->lock, flags); in sh_mmcif_request()
988 host->mrq = mrq; in sh_mmcif_request()
997 if (host->mmc->f_max) { in sh_mmcif_clk_setup()
1000 f_max = host->mmc->f_max; in sh_mmcif_clk_setup()
1002 f_min = clk_round_rate(host->clk, f_min_old / 2); in sh_mmcif_clk_setup()
1009 * This driver assumes this SoC is R-Car Gen2 or later in sh_mmcif_clk_setup()
1011 host->clkdiv_map = 0x3ff; in sh_mmcif_clk_setup()
1013 host->mmc->f_max = f_max >> ffs(host->clkdiv_map); in sh_mmcif_clk_setup()
1014 host->mmc->f_min = f_min >> fls(host->clkdiv_map); in sh_mmcif_clk_setup()
1016 unsigned int clk = clk_get_rate(host->clk); in sh_mmcif_clk_setup()
1018 host->mmc->f_max = clk / 2; in sh_mmcif_clk_setup()
1019 host->mmc->f_min = clk / 512; in sh_mmcif_clk_setup()
1023 host->mmc->f_max, host->mmc->f_min); in sh_mmcif_clk_setup()
1032 spin_lock_irqsave(&host->lock, flags); in sh_mmcif_set_ios()
1033 if (host->state != STATE_IDLE) { in sh_mmcif_set_ios()
1035 __func__, host->state); in sh_mmcif_set_ios()
1036 spin_unlock_irqrestore(&host->lock, flags); in sh_mmcif_set_ios()
1040 host->state = STATE_IOS; in sh_mmcif_set_ios()
1041 spin_unlock_irqrestore(&host->lock, flags); in sh_mmcif_set_ios()
1043 switch (ios->power_mode) { in sh_mmcif_set_ios()
1045 if (!IS_ERR(mmc->supply.vmmc)) in sh_mmcif_set_ios()
1046 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); in sh_mmcif_set_ios()
1047 if (!host->power) { in sh_mmcif_set_ios()
1048 clk_prepare_enable(host->clk); in sh_mmcif_set_ios()
1052 host->power = true; in sh_mmcif_set_ios()
1056 if (!IS_ERR(mmc->supply.vmmc)) in sh_mmcif_set_ios()
1057 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); in sh_mmcif_set_ios()
1058 if (host->power) { in sh_mmcif_set_ios()
1062 clk_disable_unprepare(host->clk); in sh_mmcif_set_ios()
1063 host->power = false; in sh_mmcif_set_ios()
1067 sh_mmcif_clock_control(host, ios->clock); in sh_mmcif_set_ios()
1071 host->timing = ios->timing; in sh_mmcif_set_ios()
1072 host->bus_width = ios->bus_width; in sh_mmcif_set_ios()
1073 host->state = STATE_IDLE; in sh_mmcif_set_ios()
1084 struct mmc_command *cmd = host->mrq->cmd; in sh_mmcif_end_cmd()
1085 struct mmc_data *data = host->mrq->data; in sh_mmcif_end_cmd()
1089 if (host->sd_error) { in sh_mmcif_end_cmd()
1090 switch (cmd->opcode) { in sh_mmcif_end_cmd()
1094 cmd->error = -ETIMEDOUT; in sh_mmcif_end_cmd()
1097 cmd->error = sh_mmcif_error_manage(host); in sh_mmcif_end_cmd()
1101 cmd->opcode, cmd->error); in sh_mmcif_end_cmd()
1102 host->sd_error = false; in sh_mmcif_end_cmd()
1105 if (!(cmd->flags & MMC_RSP_PRESENT)) { in sh_mmcif_end_cmd()
1106 cmd->error = 0; in sh_mmcif_end_cmd()
1119 init_completion(&host->dma_complete); in sh_mmcif_end_cmd()
1121 if (data->flags & MMC_DATA_READ) { in sh_mmcif_end_cmd()
1122 if (host->chan_rx) in sh_mmcif_end_cmd()
1125 if (host->chan_tx) in sh_mmcif_end_cmd()
1129 if (!host->dma_active) { in sh_mmcif_end_cmd()
1130 data->error = sh_mmcif_data_trans(host, host->mrq, cmd->opcode); in sh_mmcif_end_cmd()
1131 return !data->error; in sh_mmcif_end_cmd()
1135 time = wait_for_completion_interruptible_timeout(&host->dma_complete, in sh_mmcif_end_cmd()
1136 host->timeout); in sh_mmcif_end_cmd()
1138 if (data->flags & MMC_DATA_READ) in sh_mmcif_end_cmd()
1139 dma_unmap_sg(host->chan_rx->device->dev, in sh_mmcif_end_cmd()
1140 data->sg, data->sg_len, in sh_mmcif_end_cmd()
1143 dma_unmap_sg(host->chan_tx->device->dev, in sh_mmcif_end_cmd()
1144 data->sg, data->sg_len, in sh_mmcif_end_cmd()
1147 if (host->sd_error) { in sh_mmcif_end_cmd()
1148 dev_err(host->mmc->parent, in sh_mmcif_end_cmd()
1151 data->error = sh_mmcif_error_manage(host); in sh_mmcif_end_cmd()
1153 dev_err(host->mmc->parent, "DMA timeout!\n"); in sh_mmcif_end_cmd()
1154 data->error = -ETIMEDOUT; in sh_mmcif_end_cmd()
1156 dev_err(host->mmc->parent, in sh_mmcif_end_cmd()
1158 data->error = time; in sh_mmcif_end_cmd()
1162 host->dma_active = false; in sh_mmcif_end_cmd()
1164 if (data->error) { in sh_mmcif_end_cmd()
1165 data->bytes_xfered = 0; in sh_mmcif_end_cmd()
1167 if (data->flags & MMC_DATA_READ) in sh_mmcif_end_cmd()
1168 dmaengine_terminate_sync(host->chan_rx); in sh_mmcif_end_cmd()
1170 dmaengine_terminate_sync(host->chan_tx); in sh_mmcif_end_cmd()
1185 spin_lock_irqsave(&host->lock, flags); in sh_mmcif_irqt()
1186 wait_work = host->wait_for; in sh_mmcif_irqt()
1187 spin_unlock_irqrestore(&host->lock, flags); in sh_mmcif_irqt()
1189 cancel_delayed_work_sync(&host->timeout_work); in sh_mmcif_irqt()
1191 mutex_lock(&host->thread_lock); in sh_mmcif_irqt()
1193 mrq = host->mrq; in sh_mmcif_irqt()
1196 host->state, host->wait_for); in sh_mmcif_irqt()
1197 mutex_unlock(&host->thread_lock); in sh_mmcif_irqt()
1203 * request has to be completed - successfully or not in sh_mmcif_irqt()
1208 mutex_unlock(&host->thread_lock); in sh_mmcif_irqt()
1231 if (host->sd_error) { in sh_mmcif_irqt()
1232 mrq->stop->error = sh_mmcif_error_manage(host); in sh_mmcif_irqt()
1233 dev_dbg(dev, "%s(): %d\n", __func__, mrq->stop->error); in sh_mmcif_irqt()
1236 sh_mmcif_get_cmd12response(host, mrq->stop); in sh_mmcif_irqt()
1237 mrq->stop->error = 0; in sh_mmcif_irqt()
1241 if (host->sd_error) { in sh_mmcif_irqt()
1242 mrq->data->error = sh_mmcif_error_manage(host); in sh_mmcif_irqt()
1243 dev_dbg(dev, "%s(): %d\n", __func__, mrq->data->error); in sh_mmcif_irqt()
1251 schedule_delayed_work(&host->timeout_work, host->timeout); in sh_mmcif_irqt()
1253 mutex_unlock(&host->thread_lock); in sh_mmcif_irqt()
1257 if (host->wait_for != MMCIF_WAIT_FOR_STOP) { in sh_mmcif_irqt()
1258 struct mmc_data *data = mrq->data; in sh_mmcif_irqt()
1259 if (!mrq->cmd->error && data && !data->error) in sh_mmcif_irqt()
1260 data->bytes_xfered = in sh_mmcif_irqt()
1261 data->blocks * data->blksz; in sh_mmcif_irqt()
1263 if (mrq->stop && !mrq->cmd->error && (!data || !data->error)) { in sh_mmcif_irqt()
1265 if (!mrq->stop->error) { in sh_mmcif_irqt()
1266 schedule_delayed_work(&host->timeout_work, host->timeout); in sh_mmcif_irqt()
1267 mutex_unlock(&host->thread_lock); in sh_mmcif_irqt()
1273 host->wait_for = MMCIF_WAIT_FOR_REQUEST; in sh_mmcif_irqt()
1274 host->state = STATE_IDLE; in sh_mmcif_irqt()
1275 host->mrq = NULL; in sh_mmcif_irqt()
1276 mmc_request_done(host->mmc, mrq); in sh_mmcif_irqt()
1278 mutex_unlock(&host->thread_lock); in sh_mmcif_irqt()
1289 state = sh_mmcif_readl(host->addr, MMCIF_CE_INT); in sh_mmcif_intr()
1290 mask = sh_mmcif_readl(host->addr, MMCIF_CE_INT_MASK); in sh_mmcif_intr()
1291 if (host->ccs_enable) in sh_mmcif_intr()
1292 sh_mmcif_writel(host->addr, MMCIF_CE_INT, ~(state & mask)); in sh_mmcif_intr()
1294 sh_mmcif_writel(host->addr, MMCIF_CE_INT, INT_CCS | ~(state & mask)); in sh_mmcif_intr()
1302 host->sd_error = true; in sh_mmcif_intr()
1306 if (!host->mrq) in sh_mmcif_intr()
1308 if (!host->dma_active) in sh_mmcif_intr()
1310 else if (host->sd_error) in sh_mmcif_intr()
1323 struct mmc_request *mrq = host->mrq; in sh_mmcif_timeout_work()
1327 if (host->dying) in sh_mmcif_timeout_work()
1331 spin_lock_irqsave(&host->lock, flags); in sh_mmcif_timeout_work()
1332 if (host->state == STATE_IDLE) { in sh_mmcif_timeout_work()
1333 spin_unlock_irqrestore(&host->lock, flags); in sh_mmcif_timeout_work()
1338 host->wait_for, mrq->cmd->opcode); in sh_mmcif_timeout_work()
1340 host->state = STATE_TIMEOUT; in sh_mmcif_timeout_work()
1341 spin_unlock_irqrestore(&host->lock, flags); in sh_mmcif_timeout_work()
1347 switch (host->wait_for) { in sh_mmcif_timeout_work()
1349 mrq->cmd->error = sh_mmcif_error_manage(host); in sh_mmcif_timeout_work()
1352 mrq->stop->error = sh_mmcif_error_manage(host); in sh_mmcif_timeout_work()
1360 mrq->data->error = sh_mmcif_error_manage(host); in sh_mmcif_timeout_work()
1366 host->state = STATE_IDLE; in sh_mmcif_timeout_work()
1367 host->wait_for = MMCIF_WAIT_FOR_REQUEST; in sh_mmcif_timeout_work()
1368 host->mrq = NULL; in sh_mmcif_timeout_work()
1369 mmc_request_done(host->mmc, mrq); in sh_mmcif_timeout_work()
1375 struct sh_mmcif_plat_data *pd = dev->platform_data; in sh_mmcif_init_ocr()
1376 struct mmc_host *mmc = host->mmc; in sh_mmcif_init_ocr()
1383 if (!mmc->ocr_avail) in sh_mmcif_init_ocr()
1384 mmc->ocr_avail = pd->ocr; in sh_mmcif_init_ocr()
1385 else if (pd->ocr) in sh_mmcif_init_ocr()
1394 struct device *dev = &pdev->dev; in sh_mmcif_probe()
1395 struct sh_mmcif_plat_data *pd = dev->platform_data; in sh_mmcif_probe()
1410 return -ENOMEM; in sh_mmcif_probe()
1417 host->mmc = mmc; in sh_mmcif_probe()
1418 host->addr = reg; in sh_mmcif_probe()
1419 host->timeout = msecs_to_jiffies(10000); in sh_mmcif_probe()
1420 host->ccs_enable = true; in sh_mmcif_probe()
1421 host->clk_ctrl2_enable = false; in sh_mmcif_probe()
1423 host->pd = pdev; in sh_mmcif_probe()
1425 spin_lock_init(&host->lock); in sh_mmcif_probe()
1427 mmc->ops = &sh_mmcif_ops; in sh_mmcif_probe()
1430 mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_WAIT_WHILE_BUSY; in sh_mmcif_probe()
1431 mmc->caps2 |= MMC_CAP2_NO_SD | MMC_CAP2_NO_SDIO; in sh_mmcif_probe()
1432 mmc->max_busy_timeout = 10000; in sh_mmcif_probe()
1434 if (pd && pd->caps) in sh_mmcif_probe()
1435 mmc->caps |= pd->caps; in sh_mmcif_probe()
1436 mmc->max_segs = 32; in sh_mmcif_probe()
1437 mmc->max_blk_size = 512; in sh_mmcif_probe()
1438 mmc->max_req_size = PAGE_SIZE * mmc->max_segs; in sh_mmcif_probe()
1439 mmc->max_blk_count = mmc->max_req_size / mmc->max_blk_size; in sh_mmcif_probe()
1440 mmc->max_seg_size = mmc->max_req_size; in sh_mmcif_probe()
1444 host->clk = devm_clk_get(dev, NULL); in sh_mmcif_probe()
1445 if (IS_ERR(host->clk)) { in sh_mmcif_probe()
1446 ret = PTR_ERR(host->clk); in sh_mmcif_probe()
1451 ret = clk_prepare_enable(host->clk); in sh_mmcif_probe()
1458 host->power = false; in sh_mmcif_probe()
1464 INIT_DELAYED_WORK(&host->timeout_work, sh_mmcif_timeout_work); in sh_mmcif_probe()
1467 sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL); in sh_mmcif_probe()
1486 mutex_init(&host->thread_lock); in sh_mmcif_probe()
1495 sh_mmcif_readl(host->addr, MMCIF_CE_VERSION) & 0xffff, in sh_mmcif_probe()
1496 clk_get_rate(host->clk) / 1000000UL); in sh_mmcif_probe()
1499 clk_disable_unprepare(host->clk); in sh_mmcif_probe()
1503 clk_disable_unprepare(host->clk); in sh_mmcif_probe()
1515 host->dying = true; in sh_mmcif_remove()
1516 clk_prepare_enable(host->clk); in sh_mmcif_remove()
1517 pm_runtime_get_sync(&pdev->dev); in sh_mmcif_remove()
1519 dev_pm_qos_hide_latency_limit(&pdev->dev); in sh_mmcif_remove()
1521 mmc_remove_host(host->mmc); in sh_mmcif_remove()
1522 sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL); in sh_mmcif_remove()
1527 * (a query on the linux-mmc mailing list didn't bring any replies). in sh_mmcif_remove()
1529 cancel_delayed_work_sync(&host->timeout_work); in sh_mmcif_remove()
1531 clk_disable_unprepare(host->clk); in sh_mmcif_remove()
1532 mmc_free_host(host->mmc); in sh_mmcif_remove()
1533 pm_runtime_put_sync(&pdev->dev); in sh_mmcif_remove()
1534 pm_runtime_disable(&pdev->dev); in sh_mmcif_remove()
1543 sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL); in sh_mmcif_suspend()
1572 MODULE_DESCRIPTION("SuperH on-chip MMC/eMMC interface driver");