Lines Matching +full:sdhci +full:- +full:caps
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
5 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
9 * - JMicron (hardware and technical support)
19 #include <linux/dma-mapping.h>
33 #include <linux/mmc/slot-gpio.h>
35 #include "sdhci.h"
37 #define DRIVER_NAME "sdhci"
40 pr_debug("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
43 pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
56 SDHCI_DUMP("============ SDHCI REGISTER DUMP ===========\n"); in sdhci_dumpregs()
73 SDHCI_DUMP("Wake-up: 0x%08x | Clock: 0x%08x\n", in sdhci_dumpregs()
85 SDHCI_DUMP("Caps: 0x%08x | Caps_1: 0x%08x\n", in sdhci_dumpregs()
100 if (host->flags & SDHCI_USE_ADMA) { in sdhci_dumpregs()
101 if (host->flags & SDHCI_USE_64_BIT_DMA) { in sdhci_dumpregs()
113 if (host->ops->dump_vendor_regs) in sdhci_dumpregs()
114 host->ops->dump_vendor_regs(host); in sdhci_dumpregs()
144 host->v4_mode = true; in sdhci_enable_v4_mode()
151 return cmd->data || cmd->flags & MMC_RSP_BUSY; in sdhci_data_line_cmd()
158 if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) || in sdhci_set_card_detection()
159 !mmc_card_is_removable(host->mmc) || mmc_can_gpio_cd(host->mmc)) in sdhci_set_card_detection()
166 host->ier |= present ? SDHCI_INT_CARD_REMOVE : in sdhci_set_card_detection()
169 host->ier &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); in sdhci_set_card_detection()
172 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_card_detection()
173 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_card_detection()
188 if (host->bus_on) in sdhci_runtime_pm_bus_on()
190 host->bus_on = true; in sdhci_runtime_pm_bus_on()
191 pm_runtime_get_noresume(mmc_dev(host->mmc)); in sdhci_runtime_pm_bus_on()
196 if (!host->bus_on) in sdhci_runtime_pm_bus_off()
198 host->bus_on = false; in sdhci_runtime_pm_bus_off()
199 pm_runtime_put_noidle(mmc_dev(host->mmc)); in sdhci_runtime_pm_bus_off()
209 host->clock = 0; in sdhci_reset()
210 /* Reset-all turns off SD Bus Power */ in sdhci_reset()
211 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) in sdhci_reset()
226 mmc_hostname(host->mmc), (int)mask); in sdhci_reset()
238 if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) { in sdhci_do_reset()
239 struct mmc_host *mmc = host->mmc; in sdhci_do_reset()
241 if (!mmc->ops->get_cd(mmc)) in sdhci_do_reset()
245 host->ops->reset(host, mask); in sdhci_do_reset()
253 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_reset_for_all()
254 if (host->ops->enable_dma) in sdhci_reset_for_all()
255 host->ops->enable_dma(host); in sdhci_reset_for_all()
258 host->preset_enabled = false; in sdhci_reset_for_all()
273 if (host->quirks2 & SDHCI_QUIRK2_ISSUE_CMD_DAT_RESET_TOGETHER) { in sdhci_reset_for_reason()
299 host->ier = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | in sdhci_set_default_irqs()
305 if (host->tuning_mode == SDHCI_TUNING_MODE_2 || in sdhci_set_default_irqs()
306 host->tuning_mode == SDHCI_TUNING_MODE_3) in sdhci_set_default_irqs()
307 host->ier |= SDHCI_INT_RETUNE; in sdhci_set_default_irqs()
309 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_default_irqs()
310 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_default_irqs()
318 if (host->version < SDHCI_SPEC_200) in sdhci_config_dma()
329 if (!(host->flags & SDHCI_REQ_USE_DMA)) in sdhci_config_dma()
333 if (host->flags & SDHCI_USE_ADMA) in sdhci_config_dma()
336 if (host->flags & SDHCI_USE_64_BIT_DMA) { in sdhci_config_dma()
338 * If v4 mode, all supported DMA can be 64-bit addressing if in sdhci_config_dma()
339 * controller supports 64-bit system address, otherwise only in sdhci_config_dma()
340 * ADMA can support 64-bit addressing. in sdhci_config_dma()
342 if (host->v4_mode) { in sdhci_config_dma()
346 } else if (host->flags & SDHCI_USE_ADMA) { in sdhci_config_dma()
361 struct mmc_host *mmc = host->mmc; in sdhci_init()
369 if (host->v4_mode) in sdhci_init()
372 spin_lock_irqsave(&host->lock, flags); in sdhci_init()
374 spin_unlock_irqrestore(&host->lock, flags); in sdhci_init()
376 host->cqe_on = false; in sdhci_init()
380 host->clock = 0; in sdhci_init()
381 host->reinit_uhs = true; in sdhci_init()
382 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_init()
388 u32 cd = host->ier & (SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); in sdhci_reinit()
399 if (cd != (host->ier & (SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT))) in sdhci_reinit()
400 mmc_detect_change(host->mmc, msecs_to_jiffies(200)); in sdhci_reinit()
407 if (host->quirks & SDHCI_QUIRK_NO_LED) in __sdhci_led_activate()
419 if (host->quirks & SDHCI_QUIRK_NO_LED) in __sdhci_led_deactivate()
434 spin_lock_irqsave(&host->lock, flags); in sdhci_led_control()
436 if (host->runtime_suspended) in sdhci_led_control()
444 spin_unlock_irqrestore(&host->lock, flags); in sdhci_led_control()
449 struct mmc_host *mmc = host->mmc; in sdhci_led_register()
451 if (host->quirks & SDHCI_QUIRK_NO_LED) in sdhci_led_register()
454 snprintf(host->led_name, sizeof(host->led_name), in sdhci_led_register()
457 host->led.name = host->led_name; in sdhci_led_register()
458 host->led.brightness = LED_OFF; in sdhci_led_register()
459 host->led.default_trigger = mmc_hostname(mmc); in sdhci_led_register()
460 host->led.brightness_set = sdhci_led_control; in sdhci_led_register()
462 return led_classdev_register(mmc_dev(mmc), &host->led); in sdhci_led_register()
467 if (host->quirks & SDHCI_QUIRK_NO_LED) in sdhci_led_unregister()
470 led_classdev_unregister(&host->led); in sdhci_led_unregister()
507 if (sdhci_data_line_cmd(mrq->cmd)) in sdhci_mod_timer()
508 mod_timer(&host->data_timer, timeout); in sdhci_mod_timer()
510 mod_timer(&host->timer, timeout); in sdhci_mod_timer()
515 if (sdhci_data_line_cmd(mrq->cmd)) in sdhci_del_timer()
516 del_timer(&host->data_timer); in sdhci_del_timer()
518 del_timer(&host->timer); in sdhci_del_timer()
523 return host->cmd || host->data_cmd; in sdhci_has_requests()
540 blksize = host->data->blksz; in sdhci_read_block_pio()
544 BUG_ON(!sg_miter_next(&host->sg_miter)); in sdhci_read_block_pio()
546 len = min(host->sg_miter.length, blksize); in sdhci_read_block_pio()
548 blksize -= len; in sdhci_read_block_pio()
549 host->sg_miter.consumed = len; in sdhci_read_block_pio()
551 buf = host->sg_miter.addr; in sdhci_read_block_pio()
563 chunk--; in sdhci_read_block_pio()
564 len--; in sdhci_read_block_pio()
568 sg_miter_stop(&host->sg_miter); in sdhci_read_block_pio()
579 blksize = host->data->blksz; in sdhci_write_block_pio()
584 BUG_ON(!sg_miter_next(&host->sg_miter)); in sdhci_write_block_pio()
586 len = min(host->sg_miter.length, blksize); in sdhci_write_block_pio()
588 blksize -= len; in sdhci_write_block_pio()
589 host->sg_miter.consumed = len; in sdhci_write_block_pio()
591 buf = host->sg_miter.addr; in sdhci_write_block_pio()
598 len--; in sdhci_write_block_pio()
608 sg_miter_stop(&host->sg_miter); in sdhci_write_block_pio()
615 if (host->blocks == 0) in sdhci_transfer_pio()
618 if (host->data->flags & MMC_DATA_READ) in sdhci_transfer_pio()
628 if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) && in sdhci_transfer_pio()
629 (host->data->blocks == 1)) in sdhci_transfer_pio()
633 if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY) in sdhci_transfer_pio()
636 if (host->data->flags & MMC_DATA_READ) in sdhci_transfer_pio()
641 host->blocks--; in sdhci_transfer_pio()
642 if (host->blocks == 0) in sdhci_transfer_pio()
658 if (data->host_cookie == COOKIE_PRE_MAPPED) in sdhci_pre_dma_transfer()
659 return data->sg_count; in sdhci_pre_dma_transfer()
662 if (host->bounce_buffer) { in sdhci_pre_dma_transfer()
663 unsigned int length = data->blksz * data->blocks; in sdhci_pre_dma_transfer()
665 if (length > host->bounce_buffer_size) { in sdhci_pre_dma_transfer()
667 mmc_hostname(host->mmc), length, in sdhci_pre_dma_transfer()
668 host->bounce_buffer_size); in sdhci_pre_dma_transfer()
669 return -EIO; in sdhci_pre_dma_transfer()
673 if (host->ops->copy_to_bounce_buffer) { in sdhci_pre_dma_transfer()
674 host->ops->copy_to_bounce_buffer(host, in sdhci_pre_dma_transfer()
677 sg_copy_to_buffer(data->sg, data->sg_len, in sdhci_pre_dma_transfer()
678 host->bounce_buffer, length); in sdhci_pre_dma_transfer()
682 dma_sync_single_for_device(mmc_dev(host->mmc), in sdhci_pre_dma_transfer()
683 host->bounce_addr, in sdhci_pre_dma_transfer()
684 host->bounce_buffer_size, in sdhci_pre_dma_transfer()
690 sg_count = dma_map_sg(mmc_dev(host->mmc), in sdhci_pre_dma_transfer()
691 data->sg, data->sg_len, in sdhci_pre_dma_transfer()
696 return -ENOSPC; in sdhci_pre_dma_transfer()
698 data->sg_count = sg_count; in sdhci_pre_dma_transfer()
699 data->host_cookie = cookie; in sdhci_pre_dma_transfer()
706 return kmap_local_page(sg_page(sg)) + sg->offset; in sdhci_kmap_atomic()
719 /* 32-bit and 64-bit descriptors have these members in same position */ in sdhci_adma_write_desc()
720 dma_desc->cmd = cpu_to_le16(cmd); in sdhci_adma_write_desc()
721 dma_desc->len = cpu_to_le16(len); in sdhci_adma_write_desc()
722 dma_desc->addr_lo = cpu_to_le32(lower_32_bits(addr)); in sdhci_adma_write_desc()
724 if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_adma_write_desc()
725 dma_desc->addr_hi = cpu_to_le32(upper_32_bits(addr)); in sdhci_adma_write_desc()
727 *desc += host->desc_sz; in sdhci_adma_write_desc()
735 if (host->ops->adma_write_desc) in __sdhci_adma_write_desc()
736 host->ops->adma_write_desc(host, desc, addr, len, cmd); in __sdhci_adma_write_desc()
745 /* 32-bit and 64-bit descriptors have 'cmd' in same position */ in sdhci_adma_mark_end()
746 dma_desc->cmd |= cpu_to_le16(ADMA2_END); in sdhci_adma_mark_end()
763 host->sg_count = sg_count; in sdhci_adma_table_pre()
765 desc = host->adma_table; in sdhci_adma_table_pre()
766 align = host->align_buffer; in sdhci_adma_table_pre()
768 align_addr = host->align_addr; in sdhci_adma_table_pre()
770 for_each_sg(data->sg, sg, host->sg_count, i) { in sdhci_adma_table_pre()
775 * The SDHCI specification states that ADMA addresses must in sdhci_adma_table_pre()
776 * be 32-bit aligned. If they aren't, then we use a bounce in sdhci_adma_table_pre()
780 offset = (SDHCI_ADMA2_ALIGN - (addr & SDHCI_ADMA2_MASK)) & in sdhci_adma_table_pre()
783 if (data->flags & MMC_DATA_WRITE) { in sdhci_adma_table_pre()
799 len -= offset; in sdhci_adma_table_pre()
808 while (len > host->max_adma) { in sdhci_adma_table_pre()
813 len -= n; in sdhci_adma_table_pre()
825 WARN_ON((desc - host->adma_table) >= host->adma_table_sz); in sdhci_adma_table_pre()
828 if (host->quirks & SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC) { in sdhci_adma_table_pre()
830 if (desc != host->adma_table) { in sdhci_adma_table_pre()
831 desc -= host->desc_sz; in sdhci_adma_table_pre()
835 /* Add a terminating entry - nop, end, valid */ in sdhci_adma_table_pre()
848 if (data->flags & MMC_DATA_READ) { in sdhci_adma_table_post()
852 for_each_sg(data->sg, sg, host->sg_count, i) in sdhci_adma_table_post()
859 dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg, in sdhci_adma_table_post()
860 data->sg_len, DMA_FROM_DEVICE); in sdhci_adma_table_post()
862 align = host->align_buffer; in sdhci_adma_table_post()
864 for_each_sg(data->sg, sg, host->sg_count, i) { in sdhci_adma_table_post()
866 size = SDHCI_ADMA2_ALIGN - in sdhci_adma_table_post()
883 if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_set_adma_addr()
889 if (host->bounce_buffer) in sdhci_sdma_address()
890 return host->bounce_addr; in sdhci_sdma_address()
892 return sg_dma_address(host->data->sg); in sdhci_sdma_address()
897 if (host->v4_mode) in sdhci_set_sdma_addr()
911 target_timeout = cmd->busy_timeout * 1000; in sdhci_target_timeout()
913 target_timeout = DIV_ROUND_UP(data->timeout_ns, 1000); in sdhci_target_timeout()
914 if (host->clock && data->timeout_clks) { in sdhci_target_timeout()
918 * data->timeout_clks is in units of clock cycles. in sdhci_target_timeout()
919 * host->clock is in Hz. target_timeout is in us. in sdhci_target_timeout()
922 val = 1000000ULL * data->timeout_clks; in sdhci_target_timeout()
923 if (do_div(val, host->clock)) in sdhci_target_timeout()
935 struct mmc_data *data = cmd->data; in sdhci_calc_sw_timeout()
936 struct mmc_host *mmc = host->mmc; in sdhci_calc_sw_timeout()
937 struct mmc_ios *ios = &mmc->ios; in sdhci_calc_sw_timeout()
938 unsigned char bus_width = 1 << ios->bus_width; in sdhci_calc_sw_timeout()
948 blksz = data->blksz; in sdhci_calc_sw_timeout()
949 freq = mmc->actual_clock ? : host->clock; in sdhci_calc_sw_timeout()
955 host->data_timeout = data->blocks * target_timeout + in sdhci_calc_sw_timeout()
958 host->data_timeout = target_timeout; in sdhci_calc_sw_timeout()
961 if (host->data_timeout) in sdhci_calc_sw_timeout()
962 host->data_timeout += MMC_CMD_TRANSFER_TIME; in sdhci_calc_sw_timeout()
977 * longer to time out, but that's much better than having a too-short in sdhci_calc_timeout()
980 if (host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL) in sdhci_calc_timeout()
981 return host->max_timeout_count; in sdhci_calc_timeout()
985 return host->max_timeout_count; in sdhci_calc_timeout()
987 data = cmd->data; in sdhci_calc_timeout()
989 if (!data && !cmd->busy_timeout) in sdhci_calc_timeout()
990 return host->max_timeout_count; in sdhci_calc_timeout()
1001 * (2) host->timeout_clk < 2^16 in sdhci_calc_timeout()
1006 current_timeout = (1 << 13) * 1000 / host->timeout_clk; in sdhci_calc_timeout()
1010 if (count > host->max_timeout_count) { in sdhci_calc_timeout()
1011 if (!(host->quirks2 & SDHCI_QUIRK2_DISABLE_HW_TIMEOUT)) in sdhci_calc_timeout()
1013 count, cmd->opcode); in sdhci_calc_timeout()
1014 count = host->max_timeout_count; in sdhci_calc_timeout()
1028 if (host->flags & SDHCI_REQ_USE_DMA) in sdhci_set_transfer_irqs()
1029 host->ier = (host->ier & ~pio_irqs) | dma_irqs; in sdhci_set_transfer_irqs()
1031 host->ier = (host->ier & ~dma_irqs) | pio_irqs; in sdhci_set_transfer_irqs()
1033 if (host->flags & (SDHCI_AUTO_CMD23 | SDHCI_AUTO_CMD12)) in sdhci_set_transfer_irqs()
1034 host->ier |= SDHCI_INT_AUTO_CMD_ERR; in sdhci_set_transfer_irqs()
1036 host->ier &= ~SDHCI_INT_AUTO_CMD_ERR; in sdhci_set_transfer_irqs()
1038 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_transfer_irqs()
1039 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_transfer_irqs()
1045 host->ier |= SDHCI_INT_DATA_TIMEOUT; in sdhci_set_data_timeout_irq()
1047 host->ier &= ~SDHCI_INT_DATA_TIMEOUT; in sdhci_set_data_timeout_irq()
1048 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_data_timeout_irq()
1049 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_data_timeout_irq()
1059 host->quirks2 & SDHCI_QUIRK2_DISABLE_HW_TIMEOUT) { in __sdhci_set_timeout()
1062 } else if (!(host->ier & SDHCI_INT_DATA_TIMEOUT)) { in __sdhci_set_timeout()
1072 if (host->ops->set_timeout) in sdhci_set_timeout()
1073 host->ops->set_timeout(host, cmd); in sdhci_set_timeout()
1081 WARN_ON(host->data); in sdhci_initialize_data()
1084 BUG_ON(data->blksz * data->blocks > 524288); in sdhci_initialize_data()
1085 BUG_ON(data->blksz > host->mmc->max_blk_size); in sdhci_initialize_data()
1086 BUG_ON(data->blocks > 65535); in sdhci_initialize_data()
1088 host->data = data; in sdhci_initialize_data()
1089 host->data_early = 0; in sdhci_initialize_data()
1090 host->data->bytes_xfered = 0; in sdhci_initialize_data()
1098 SDHCI_MAKE_BLKSZ(host->sdma_boundary, data->blksz), in sdhci_set_block_info()
1101 * For Version 4.10 onwards, if v4 mode is enabled, 32-bit Block Count in sdhci_set_block_info()
1102 * can be supported, in that case 16-bit block count register must be 0. in sdhci_set_block_info()
1104 if (host->version >= SDHCI_SPEC_410 && host->v4_mode && in sdhci_set_block_info()
1105 (host->quirks2 & SDHCI_QUIRK2_USE_32BIT_BLK_CNT)) { in sdhci_set_block_info()
1108 sdhci_writew(host, data->blocks, SDHCI_32BIT_BLK_CNT); in sdhci_set_block_info()
1110 sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); in sdhci_set_block_info()
1116 struct mmc_data *data = cmd->data; in sdhci_prepare_data()
1120 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_prepare_data()
1125 host->flags |= SDHCI_REQ_USE_DMA; in sdhci_prepare_data()
1136 if (host->flags & SDHCI_USE_ADMA) { in sdhci_prepare_data()
1137 if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) { in sdhci_prepare_data()
1147 if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) in sdhci_prepare_data()
1149 if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) in sdhci_prepare_data()
1154 for_each_sg(data->sg, sg, data->sg_len, i) { in sdhci_prepare_data()
1155 if (sg->length & length_mask) { in sdhci_prepare_data()
1157 sg->length); in sdhci_prepare_data()
1158 host->flags &= ~SDHCI_REQ_USE_DMA; in sdhci_prepare_data()
1161 if (sg->offset & offset_mask) { in sdhci_prepare_data()
1163 host->flags &= ~SDHCI_REQ_USE_DMA; in sdhci_prepare_data()
1172 if (host->flags & SDHCI_REQ_USE_DMA) { in sdhci_prepare_data()
1181 host->flags &= ~SDHCI_REQ_USE_DMA; in sdhci_prepare_data()
1182 } else if (host->flags & SDHCI_USE_ADMA) { in sdhci_prepare_data()
1184 sdhci_set_adma_addr(host, host->adma_addr); in sdhci_prepare_data()
1191 if (!(host->flags & SDHCI_REQ_USE_DMA)) { in sdhci_prepare_data()
1195 if (host->data->flags & MMC_DATA_READ) in sdhci_prepare_data()
1199 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in sdhci_prepare_data()
1200 host->blocks = data->blocks; in sdhci_prepare_data()
1213 struct mmc_host *mmc = host->mmc; in sdhci_external_dma_init()
1215 host->tx_chan = dma_request_chan(mmc_dev(mmc), "tx"); in sdhci_external_dma_init()
1216 if (IS_ERR(host->tx_chan)) { in sdhci_external_dma_init()
1217 ret = PTR_ERR(host->tx_chan); in sdhci_external_dma_init()
1218 if (ret != -EPROBE_DEFER) in sdhci_external_dma_init()
1220 host->tx_chan = NULL; in sdhci_external_dma_init()
1224 host->rx_chan = dma_request_chan(mmc_dev(mmc), "rx"); in sdhci_external_dma_init()
1225 if (IS_ERR(host->rx_chan)) { in sdhci_external_dma_init()
1226 if (host->tx_chan) { in sdhci_external_dma_init()
1227 dma_release_channel(host->tx_chan); in sdhci_external_dma_init()
1228 host->tx_chan = NULL; in sdhci_external_dma_init()
1231 ret = PTR_ERR(host->rx_chan); in sdhci_external_dma_init()
1232 if (ret != -EPROBE_DEFER) in sdhci_external_dma_init()
1234 host->rx_chan = NULL; in sdhci_external_dma_init()
1243 return data->flags & MMC_DATA_WRITE ? host->tx_chan : host->rx_chan; in sdhci_external_dma_channel()
1252 struct mmc_data *data = cmd->data; in sdhci_external_dma_setup()
1258 if (!host->mapbase) in sdhci_external_dma_setup()
1259 return -EINVAL; in sdhci_external_dma_setup()
1262 cfg.src_addr = host->mapbase + SDHCI_BUFFER; in sdhci_external_dma_setup()
1263 cfg.dst_addr = host->mapbase + SDHCI_BUFFER; in sdhci_external_dma_setup()
1266 cfg.src_maxburst = data->blksz / 4; in sdhci_external_dma_setup()
1267 cfg.dst_maxburst = data->blksz / 4; in sdhci_external_dma_setup()
1270 for (i = 0; i < data->sg_len; i++) { in sdhci_external_dma_setup()
1271 if ((data->sg + i)->length % data->blksz) in sdhci_external_dma_setup()
1272 return -EINVAL; in sdhci_external_dma_setup()
1283 return -EINVAL; in sdhci_external_dma_setup()
1285 dir = data->flags & MMC_DATA_WRITE ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; in sdhci_external_dma_setup()
1286 desc = dmaengine_prep_slave_sg(chan, data->sg, data->sg_len, dir, in sdhci_external_dma_setup()
1289 return -EINVAL; in sdhci_external_dma_setup()
1291 desc->callback = NULL; in sdhci_external_dma_setup()
1292 desc->callback_param = NULL; in sdhci_external_dma_setup()
1303 if (host->tx_chan) { in sdhci_external_dma_release()
1304 dma_release_channel(host->tx_chan); in sdhci_external_dma_release()
1305 host->tx_chan = NULL; in sdhci_external_dma_release()
1308 if (host->rx_chan) { in sdhci_external_dma_release()
1309 dma_release_channel(host->rx_chan); in sdhci_external_dma_release()
1310 host->rx_chan = NULL; in sdhci_external_dma_release()
1319 struct mmc_data *data = cmd->data; in __sdhci_external_dma_prepare_data()
1323 host->flags |= SDHCI_REQ_USE_DMA; in __sdhci_external_dma_prepare_data()
1336 pr_err("%s: Cannot use external DMA, switch to the DMA/PIO which standard SDHCI provides.\n", in sdhci_external_dma_prepare_data()
1337 mmc_hostname(host->mmc)); in sdhci_external_dma_prepare_data()
1347 if (!cmd->data) in sdhci_external_dma_pre_transfer()
1350 chan = sdhci_external_dma_channel(host, cmd->data); in sdhci_external_dma_pre_transfer()
1359 return -EOPNOTSUPP; in sdhci_external_dma_init()
1388 host->use_external_dma = en; in sdhci_switch_external_dma()
1395 return !mrq->sbc && (host->flags & SDHCI_AUTO_CMD12) && in sdhci_auto_cmd12()
1396 !mrq->cap_cmd_during_tfr; in sdhci_auto_cmd12()
1402 return mrq->sbc && (host->flags & SDHCI_AUTO_CMD23); in sdhci_auto_cmd23()
1408 return mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23); in sdhci_manual_cmd23()
1415 bool use_cmd12 = sdhci_auto_cmd12(host, cmd->mrq) && in sdhci_auto_cmd_select()
1416 (cmd->opcode != SD_IO_RW_EXTENDED); in sdhci_auto_cmd_select()
1417 bool use_cmd23 = sdhci_auto_cmd23(host, cmd->mrq); in sdhci_auto_cmd_select()
1424 * here because some controllers (e.g sdhci-of-dwmshc) expect it. in sdhci_auto_cmd_select()
1426 if (host->version >= SDHCI_SPEC_410 && host->v4_mode && in sdhci_auto_cmd_select()
1442 * on successful completion (so no Auto-CMD12). in sdhci_auto_cmd_select()
1454 struct mmc_data *data = cmd->data; in sdhci_set_transfer_mode()
1457 if (host->quirks2 & in sdhci_set_transfer_mode()
1460 if (!mmc_op_tuning(cmd->opcode)) in sdhci_set_transfer_mode()
1471 WARN_ON(!host->data); in sdhci_set_transfer_mode()
1473 if (!(host->quirks2 & SDHCI_QUIRK2_SUPPORT_SINGLE)) in sdhci_set_transfer_mode()
1476 if (mmc_op_multi(cmd->opcode) || data->blocks > 1) { in sdhci_set_transfer_mode()
1479 if (sdhci_auto_cmd23(host, cmd->mrq)) in sdhci_set_transfer_mode()
1480 sdhci_writel(host, cmd->mrq->sbc->arg, SDHCI_ARGUMENT2); in sdhci_set_transfer_mode()
1483 if (data->flags & MMC_DATA_READ) in sdhci_set_transfer_mode()
1485 if (host->flags & SDHCI_REQ_USE_DMA) in sdhci_set_transfer_mode()
1493 return (!(host->flags & SDHCI_DEVICE_DEAD) && in sdhci_needs_reset()
1494 ((mrq->cmd && mrq->cmd->error) || in sdhci_needs_reset()
1495 (mrq->sbc && mrq->sbc->error) || in sdhci_needs_reset()
1496 (mrq->data && mrq->data->stop && mrq->data->stop->error) || in sdhci_needs_reset()
1497 (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))); in sdhci_needs_reset()
1505 if (host->mrqs_done[i] == mrq) { in sdhci_set_mrq_done()
1512 if (!host->mrqs_done[i]) { in sdhci_set_mrq_done()
1513 host->mrqs_done[i] = mrq; in sdhci_set_mrq_done()
1523 if (host->cmd && host->cmd->mrq == mrq) in __sdhci_finish_mrq()
1524 host->cmd = NULL; in __sdhci_finish_mrq()
1526 if (host->data_cmd && host->data_cmd->mrq == mrq) in __sdhci_finish_mrq()
1527 host->data_cmd = NULL; in __sdhci_finish_mrq()
1529 if (host->deferred_cmd && host->deferred_cmd->mrq == mrq) in __sdhci_finish_mrq()
1530 host->deferred_cmd = NULL; in __sdhci_finish_mrq()
1532 if (host->data && host->data->mrq == mrq) in __sdhci_finish_mrq()
1533 host->data = NULL; in __sdhci_finish_mrq()
1536 host->pending_reset = true; in __sdhci_finish_mrq()
1550 queue_work(host->complete_wq, &host->complete_work); in sdhci_finish_mrq()
1555 struct mmc_command *data_cmd = host->data_cmd; in __sdhci_finish_data()
1556 struct mmc_data *data = host->data; in __sdhci_finish_data()
1558 host->data = NULL; in __sdhci_finish_data()
1559 host->data_cmd = NULL; in __sdhci_finish_data()
1565 if (data->error) { in __sdhci_finish_data()
1566 if (!host->cmd || host->cmd == data_cmd) in __sdhci_finish_data()
1572 if ((host->flags & (SDHCI_REQ_USE_DMA | SDHCI_USE_ADMA)) == in __sdhci_finish_data()
1583 if (data->error) in __sdhci_finish_data()
1584 data->bytes_xfered = 0; in __sdhci_finish_data()
1586 data->bytes_xfered = data->blksz * data->blocks; in __sdhci_finish_data()
1589 * Need to send CMD12 if - in __sdhci_finish_data()
1590 * a) open-ended multiblock transfer not using auto CMD12 (no CMD23) in __sdhci_finish_data()
1593 if (data->stop && in __sdhci_finish_data()
1594 ((!data->mrq->sbc && !sdhci_auto_cmd12(host, data->mrq)) || in __sdhci_finish_data()
1595 data->error)) { in __sdhci_finish_data()
1601 if (data->mrq->cap_cmd_during_tfr) { in __sdhci_finish_data()
1602 __sdhci_finish_mrq(host, data->mrq); in __sdhci_finish_data()
1605 host->cmd = NULL; in __sdhci_finish_data()
1606 if (!sdhci_send_command(host, data->stop)) { in __sdhci_finish_data()
1612 data->stop->error = -EIO; in __sdhci_finish_data()
1613 __sdhci_finish_mrq(host, data->mrq); in __sdhci_finish_data()
1615 WARN_ON(host->deferred_cmd); in __sdhci_finish_data()
1616 host->deferred_cmd = data->stop; in __sdhci_finish_data()
1621 __sdhci_finish_mrq(host, data->mrq); in __sdhci_finish_data()
1636 WARN_ON(host->cmd); in sdhci_send_command()
1639 cmd->error = 0; in sdhci_send_command()
1641 if ((host->quirks2 & SDHCI_QUIRK2_STOP_WITH_TC) && in sdhci_send_command()
1642 cmd->opcode == MMC_STOP_TRANSMISSION) in sdhci_send_command()
1643 cmd->flags |= MMC_RSP_BUSY; in sdhci_send_command()
1651 if (cmd->mrq->data && (cmd == cmd->mrq->data->stop)) in sdhci_send_command()
1657 host->cmd = cmd; in sdhci_send_command()
1658 host->data_timeout = 0; in sdhci_send_command()
1660 WARN_ON(host->data_cmd); in sdhci_send_command()
1661 host->data_cmd = cmd; in sdhci_send_command()
1665 if (cmd->data) { in sdhci_send_command()
1666 if (host->use_external_dma) in sdhci_send_command()
1672 sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); in sdhci_send_command()
1676 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { in sdhci_send_command()
1679 * This does not happen in practice because 136-bit response in sdhci_send_command()
1683 cmd->flags &= ~MMC_RSP_BUSY; in sdhci_send_command()
1686 if (!(cmd->flags & MMC_RSP_PRESENT)) in sdhci_send_command()
1688 else if (cmd->flags & MMC_RSP_136) in sdhci_send_command()
1690 else if (cmd->flags & MMC_RSP_BUSY) in sdhci_send_command()
1695 if (cmd->flags & MMC_RSP_CRC) in sdhci_send_command()
1697 if (cmd->flags & MMC_RSP_OPCODE) in sdhci_send_command()
1701 if (cmd->data || mmc_op_tuning(cmd->opcode)) in sdhci_send_command()
1705 if (host->data_timeout) in sdhci_send_command()
1706 timeout += nsecs_to_jiffies(host->data_timeout); in sdhci_send_command()
1707 else if (!cmd->data && cmd->busy_timeout > 9000) in sdhci_send_command()
1708 timeout += DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ; in sdhci_send_command()
1711 sdhci_mod_timer(host, cmd->mrq, timeout); in sdhci_send_command()
1713 if (host->use_external_dma) in sdhci_send_command()
1716 sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND); in sdhci_send_command()
1724 if (!present || host->flags & SDHCI_DEVICE_DEAD) { in sdhci_present_error()
1725 cmd->error = -ENOMEDIUM; in sdhci_present_error()
1735 __releases(host->lock) in sdhci_send_command_retry()
1736 __acquires(host->lock) in sdhci_send_command_retry()
1738 struct mmc_command *deferred_cmd = host->deferred_cmd; in sdhci_send_command_retry()
1743 if (!timeout--) { in sdhci_send_command_retry()
1745 mmc_hostname(host->mmc)); in sdhci_send_command_retry()
1748 cmd->error = -EIO; in sdhci_send_command_retry()
1752 spin_unlock_irqrestore(&host->lock, flags); in sdhci_send_command_retry()
1756 present = host->mmc->ops->get_cd(host->mmc); in sdhci_send_command_retry()
1758 spin_lock_irqsave(&host->lock, flags); in sdhci_send_command_retry()
1761 if (cmd == deferred_cmd && cmd != host->deferred_cmd) in sdhci_send_command_retry()
1768 if (cmd == host->deferred_cmd) in sdhci_send_command_retry()
1769 host->deferred_cmd = NULL; in sdhci_send_command_retry()
1779 reg = SDHCI_RESPONSE + (3 - i) * 4; in sdhci_read_rsp_136()
1780 cmd->resp[i] = sdhci_readl(host, reg); in sdhci_read_rsp_136()
1783 if (host->quirks2 & SDHCI_QUIRK2_RSP_136_HAS_CRC) in sdhci_read_rsp_136()
1788 cmd->resp[i] <<= 8; in sdhci_read_rsp_136()
1790 cmd->resp[i] |= cmd->resp[i + 1] >> 24; in sdhci_read_rsp_136()
1796 struct mmc_command *cmd = host->cmd; in sdhci_finish_command()
1798 host->cmd = NULL; in sdhci_finish_command()
1800 if (cmd->flags & MMC_RSP_PRESENT) { in sdhci_finish_command()
1801 if (cmd->flags & MMC_RSP_136) { in sdhci_finish_command()
1804 cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE); in sdhci_finish_command()
1808 if (cmd->mrq->cap_cmd_during_tfr && cmd == cmd->mrq->cmd) in sdhci_finish_command()
1809 mmc_command_done(host->mmc, cmd->mrq); in sdhci_finish_command()
1821 if (cmd->flags & MMC_RSP_BUSY) { in sdhci_finish_command()
1822 if (cmd->data) { in sdhci_finish_command()
1824 } else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ) && in sdhci_finish_command()
1825 cmd == host->data_cmd) { in sdhci_finish_command()
1832 if (cmd == cmd->mrq->sbc) { in sdhci_finish_command()
1833 if (!sdhci_send_command(host, cmd->mrq->cmd)) { in sdhci_finish_command()
1834 WARN_ON(host->deferred_cmd); in sdhci_finish_command()
1835 host->deferred_cmd = cmd->mrq->cmd; in sdhci_finish_command()
1840 if (host->data && host->data_early) in sdhci_finish_command()
1843 if (!cmd->data) in sdhci_finish_command()
1844 __sdhci_finish_mrq(host, cmd->mrq); in sdhci_finish_command()
1852 switch (host->timing) { in sdhci_get_preset_value()
1878 pr_warn("%s: Invalid UHS-I mode selected\n", in sdhci_get_preset_value()
1879 mmc_hostname(host->mmc)); in sdhci_get_preset_value()
1894 if (host->version >= SDHCI_SPEC_300) { in sdhci_calc_clk()
1895 if (host->preset_enabled) { in sdhci_calc_clk()
1901 if (host->clk_mul && in sdhci_calc_clk()
1905 clk_mul = host->clk_mul; in sdhci_calc_clk()
1916 if (host->clk_mul) { in sdhci_calc_clk()
1918 if ((host->max_clk * host->clk_mul / div) in sdhci_calc_clk()
1922 if ((host->max_clk * host->clk_mul / div) <= clock) { in sdhci_calc_clk()
1929 clk_mul = host->clk_mul; in sdhci_calc_clk()
1930 div--; in sdhci_calc_clk()
1940 if (!host->clk_mul || switch_base_clk) { in sdhci_calc_clk()
1942 if (host->max_clk <= clock) in sdhci_calc_clk()
1947 if ((host->max_clk / div) <= clock) in sdhci_calc_clk()
1953 if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN) in sdhci_calc_clk()
1954 && !div && host->max_clk <= 25000000) in sdhci_calc_clk()
1960 if ((host->max_clk / div) <= clock) in sdhci_calc_clk()
1969 *actual_clock = (host->max_clk * clk_mul) / real_div; in sdhci_calc_clk()
1995 mmc_hostname(host->mmc)); in sdhci_enable_clk()
2003 if (host->version >= SDHCI_SPEC_410 && host->v4_mode) { in sdhci_enable_clk()
2018 mmc_hostname(host->mmc)); in sdhci_enable_clk()
2036 host->mmc->actual_clock = 0; in sdhci_set_clock()
2043 clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); in sdhci_set_clock()
2051 struct mmc_host *mmc = host->mmc; in sdhci_set_power_reg()
2053 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); in sdhci_set_power_reg()
2070 * Without a regulator, SDHCI does not support 2.0v in sdhci_set_power_noreg()
2094 mmc_hostname(host->mmc), vdd); in sdhci_set_power_noreg()
2099 if (host->pwr == pwr) in sdhci_set_power_noreg()
2102 host->pwr = pwr; in sdhci_set_power_noreg()
2106 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) in sdhci_set_power_noreg()
2113 if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE)) in sdhci_set_power_noreg()
2121 if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER) in sdhci_set_power_noreg()
2128 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) in sdhci_set_power_noreg()
2135 if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER) in sdhci_set_power_noreg()
2144 if (IS_ERR(host->mmc->supply.vmmc)) in sdhci_set_power()
2161 if (!IS_ERR(host->mmc->supply.vmmc)) { in sdhci_set_power_and_bus_voltage()
2162 struct mmc_host *mmc = host->mmc; in sdhci_set_power_and_bus_voltage()
2164 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); in sdhci_set_power_and_bus_voltage()
2184 present = mmc->ops->get_cd(mmc); in sdhci_request()
2186 spin_lock_irqsave(&host->lock, flags); in sdhci_request()
2190 if (sdhci_present_error(host, mrq->cmd, present)) in sdhci_request()
2193 cmd = sdhci_manual_cmd23(host, mrq) ? mrq->sbc : mrq->cmd; in sdhci_request()
2198 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request()
2204 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request()
2215 spin_lock_irqsave(&host->lock, flags); in sdhci_request_atomic()
2217 if (sdhci_present_error(host, mrq->cmd, true)) { in sdhci_request_atomic()
2222 cmd = sdhci_manual_cmd23(host, mrq) ? mrq->sbc : mrq->cmd; in sdhci_request_atomic()
2228 * again in non-atomic context. So we should not finish this request in sdhci_request_atomic()
2232 ret = -EBUSY; in sdhci_request_atomic()
2237 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_atomic()
2251 if (host->mmc->caps & MMC_CAP_8_BIT_DATA) in sdhci_set_bus_width()
2282 ctrl_2 |= SDHCI_CTRL_HS400; /* Non-standard */ in sdhci_set_uhs_signaling()
2303 return !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN) && in sdhci_preset_needed()
2314 return !host->preset_enabled && in sdhci_presetable_values_change()
2315 (sdhci_preset_needed(host, ios->timing) || host->drv_type != ios->drv_type); in sdhci_presetable_values_change()
2321 bool reinit_uhs = host->reinit_uhs; in sdhci_set_ios()
2325 host->reinit_uhs = false; in sdhci_set_ios()
2327 if (ios->power_mode == MMC_POWER_UNDEFINED) in sdhci_set_ios()
2330 if (host->flags & SDHCI_DEVICE_DEAD) { in sdhci_set_ios()
2331 if (!IS_ERR(mmc->supply.vmmc) && in sdhci_set_ios()
2332 ios->power_mode == MMC_POWER_OFF) in sdhci_set_ios()
2333 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); in sdhci_set_ios()
2341 if (ios->power_mode == MMC_POWER_OFF) { in sdhci_set_ios()
2346 if (host->version >= SDHCI_SPEC_300 && in sdhci_set_ios()
2347 (ios->power_mode == MMC_POWER_UP) && in sdhci_set_ios()
2348 !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN)) in sdhci_set_ios()
2351 if (!ios->clock || ios->clock != host->clock) { in sdhci_set_ios()
2352 turning_on_clk = ios->clock && !host->clock; in sdhci_set_ios()
2354 host->ops->set_clock(host, ios->clock); in sdhci_set_ios()
2355 host->clock = ios->clock; in sdhci_set_ios()
2357 if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK && in sdhci_set_ios()
2358 host->clock) { in sdhci_set_ios()
2359 host->timeout_clk = mmc->actual_clock ? in sdhci_set_ios()
2360 mmc->actual_clock / 1000 : in sdhci_set_ios()
2361 host->clock / 1000; in sdhci_set_ios()
2362 mmc->max_busy_timeout = in sdhci_set_ios()
2363 host->ops->get_max_timeout_count ? in sdhci_set_ios()
2364 host->ops->get_max_timeout_count(host) : in sdhci_set_ios()
2366 mmc->max_busy_timeout /= host->timeout_clk; in sdhci_set_ios()
2370 if (host->ops->set_power) in sdhci_set_ios()
2371 host->ops->set_power(host, ios->power_mode, ios->vdd); in sdhci_set_ios()
2373 sdhci_set_power(host, ios->power_mode, ios->vdd); in sdhci_set_ios()
2375 if (host->ops->platform_send_init_74_clocks) in sdhci_set_ios()
2376 host->ops->platform_send_init_74_clocks(host, ios->power_mode); in sdhci_set_ios()
2378 host->ops->set_bus_width(host, ios->bus_width); in sdhci_set_ios()
2386 host->timing == ios->timing && in sdhci_set_ios()
2387 host->version >= SDHCI_SPEC_300 && in sdhci_set_ios()
2393 if (!(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)) { in sdhci_set_ios()
2394 if (ios->timing == MMC_TIMING_SD_HS || in sdhci_set_ios()
2395 ios->timing == MMC_TIMING_MMC_HS || in sdhci_set_ios()
2396 ios->timing == MMC_TIMING_MMC_HS400 || in sdhci_set_ios()
2397 ios->timing == MMC_TIMING_MMC_HS200 || in sdhci_set_ios()
2398 ios->timing == MMC_TIMING_MMC_DDR52 || in sdhci_set_ios()
2399 ios->timing == MMC_TIMING_UHS_SDR50 || in sdhci_set_ios()
2400 ios->timing == MMC_TIMING_UHS_SDR104 || in sdhci_set_ios()
2401 ios->timing == MMC_TIMING_UHS_DDR50 || in sdhci_set_ios()
2402 ios->timing == MMC_TIMING_UHS_SDR25) in sdhci_set_ios()
2408 if (host->version >= SDHCI_SPEC_300) { in sdhci_set_ios()
2412 * According to SDHCI Spec v3.00, if the Preset Value in sdhci_set_ios()
2425 if (!host->preset_enabled) { in sdhci_set_ios()
2432 if (ios->drv_type == MMC_SET_DRIVER_TYPE_A) in sdhci_set_ios()
2434 else if (ios->drv_type == MMC_SET_DRIVER_TYPE_B) in sdhci_set_ios()
2436 else if (ios->drv_type == MMC_SET_DRIVER_TYPE_C) in sdhci_set_ios()
2438 else if (ios->drv_type == MMC_SET_DRIVER_TYPE_D) in sdhci_set_ios()
2447 host->drv_type = ios->drv_type; in sdhci_set_ios()
2450 host->ops->set_uhs_signaling(host, ios->timing); in sdhci_set_ios()
2451 host->timing = ios->timing; in sdhci_set_ios()
2453 if (sdhci_preset_needed(host, ios->timing)) { in sdhci_set_ios()
2458 ios->drv_type = FIELD_GET(SDHCI_PRESET_DRV_MASK, in sdhci_set_ios()
2460 host->drv_type = ios->drv_type; in sdhci_set_ios()
2463 /* Re-enable SD Clock */ in sdhci_set_ios()
2464 host->ops->set_clock(host, host->clock); in sdhci_set_ios()
2475 if (host->flags & SDHCI_DEVICE_DEAD) in sdhci_get_cd()
2490 if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) in sdhci_get_cd()
2503 spin_lock_irqsave(&host->lock, flags); in sdhci_get_cd_nogpio()
2505 if (host->flags & SDHCI_DEVICE_DEAD) in sdhci_get_cd_nogpio()
2510 spin_unlock_irqrestore(&host->lock, flags); in sdhci_get_cd_nogpio()
2521 if (host->flags & SDHCI_DEVICE_DEAD) { in sdhci_check_ro()
2523 } else if (host->ops->get_ro) { in sdhci_check_ro()
2524 is_readonly = host->ops->get_ro(host); in sdhci_check_ro()
2525 } else if (mmc_can_gpio_ro(host->mmc)) { in sdhci_check_ro()
2526 is_readonly = mmc_gpio_get_ro(host->mmc); in sdhci_check_ro()
2528 allow_invert = !(host->mmc->caps2 & MMC_CAP2_RO_ACTIVE_HIGH); in sdhci_check_ro()
2537 (host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT)) in sdhci_check_ro()
2550 if (!(host->quirks & SDHCI_QUIRK_UNSTABLE_RO_DETECT)) in sdhci_get_ro()
2568 if (host->ops && host->ops->hw_reset) in sdhci_hw_reset()
2569 host->ops->hw_reset(host); in sdhci_hw_reset()
2574 if (!(host->flags & SDHCI_DEVICE_DEAD)) { in sdhci_enable_sdio_irq_nolock()
2576 host->ier |= SDHCI_INT_CARD_INT; in sdhci_enable_sdio_irq_nolock()
2578 host->ier &= ~SDHCI_INT_CARD_INT; in sdhci_enable_sdio_irq_nolock()
2580 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_enable_sdio_irq_nolock()
2581 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_enable_sdio_irq_nolock()
2593 spin_lock_irqsave(&host->lock, flags); in sdhci_enable_sdio_irq()
2595 spin_unlock_irqrestore(&host->lock, flags); in sdhci_enable_sdio_irq()
2607 spin_lock_irqsave(&host->lock, flags); in sdhci_ack_sdio_irq()
2609 spin_unlock_irqrestore(&host->lock, flags); in sdhci_ack_sdio_irq()
2623 if (host->version < SDHCI_SPEC_300) in sdhci_start_signal_voltage_switch()
2628 switch (ios->signal_voltage) { in sdhci_start_signal_voltage_switch()
2630 if (!(host->flags & SDHCI_SIGNALING_330)) in sdhci_start_signal_voltage_switch()
2631 return -EINVAL; in sdhci_start_signal_voltage_switch()
2636 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_start_signal_voltage_switch()
2641 return -EIO; in sdhci_start_signal_voltage_switch()
2655 return -EAGAIN; in sdhci_start_signal_voltage_switch()
2657 if (!(host->flags & SDHCI_SIGNALING_180)) in sdhci_start_signal_voltage_switch()
2658 return -EINVAL; in sdhci_start_signal_voltage_switch()
2659 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_start_signal_voltage_switch()
2664 return -EIO; in sdhci_start_signal_voltage_switch()
2676 if (host->ops->voltage_switch) in sdhci_start_signal_voltage_switch()
2677 host->ops->voltage_switch(host); in sdhci_start_signal_voltage_switch()
2687 return -EAGAIN; in sdhci_start_signal_voltage_switch()
2689 if (!(host->flags & SDHCI_SIGNALING_120)) in sdhci_start_signal_voltage_switch()
2690 return -EINVAL; in sdhci_start_signal_voltage_switch()
2691 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_start_signal_voltage_switch()
2696 return -EIO; in sdhci_start_signal_voltage_switch()
2723 spin_lock_irqsave(&host->lock, flags); in sdhci_prepare_hs400_tuning()
2724 host->flags |= SDHCI_HS400_TUNING; in sdhci_prepare_hs400_tuning()
2725 spin_unlock_irqrestore(&host->lock, flags); in sdhci_prepare_hs400_tuning()
2736 if (host->quirks2 & SDHCI_QUIRK2_TUNING_WORK_AROUND) in sdhci_start_tuning()
2757 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_end_tuning()
2758 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_end_tuning()
2781 mmc_send_abort_tuning(host->mmc, opcode); in sdhci_abort_tuning()
2786 * We use sdhci_send_tuning() because mmc_send_tuning() is not a good fit. SDHCI
2788 * automatically) so mmc_send_tuning() will return -EIO. Also the tuning command
2794 struct mmc_host *mmc = host->mmc; in sdhci_send_tuning()
2798 u32 b = host->sdma_boundary; in sdhci_send_tuning()
2800 spin_lock_irqsave(&host->lock, flags); in sdhci_send_tuning()
2813 mmc->ios.bus_width == MMC_BUS_WIDTH_8) in sdhci_send_tuning()
2827 spin_unlock_irqrestore(&host->lock, flags); in sdhci_send_tuning()
2828 host->tuning_done = 0; in sdhci_send_tuning()
2832 host->cmd = NULL; in sdhci_send_tuning()
2836 host->tuning_done = 0; in sdhci_send_tuning()
2838 spin_unlock_irqrestore(&host->lock, flags); in sdhci_send_tuning()
2841 wait_event_timeout(host->buf_ready_int, (host->tuning_done == 1), in sdhci_send_tuning()
2855 for (i = 0; i < host->tuning_loop_count; i++) { in __sdhci_execute_tuning()
2860 if (!host->tuning_done) { in __sdhci_execute_tuning()
2862 mmc_hostname(host->mmc)); in __sdhci_execute_tuning()
2864 return -ETIMEDOUT; in __sdhci_execute_tuning()
2868 if (host->tuning_delay > 0) in __sdhci_execute_tuning()
2869 mdelay(host->tuning_delay); in __sdhci_execute_tuning()
2881 mmc_hostname(host->mmc)); in __sdhci_execute_tuning()
2883 return -EAGAIN; in __sdhci_execute_tuning()
2893 hs400_tuning = host->flags & SDHCI_HS400_TUNING; in sdhci_execute_tuning()
2895 if (host->tuning_mode == SDHCI_TUNING_MODE_1) in sdhci_execute_tuning()
2896 tuning_count = host->tuning_count; in sdhci_execute_tuning()
2905 switch (host->timing) { in sdhci_execute_tuning()
2908 err = -EINVAL; in sdhci_execute_tuning()
2913 * Periodic re-tuning for HS400 is not expected to be needed, so in sdhci_execute_tuning()
2925 if (host->flags & SDHCI_SDR50_NEEDS_TUNING) in sdhci_execute_tuning()
2933 if (host->ops->platform_execute_tuning) { in sdhci_execute_tuning()
2934 err = host->ops->platform_execute_tuning(host, opcode); in sdhci_execute_tuning()
2938 mmc->retune_period = tuning_count; in sdhci_execute_tuning()
2940 if (host->tuning_delay < 0) in sdhci_execute_tuning()
2941 host->tuning_delay = opcode == MMC_SEND_TUNING_BLOCK; in sdhci_execute_tuning()
2945 host->tuning_err = __sdhci_execute_tuning(host, opcode); in sdhci_execute_tuning()
2949 host->flags &= ~SDHCI_HS400_TUNING; in sdhci_execute_tuning()
2958 if (host->version < SDHCI_SPEC_300) in sdhci_enable_preset_value()
2965 if (host->preset_enabled != enable) { in sdhci_enable_preset_value()
2976 host->flags |= SDHCI_PV_ENABLED; in sdhci_enable_preset_value()
2978 host->flags &= ~SDHCI_PV_ENABLED; in sdhci_enable_preset_value()
2980 host->preset_enabled = enable; in sdhci_enable_preset_value()
2987 struct mmc_data *data = mrq->data; in sdhci_post_req()
2989 if (data->host_cookie != COOKIE_UNMAPPED) in sdhci_post_req()
2990 dma_unmap_sg(mmc_dev(mmc), data->sg, data->sg_len, in sdhci_post_req()
2993 data->host_cookie = COOKIE_UNMAPPED; in sdhci_post_req()
3000 mrq->data->host_cookie = COOKIE_UNMAPPED; in sdhci_pre_req()
3003 * No pre-mapping in the pre hook if we're using the bounce buffer, in sdhci_pre_req()
3007 if (host->flags & SDHCI_REQ_USE_DMA && !host->bounce_buffer) in sdhci_pre_req()
3008 sdhci_pre_dma_transfer(host, mrq->data, COOKIE_PRE_MAPPED); in sdhci_pre_req()
3013 if (host->data_cmd) { in sdhci_error_out_mrqs()
3014 host->data_cmd->error = err; in sdhci_error_out_mrqs()
3015 sdhci_finish_mrq(host, host->data_cmd->mrq); in sdhci_error_out_mrqs()
3018 if (host->cmd) { in sdhci_error_out_mrqs()
3019 host->cmd->error = err; in sdhci_error_out_mrqs()
3020 sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_error_out_mrqs()
3031 if (host->ops->card_event) in sdhci_card_event()
3032 host->ops->card_event(host); in sdhci_card_event()
3034 present = mmc->ops->get_cd(mmc); in sdhci_card_event()
3036 spin_lock_irqsave(&host->lock, flags); in sdhci_card_event()
3047 sdhci_error_out_mrqs(host, -ENOMEDIUM); in sdhci_card_event()
3050 spin_unlock_irqrestore(&host->lock, flags); in sdhci_card_event()
3082 spin_lock_irqsave(&host->lock, flags); in sdhci_request_done()
3085 mrq = host->mrqs_done[i]; in sdhci_request_done()
3091 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3103 * also be in mrqs_done, otherwise host->cmd and host->data_cmd in sdhci_request_done()
3106 if (host->cmd || host->data_cmd) { in sdhci_request_done()
3107 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3112 if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) in sdhci_request_done()
3114 host->ops->set_clock(host, host->clock); in sdhci_request_done()
3118 host->pending_reset = false; in sdhci_request_done()
3126 if (host->flags & SDHCI_REQ_USE_DMA) { in sdhci_request_done()
3127 struct mmc_data *data = mrq->data; in sdhci_request_done()
3129 if (host->use_external_dma && data && in sdhci_request_done()
3130 (mrq->cmd->error || data->error)) { in sdhci_request_done()
3133 host->mrqs_done[i] = NULL; in sdhci_request_done()
3134 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3136 spin_lock_irqsave(&host->lock, flags); in sdhci_request_done()
3140 if (data && data->host_cookie == COOKIE_MAPPED) { in sdhci_request_done()
3141 if (host->bounce_buffer) { in sdhci_request_done()
3147 unsigned int length = data->bytes_xfered; in sdhci_request_done()
3149 if (length > host->bounce_buffer_size) { in sdhci_request_done()
3151 mmc_hostname(host->mmc), in sdhci_request_done()
3152 host->bounce_buffer_size, in sdhci_request_done()
3153 data->bytes_xfered); in sdhci_request_done()
3155 length = host->bounce_buffer_size; in sdhci_request_done()
3158 mmc_dev(host->mmc), in sdhci_request_done()
3159 host->bounce_addr, in sdhci_request_done()
3160 host->bounce_buffer_size, in sdhci_request_done()
3162 sg_copy_from_buffer(data->sg, in sdhci_request_done()
3163 data->sg_len, in sdhci_request_done()
3164 host->bounce_buffer, in sdhci_request_done()
3169 mmc_dev(host->mmc), in sdhci_request_done()
3170 host->bounce_addr, in sdhci_request_done()
3171 host->bounce_buffer_size, in sdhci_request_done()
3176 dma_unmap_sg(mmc_dev(host->mmc), data->sg, in sdhci_request_done()
3177 data->sg_len, in sdhci_request_done()
3180 data->host_cookie = COOKIE_UNMAPPED; in sdhci_request_done()
3184 host->mrqs_done[i] = NULL; in sdhci_request_done()
3186 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3188 if (host->ops->request_done) in sdhci_request_done()
3189 host->ops->request_done(host, mrq); in sdhci_request_done()
3191 mmc_request_done(host->mmc, mrq); in sdhci_request_done()
3212 spin_lock_irqsave(&host->lock, flags); in sdhci_timeout_timer()
3214 if (host->cmd && !sdhci_data_line_cmd(host->cmd)) { in sdhci_timeout_timer()
3216 mmc_hostname(host->mmc)); in sdhci_timeout_timer()
3220 host->cmd->error = -ETIMEDOUT; in sdhci_timeout_timer()
3221 sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_timeout_timer()
3224 spin_unlock_irqrestore(&host->lock, flags); in sdhci_timeout_timer()
3234 spin_lock_irqsave(&host->lock, flags); in sdhci_timeout_data_timer()
3236 if (host->data || host->data_cmd || in sdhci_timeout_data_timer()
3237 (host->cmd && sdhci_data_line_cmd(host->cmd))) { in sdhci_timeout_data_timer()
3239 mmc_hostname(host->mmc)); in sdhci_timeout_data_timer()
3243 if (host->data) { in sdhci_timeout_data_timer()
3244 host->data->error = -ETIMEDOUT; in sdhci_timeout_data_timer()
3246 queue_work(host->complete_wq, &host->complete_work); in sdhci_timeout_data_timer()
3247 } else if (host->data_cmd) { in sdhci_timeout_data_timer()
3248 host->data_cmd->error = -ETIMEDOUT; in sdhci_timeout_data_timer()
3249 sdhci_finish_mrq(host, host->data_cmd->mrq); in sdhci_timeout_data_timer()
3251 host->cmd->error = -ETIMEDOUT; in sdhci_timeout_data_timer()
3252 sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_timeout_data_timer()
3256 spin_unlock_irqrestore(&host->lock, flags); in sdhci_timeout_data_timer()
3267 /* Handle auto-CMD12 error */ in sdhci_cmd_irq()
3268 if (intmask & SDHCI_INT_AUTO_CMD_ERR && host->data_cmd) { in sdhci_cmd_irq()
3269 struct mmc_request *mrq = host->data_cmd->mrq; in sdhci_cmd_irq()
3275 /* Treat auto-CMD12 error the same as data error */ in sdhci_cmd_irq()
3276 if (!mrq->sbc && (host->flags & SDHCI_AUTO_CMD12)) { in sdhci_cmd_irq()
3282 if (!host->cmd) { in sdhci_cmd_irq()
3284 * SDHCI recovers from errors by resetting the cmd and data in sdhci_cmd_irq()
3288 if (host->pending_reset) in sdhci_cmd_irq()
3291 mmc_hostname(host->mmc), (unsigned)intmask); in sdhci_cmd_irq()
3300 host->cmd->error = -ETIMEDOUT; in sdhci_cmd_irq()
3303 host->cmd->error = -EILSEQ; in sdhci_cmd_irq()
3304 if (!mmc_op_tuning(host->cmd->opcode)) in sdhci_cmd_irq()
3308 if (host->cmd->data && in sdhci_cmd_irq()
3311 host->cmd = NULL; in sdhci_cmd_irq()
3316 __sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_cmd_irq()
3320 /* Handle auto-CMD23 error */ in sdhci_cmd_irq()
3322 struct mmc_request *mrq = host->cmd->mrq; in sdhci_cmd_irq()
3325 -ETIMEDOUT : in sdhci_cmd_irq()
3326 -EILSEQ; in sdhci_cmd_irq()
3331 mrq->sbc->error = err; in sdhci_cmd_irq()
3343 void *desc = host->adma_table; in sdhci_adma_show_error()
3344 dma_addr_t dma = host->adma_addr; in sdhci_adma_show_error()
3351 if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_adma_show_error()
3354 le32_to_cpu(dma_desc->addr_hi), in sdhci_adma_show_error()
3355 le32_to_cpu(dma_desc->addr_lo), in sdhci_adma_show_error()
3356 le16_to_cpu(dma_desc->len), in sdhci_adma_show_error()
3357 le16_to_cpu(dma_desc->cmd)); in sdhci_adma_show_error()
3361 le32_to_cpu(dma_desc->addr_lo), in sdhci_adma_show_error()
3362 le16_to_cpu(dma_desc->len), in sdhci_adma_show_error()
3363 le16_to_cpu(dma_desc->cmd)); in sdhci_adma_show_error()
3365 desc += host->desc_sz; in sdhci_adma_show_error()
3366 dma += host->desc_sz; in sdhci_adma_show_error()
3368 if (dma_desc->cmd & cpu_to_le16(ADMA2_END)) in sdhci_adma_show_error()
3382 if (intmask & SDHCI_INT_DATA_AVAIL && !host->data) { in sdhci_data_irq()
3384 host->tuning_done = 1; in sdhci_data_irq()
3385 wake_up(&host->buf_ready_int); in sdhci_data_irq()
3390 if (!host->data) { in sdhci_data_irq()
3391 struct mmc_command *data_cmd = host->data_cmd; in sdhci_data_irq()
3398 if (data_cmd && (data_cmd->flags & MMC_RSP_BUSY)) { in sdhci_data_irq()
3400 host->data_cmd = NULL; in sdhci_data_irq()
3401 data_cmd->error = -ETIMEDOUT; in sdhci_data_irq()
3403 __sdhci_finish_mrq(host, data_cmd->mrq); in sdhci_data_irq()
3407 host->data_cmd = NULL; in sdhci_data_irq()
3409 * Some cards handle busy-end interrupt in sdhci_data_irq()
3413 if (host->cmd == data_cmd) in sdhci_data_irq()
3416 __sdhci_finish_mrq(host, data_cmd->mrq); in sdhci_data_irq()
3422 * SDHCI recovers from errors by resetting the cmd and data in sdhci_data_irq()
3426 if (host->pending_reset) in sdhci_data_irq()
3430 mmc_hostname(host->mmc), (unsigned)intmask); in sdhci_data_irq()
3438 host->data->error = -ETIMEDOUT; in sdhci_data_irq()
3441 host->data->error = -EILSEQ; in sdhci_data_irq()
3447 host->data->error = -EILSEQ; in sdhci_data_irq()
3457 pr_err("%s: ADMA error: 0x%08x\n", mmc_hostname(host->mmc), in sdhci_data_irq()
3461 host->data->error = -EIO; in sdhci_data_irq()
3462 if (host->ops->adma_workaround) in sdhci_data_irq()
3463 host->ops->adma_workaround(host, intmask); in sdhci_data_irq()
3466 if (host->data->error) in sdhci_data_irq()
3485 dmanow = dmastart + host->data->bytes_xfered; in sdhci_data_irq()
3490 ~((dma_addr_t)SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) + in sdhci_data_irq()
3492 host->data->bytes_xfered = dmanow - dmastart; in sdhci_data_irq()
3494 &dmastart, host->data->bytes_xfered, &dmanow); in sdhci_data_irq()
3499 if (host->cmd == host->data_cmd) { in sdhci_data_irq()
3505 host->data_early = 1; in sdhci_data_irq()
3516 struct mmc_data *data = mrq->data; in sdhci_defer_done()
3518 return host->pending_reset || host->always_defer_done || in sdhci_defer_done()
3519 ((host->flags & SDHCI_REQ_USE_DMA) && data && in sdhci_defer_done()
3520 data->host_cookie == COOKIE_MAPPED); in sdhci_defer_done()
3532 spin_lock(&host->lock); in sdhci_irq()
3534 if (host->runtime_suspended) { in sdhci_irq()
3535 spin_unlock(&host->lock); in sdhci_irq()
3548 if (host->ops->irq) { in sdhci_irq()
3549 intmask = host->ops->irq(host, intmask); in sdhci_irq()
3574 host->ier &= ~(SDHCI_INT_CARD_INSERT | in sdhci_irq()
3576 host->ier |= present ? SDHCI_INT_CARD_REMOVE : in sdhci_irq()
3578 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_irq()
3579 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_irq()
3584 host->thread_isr |= intmask & (SDHCI_INT_CARD_INSERT | in sdhci_irq()
3597 mmc_hostname(host->mmc)); in sdhci_irq()
3600 mmc_retune_needed(host->mmc); in sdhci_irq()
3603 (host->ier & SDHCI_INT_CARD_INT)) { in sdhci_irq()
3605 sdio_signal_irq(host->mmc); in sdhci_irq()
3622 } while (intmask && --max_loops); in sdhci_irq()
3626 struct mmc_request *mrq = host->mrqs_done[i]; in sdhci_irq()
3635 host->mrqs_done[i] = NULL; in sdhci_irq()
3639 if (host->deferred_cmd) in sdhci_irq()
3642 spin_unlock(&host->lock); in sdhci_irq()
3649 if (host->ops->request_done) in sdhci_irq()
3650 host->ops->request_done(host, mrqs_done[i]); in sdhci_irq()
3652 mmc_request_done(host->mmc, mrqs_done[i]); in sdhci_irq()
3657 mmc_hostname(host->mmc), unexpected); in sdhci_irq()
3675 spin_lock_irqsave(&host->lock, flags); in sdhci_thread_irq()
3677 isr = host->thread_isr; in sdhci_thread_irq()
3678 host->thread_isr = 0; in sdhci_thread_irq()
3680 cmd = host->deferred_cmd; in sdhci_thread_irq()
3682 sdhci_finish_mrq(host, cmd->mrq); in sdhci_thread_irq()
3684 spin_unlock_irqrestore(&host->lock, flags); in sdhci_thread_irq()
3687 struct mmc_host *mmc = host->mmc; in sdhci_thread_irq()
3689 mmc->ops->card_event(mmc); in sdhci_thread_irq()
3706 return mmc_card_is_removable(host->mmc) && in sdhci_cd_irq_can_wakeup()
3707 !(host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) && in sdhci_cd_irq_can_wakeup()
3708 !mmc_can_gpio_cd(host->mmc); in sdhci_cd_irq_can_wakeup()
3713 * the Interrupt Status Enable register too. See 'Table 1-6: Wakeup Signal
3732 if (mmc_card_wake_sdio_irq(host->mmc)) { in sdhci_enable_irq_wakeups()
3747 host->irq_wake_enabled = !enable_irq_wake(host->irq); in sdhci_enable_irq_wakeups()
3749 return host->irq_wake_enabled; in sdhci_enable_irq_wakeups()
3762 disable_irq_wake(host->irq); in sdhci_disable_irq_wakeups()
3764 host->irq_wake_enabled = false; in sdhci_disable_irq_wakeups()
3771 mmc_retune_timer_stop(host->mmc); in sdhci_suspend_host()
3773 if (!device_may_wakeup(mmc_dev(host->mmc)) || in sdhci_suspend_host()
3775 host->ier = 0; in sdhci_suspend_host()
3778 free_irq(host->irq, host); in sdhci_suspend_host()
3788 struct mmc_host *mmc = host->mmc; in sdhci_resume_host()
3791 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_resume_host()
3792 if (host->ops->enable_dma) in sdhci_resume_host()
3793 host->ops->enable_dma(host); in sdhci_resume_host()
3796 if ((mmc->pm_flags & MMC_PM_KEEP_POWER) && in sdhci_resume_host()
3797 (host->quirks2 & SDHCI_QUIRK2_HOST_OFF_CARD_ON)) { in sdhci_resume_host()
3800 host->pwr = 0; in sdhci_resume_host()
3801 host->clock = 0; in sdhci_resume_host()
3802 host->reinit_uhs = true; in sdhci_resume_host()
3803 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_resume_host()
3805 sdhci_init(host, (mmc->pm_flags & MMC_PM_KEEP_POWER)); in sdhci_resume_host()
3808 if (host->irq_wake_enabled) { in sdhci_resume_host()
3811 ret = request_threaded_irq(host->irq, sdhci_irq, in sdhci_resume_host()
3829 mmc_retune_timer_stop(host->mmc); in sdhci_runtime_suspend_host()
3831 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_suspend_host()
3832 host->ier &= SDHCI_INT_CARD_INT; in sdhci_runtime_suspend_host()
3833 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_runtime_suspend_host()
3834 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_runtime_suspend_host()
3835 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_suspend_host()
3837 synchronize_hardirq(host->irq); in sdhci_runtime_suspend_host()
3839 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_suspend_host()
3840 host->runtime_suspended = true; in sdhci_runtime_suspend_host()
3841 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_suspend_host()
3849 struct mmc_host *mmc = host->mmc; in sdhci_runtime_resume_host()
3851 int host_flags = host->flags; in sdhci_runtime_resume_host()
3854 if (host->ops->enable_dma) in sdhci_runtime_resume_host()
3855 host->ops->enable_dma(host); in sdhci_runtime_resume_host()
3860 if (mmc->ios.power_mode != MMC_POWER_UNDEFINED && in sdhci_runtime_resume_host()
3861 mmc->ios.power_mode != MMC_POWER_OFF) { in sdhci_runtime_resume_host()
3862 /* Force clock and power re-program */ in sdhci_runtime_resume_host()
3863 host->pwr = 0; in sdhci_runtime_resume_host()
3864 host->clock = 0; in sdhci_runtime_resume_host()
3865 host->reinit_uhs = true; in sdhci_runtime_resume_host()
3866 mmc->ops->start_signal_voltage_switch(mmc, &mmc->ios); in sdhci_runtime_resume_host()
3867 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_runtime_resume_host()
3870 !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN)) { in sdhci_runtime_resume_host()
3871 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_resume_host()
3873 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_resume_host()
3876 if ((mmc->caps2 & MMC_CAP2_HS400_ES) && in sdhci_runtime_resume_host()
3877 mmc->ops->hs400_enhanced_strobe) in sdhci_runtime_resume_host()
3878 mmc->ops->hs400_enhanced_strobe(mmc, &mmc->ios); in sdhci_runtime_resume_host()
3881 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_resume_host()
3883 host->runtime_suspended = false; in sdhci_runtime_resume_host()
3892 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_resume_host()
3912 spin_lock_irqsave(&host->lock, flags); in sdhci_cqe_enable()
3921 if (host->v4_mode && (host->caps1 & SDHCI_CAN_DO_ADMA3)) in sdhci_cqe_enable()
3923 else if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_cqe_enable()
3929 sdhci_writew(host, SDHCI_MAKE_BLKSZ(host->sdma_boundary, 512), in sdhci_cqe_enable()
3935 host->ier = host->cqe_ier; in sdhci_cqe_enable()
3937 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_cqe_enable()
3938 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_cqe_enable()
3940 host->cqe_on = true; in sdhci_cqe_enable()
3942 pr_debug("%s: sdhci: CQE on, IRQ mask %#x, IRQ status %#x\n", in sdhci_cqe_enable()
3943 mmc_hostname(mmc), host->ier, in sdhci_cqe_enable()
3946 spin_unlock_irqrestore(&host->lock, flags); in sdhci_cqe_enable()
3955 spin_lock_irqsave(&host->lock, flags); in sdhci_cqe_disable()
3959 host->cqe_on = false; in sdhci_cqe_disable()
3964 pr_debug("%s: sdhci: CQE off, IRQ mask %#x, IRQ status %#x\n", in sdhci_cqe_disable()
3965 mmc_hostname(mmc), host->ier, in sdhci_cqe_disable()
3968 spin_unlock_irqrestore(&host->lock, flags); in sdhci_cqe_disable()
3977 if (!host->cqe_on) in sdhci_cqe_irq()
3981 *cmd_error = -EILSEQ; in sdhci_cqe_irq()
3985 *cmd_error = -ETIMEDOUT; in sdhci_cqe_irq()
3991 *data_error = -EILSEQ; in sdhci_cqe_irq()
3995 *data_error = -ETIMEDOUT; in sdhci_cqe_irq()
3998 *data_error = -EIO; in sdhci_cqe_irq()
4004 mask = intmask & host->cqe_ier; in sdhci_cqe_irq()
4009 mmc_hostname(host->mmc)); in sdhci_cqe_irq()
4011 intmask &= ~(host->cqe_ier | SDHCI_INT_ERROR); in sdhci_cqe_irq()
4015 mmc_hostname(host->mmc), intmask); in sdhci_cqe_irq()
4040 return ERR_PTR(-ENOMEM); in sdhci_alloc_host()
4043 host->mmc = mmc; in sdhci_alloc_host()
4044 host->mmc_host_ops = sdhci_ops; in sdhci_alloc_host()
4045 mmc->ops = &host->mmc_host_ops; in sdhci_alloc_host()
4047 host->flags = SDHCI_SIGNALING_330; in sdhci_alloc_host()
4049 host->cqe_ier = SDHCI_CQE_INT_MASK; in sdhci_alloc_host()
4050 host->cqe_err_ier = SDHCI_CQE_INT_ERR_MASK; in sdhci_alloc_host()
4052 host->tuning_delay = -1; in sdhci_alloc_host()
4053 host->tuning_loop_count = MAX_TUNING_LOOP; in sdhci_alloc_host()
4055 host->sdma_boundary = SDHCI_DEFAULT_BOUNDARY_ARG; in sdhci_alloc_host()
4062 host->adma_table_cnt = SDHCI_MAX_SEGS * 2 + 1; in sdhci_alloc_host()
4063 host->max_adma = 65536; in sdhci_alloc_host()
4065 host->max_timeout_count = 0xE; in sdhci_alloc_host()
4074 struct mmc_host *mmc = host->mmc; in sdhci_set_dma_mask()
4076 int ret = -EINVAL; in sdhci_set_dma_mask()
4078 if (host->quirks2 & SDHCI_QUIRK2_BROKEN_64_BIT_DMA) in sdhci_set_dma_mask()
4079 host->flags &= ~SDHCI_USE_64_BIT_DMA; in sdhci_set_dma_mask()
4081 /* Try 64-bit mask if hardware is capable of it */ in sdhci_set_dma_mask()
4082 if (host->flags & SDHCI_USE_64_BIT_DMA) { in sdhci_set_dma_mask()
4085 pr_warn("%s: Failed to set 64-bit DMA mask.\n", in sdhci_set_dma_mask()
4087 host->flags &= ~SDHCI_USE_64_BIT_DMA; in sdhci_set_dma_mask()
4091 /* 32-bit mask as default & fallback */ in sdhci_set_dma_mask()
4095 pr_warn("%s: Failed to set 32-bit DMA mask.\n", in sdhci_set_dma_mask()
4103 const u32 *caps, const u32 *caps1) in __sdhci_read_caps() argument
4109 if (host->read_caps) in __sdhci_read_caps()
4112 host->read_caps = true; in __sdhci_read_caps()
4115 host->quirks = debug_quirks; in __sdhci_read_caps()
4118 host->quirks2 = debug_quirks2; in __sdhci_read_caps()
4122 if (host->v4_mode) in __sdhci_read_caps()
4125 device_property_read_u64(mmc_dev(host->mmc), in __sdhci_read_caps()
4126 "sdhci-caps-mask", &dt_caps_mask); in __sdhci_read_caps()
4127 device_property_read_u64(mmc_dev(host->mmc), in __sdhci_read_caps()
4128 "sdhci-caps", &dt_caps); in __sdhci_read_caps()
4131 host->version = (v & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT; in __sdhci_read_caps()
4133 if (caps) { in __sdhci_read_caps()
4134 host->caps = *caps; in __sdhci_read_caps()
4136 host->caps = sdhci_readl(host, SDHCI_CAPABILITIES); in __sdhci_read_caps()
4137 host->caps &= ~lower_32_bits(dt_caps_mask); in __sdhci_read_caps()
4138 host->caps |= lower_32_bits(dt_caps); in __sdhci_read_caps()
4141 if (host->version < SDHCI_SPEC_300) in __sdhci_read_caps()
4145 host->caps1 = *caps1; in __sdhci_read_caps()
4147 host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); in __sdhci_read_caps()
4148 host->caps1 &= ~upper_32_bits(dt_caps_mask); in __sdhci_read_caps()
4149 host->caps1 |= upper_32_bits(dt_caps); in __sdhci_read_caps()
4156 struct mmc_host *mmc = host->mmc; in sdhci_allocate_bounce_buffer()
4172 if (mmc->max_req_size < bounce_size) in sdhci_allocate_bounce_buffer()
4173 bounce_size = mmc->max_req_size; in sdhci_allocate_bounce_buffer()
4181 host->bounce_buffer = devm_kmalloc(mmc_dev(mmc), in sdhci_allocate_bounce_buffer()
4184 if (!host->bounce_buffer) { in sdhci_allocate_bounce_buffer()
4190 * mmc->max_segs == 1. in sdhci_allocate_bounce_buffer()
4195 host->bounce_addr = dma_map_single(mmc_dev(mmc), in sdhci_allocate_bounce_buffer()
4196 host->bounce_buffer, in sdhci_allocate_bounce_buffer()
4199 ret = dma_mapping_error(mmc_dev(mmc), host->bounce_addr); in sdhci_allocate_bounce_buffer()
4201 devm_kfree(mmc_dev(mmc), host->bounce_buffer); in sdhci_allocate_bounce_buffer()
4202 host->bounce_buffer = NULL; in sdhci_allocate_bounce_buffer()
4207 host->bounce_buffer_size = bounce_size; in sdhci_allocate_bounce_buffer()
4210 mmc->max_segs = max_blocks; in sdhci_allocate_bounce_buffer()
4211 mmc->max_seg_size = bounce_size; in sdhci_allocate_bounce_buffer()
4212 mmc->max_req_size = bounce_size; in sdhci_allocate_bounce_buffer()
4222 * version 4.10 in Capabilities Register is used as 64-bit System in sdhci_can_64bit_dma()
4225 if (host->version >= SDHCI_SPEC_410 && host->v4_mode) in sdhci_can_64bit_dma()
4226 return host->caps & SDHCI_CAN_64BIT_V4; in sdhci_can_64bit_dma()
4228 return host->caps & SDHCI_CAN_64BIT; in sdhci_can_64bit_dma()
4243 return -EINVAL; in sdhci_setup_host()
4245 mmc = host->mmc; in sdhci_setup_host()
4253 if (!mmc->supply.vqmmc) { in sdhci_setup_host()
4263 DBG("Caps: 0x%08x | Caps_1: 0x%08x\n", in sdhci_setup_host()
4269 override_timeout_clk = host->timeout_clk; in sdhci_setup_host()
4271 if (host->version > SDHCI_SPEC_420) { in sdhci_setup_host()
4273 mmc_hostname(mmc), host->version); in sdhci_setup_host()
4276 if (host->quirks & SDHCI_QUIRK_FORCE_DMA) in sdhci_setup_host()
4277 host->flags |= SDHCI_USE_SDMA; in sdhci_setup_host()
4278 else if (!(host->caps & SDHCI_CAN_DO_SDMA)) in sdhci_setup_host()
4281 host->flags |= SDHCI_USE_SDMA; in sdhci_setup_host()
4283 if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) && in sdhci_setup_host()
4284 (host->flags & SDHCI_USE_SDMA)) { in sdhci_setup_host()
4286 host->flags &= ~SDHCI_USE_SDMA; in sdhci_setup_host()
4289 if ((host->version >= SDHCI_SPEC_200) && in sdhci_setup_host()
4290 (host->caps & SDHCI_CAN_DO_ADMA2)) in sdhci_setup_host()
4291 host->flags |= SDHCI_USE_ADMA; in sdhci_setup_host()
4293 if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) && in sdhci_setup_host()
4294 (host->flags & SDHCI_USE_ADMA)) { in sdhci_setup_host()
4296 host->flags &= ~SDHCI_USE_ADMA; in sdhci_setup_host()
4300 host->flags |= SDHCI_USE_64_BIT_DMA; in sdhci_setup_host()
4302 if (host->use_external_dma) { in sdhci_setup_host()
4304 if (ret == -EPROBE_DEFER) in sdhci_setup_host()
4307 * Fall back to use the DMA/PIO integrated in standard SDHCI in sdhci_setup_host()
4314 host->flags &= ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); in sdhci_setup_host()
4317 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_setup_host()
4318 if (host->ops->set_dma_mask) in sdhci_setup_host()
4319 ret = host->ops->set_dma_mask(host); in sdhci_setup_host()
4323 if (!ret && host->ops->enable_dma) in sdhci_setup_host()
4324 ret = host->ops->enable_dma(host); in sdhci_setup_host()
4327 pr_warn("%s: No suitable DMA available - falling back to PIO\n", in sdhci_setup_host()
4329 host->flags &= ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); in sdhci_setup_host()
4335 /* SDMA does not support 64-bit DMA if v4 mode not set */ in sdhci_setup_host()
4336 if ((host->flags & SDHCI_USE_64_BIT_DMA) && !host->v4_mode) in sdhci_setup_host()
4337 host->flags &= ~SDHCI_USE_SDMA; in sdhci_setup_host()
4339 if (host->flags & SDHCI_USE_ADMA) { in sdhci_setup_host()
4343 if (!(host->flags & SDHCI_USE_64_BIT_DMA)) in sdhci_setup_host()
4344 host->alloc_desc_sz = SDHCI_ADMA2_32_DESC_SZ; in sdhci_setup_host()
4345 else if (!host->alloc_desc_sz) in sdhci_setup_host()
4346 host->alloc_desc_sz = SDHCI_ADMA2_64_DESC_SZ(host); in sdhci_setup_host()
4348 host->desc_sz = host->alloc_desc_sz; in sdhci_setup_host()
4349 host->adma_table_sz = host->adma_table_cnt * host->desc_sz; in sdhci_setup_host()
4351 host->align_buffer_sz = SDHCI_MAX_SEGS * SDHCI_ADMA2_ALIGN; in sdhci_setup_host()
4353 * Use zalloc to zero the reserved high 32-bits of 128-bit in sdhci_setup_host()
4357 host->align_buffer_sz + host->adma_table_sz, in sdhci_setup_host()
4360 pr_warn("%s: Unable to allocate ADMA buffers - falling back to standard DMA\n", in sdhci_setup_host()
4362 host->flags &= ~SDHCI_USE_ADMA; in sdhci_setup_host()
4363 } else if ((dma + host->align_buffer_sz) & in sdhci_setup_host()
4364 (SDHCI_ADMA2_DESC_ALIGN - 1)) { in sdhci_setup_host()
4367 host->flags &= ~SDHCI_USE_ADMA; in sdhci_setup_host()
4368 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_setup_host()
4369 host->adma_table_sz, buf, dma); in sdhci_setup_host()
4371 host->align_buffer = buf; in sdhci_setup_host()
4372 host->align_addr = dma; in sdhci_setup_host()
4374 host->adma_table = buf + host->align_buffer_sz; in sdhci_setup_host()
4375 host->adma_addr = dma + host->align_buffer_sz; in sdhci_setup_host()
4384 if (!(host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA))) { in sdhci_setup_host()
4385 host->dma_mask = DMA_BIT_MASK(64); in sdhci_setup_host()
4386 mmc_dev(mmc)->dma_mask = &host->dma_mask; in sdhci_setup_host()
4389 if (host->version >= SDHCI_SPEC_300) in sdhci_setup_host()
4390 host->max_clk = FIELD_GET(SDHCI_CLOCK_V3_BASE_MASK, host->caps); in sdhci_setup_host()
4392 host->max_clk = FIELD_GET(SDHCI_CLOCK_BASE_MASK, host->caps); in sdhci_setup_host()
4394 host->max_clk *= 1000000; in sdhci_setup_host()
4395 if (host->max_clk == 0 || host->quirks & in sdhci_setup_host()
4397 if (!host->ops->get_max_clock) { in sdhci_setup_host()
4400 ret = -ENODEV; in sdhci_setup_host()
4403 host->max_clk = host->ops->get_max_clock(host); in sdhci_setup_host()
4410 host->clk_mul = FIELD_GET(SDHCI_CLOCK_MUL_MASK, host->caps1); in sdhci_setup_host()
4418 if (host->clk_mul) in sdhci_setup_host()
4419 host->clk_mul += 1; in sdhci_setup_host()
4424 max_clk = host->max_clk; in sdhci_setup_host()
4426 if (host->ops->get_min_clock) in sdhci_setup_host()
4427 mmc->f_min = host->ops->get_min_clock(host); in sdhci_setup_host()
4428 else if (host->version >= SDHCI_SPEC_300) { in sdhci_setup_host()
4429 if (host->clk_mul) in sdhci_setup_host()
4430 max_clk = host->max_clk * host->clk_mul; in sdhci_setup_host()
4435 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300; in sdhci_setup_host()
4437 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200; in sdhci_setup_host()
4439 if (!mmc->f_max || mmc->f_max > max_clk) in sdhci_setup_host()
4440 mmc->f_max = max_clk; in sdhci_setup_host()
4442 if (!(host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) { in sdhci_setup_host()
4443 host->timeout_clk = FIELD_GET(SDHCI_TIMEOUT_CLK_MASK, host->caps); in sdhci_setup_host()
4445 if (host->caps & SDHCI_TIMEOUT_CLK_UNIT) in sdhci_setup_host()
4446 host->timeout_clk *= 1000; in sdhci_setup_host()
4448 if (host->timeout_clk == 0) { in sdhci_setup_host()
4449 if (!host->ops->get_timeout_clock) { in sdhci_setup_host()
4452 ret = -ENODEV; in sdhci_setup_host()
4456 host->timeout_clk = in sdhci_setup_host()
4457 DIV_ROUND_UP(host->ops->get_timeout_clock(host), in sdhci_setup_host()
4462 host->timeout_clk = override_timeout_clk; in sdhci_setup_host()
4464 mmc->max_busy_timeout = host->ops->get_max_timeout_count ? in sdhci_setup_host()
4465 host->ops->get_max_timeout_count(host) : 1 << 27; in sdhci_setup_host()
4466 mmc->max_busy_timeout /= host->timeout_clk; in sdhci_setup_host()
4469 if (host->quirks2 & SDHCI_QUIRK2_DISABLE_HW_TIMEOUT && in sdhci_setup_host()
4470 !host->ops->get_max_timeout_count) in sdhci_setup_host()
4471 mmc->max_busy_timeout = 0; in sdhci_setup_host()
4473 mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_CMD23; in sdhci_setup_host()
4474 mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD; in sdhci_setup_host()
4476 if (host->quirks & SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12) in sdhci_setup_host()
4477 host->flags |= SDHCI_AUTO_CMD12; in sdhci_setup_host()
4480 * For v3 mode, Auto-CMD23 stuff only works in ADMA or PIO. in sdhci_setup_host()
4481 * For v4 mode, SDMA may use Auto-CMD23 as well. in sdhci_setup_host()
4483 if ((host->version >= SDHCI_SPEC_300) && in sdhci_setup_host()
4484 ((host->flags & SDHCI_USE_ADMA) || in sdhci_setup_host()
4485 !(host->flags & SDHCI_USE_SDMA) || host->v4_mode) && in sdhci_setup_host()
4486 !(host->quirks2 & SDHCI_QUIRK2_ACMD23_BROKEN)) { in sdhci_setup_host()
4487 host->flags |= SDHCI_AUTO_CMD23; in sdhci_setup_host()
4488 DBG("Auto-CMD23 available\n"); in sdhci_setup_host()
4490 DBG("Auto-CMD23 unavailable\n"); in sdhci_setup_host()
4494 * A controller may support 8-bit width, but the board itself in sdhci_setup_host()
4496 * 8-bit width must set "mmc->caps |= MMC_CAP_8_BIT_DATA;" in in sdhci_setup_host()
4498 * won't assume 8-bit width for hosts without that CAP. in sdhci_setup_host()
4500 if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) in sdhci_setup_host()
4501 mmc->caps |= MMC_CAP_4_BIT_DATA; in sdhci_setup_host()
4503 if (host->quirks2 & SDHCI_QUIRK2_HOST_NO_CMD23) in sdhci_setup_host()
4504 mmc->caps &= ~MMC_CAP_CMD23; in sdhci_setup_host()
4506 if (host->caps & SDHCI_CAN_DO_HISPD) in sdhci_setup_host()
4507 mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; in sdhci_setup_host()
4509 if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) && in sdhci_setup_host()
4512 mmc->caps |= MMC_CAP_NEEDS_POLL; in sdhci_setup_host()
4514 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_setup_host()
4516 ret = regulator_enable(mmc->supply.vqmmc); in sdhci_setup_host()
4517 host->sdhci_core_to_disable_vqmmc = !ret; in sdhci_setup_host()
4521 if (!regulator_is_supported_voltage(mmc->supply.vqmmc, 1700000, in sdhci_setup_host()
4523 host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | in sdhci_setup_host()
4528 if (!regulator_is_supported_voltage(mmc->supply.vqmmc, 2700000, in sdhci_setup_host()
4530 host->flags &= ~SDHCI_SIGNALING_330; in sdhci_setup_host()
4535 mmc->supply.vqmmc = ERR_PTR(-EINVAL); in sdhci_setup_host()
4540 if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V) { in sdhci_setup_host()
4541 host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | in sdhci_setup_host()
4544 * The SDHCI controller in a SoC might support HS200/HS400 in sdhci_setup_host()
4545 * (indicated using mmc-hs200-1_8v/mmc-hs400-1_8v dt property), in sdhci_setup_host()
4551 mmc->caps2 &= ~(MMC_CAP2_HSX00_1_8V | MMC_CAP2_HS400_ES); in sdhci_setup_host()
4552 mmc->caps &= ~(MMC_CAP_1_8V_DDR | MMC_CAP_UHS); in sdhci_setup_host()
4555 /* Any UHS-I mode in caps implies SDR12 and SDR25 support. */ in sdhci_setup_host()
4556 if (host->caps1 & (SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | in sdhci_setup_host()
4558 mmc->caps |= MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25; in sdhci_setup_host()
4561 if (host->caps1 & SDHCI_SUPPORT_SDR104) { in sdhci_setup_host()
4562 mmc->caps |= MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_SDR50; in sdhci_setup_host()
4566 if (!(host->quirks2 & SDHCI_QUIRK2_BROKEN_HS200)) in sdhci_setup_host()
4567 mmc->caps2 |= MMC_CAP2_HS200; in sdhci_setup_host()
4568 } else if (host->caps1 & SDHCI_SUPPORT_SDR50) { in sdhci_setup_host()
4569 mmc->caps |= MMC_CAP_UHS_SDR50; in sdhci_setup_host()
4572 if (host->quirks2 & SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 && in sdhci_setup_host()
4573 (host->caps1 & SDHCI_SUPPORT_HS400)) in sdhci_setup_host()
4574 mmc->caps2 |= MMC_CAP2_HS400; in sdhci_setup_host()
4576 if ((mmc->caps2 & MMC_CAP2_HSX00_1_2V) && in sdhci_setup_host()
4577 (IS_ERR(mmc->supply.vqmmc) || in sdhci_setup_host()
4578 !regulator_is_supported_voltage(mmc->supply.vqmmc, 1100000, in sdhci_setup_host()
4580 mmc->caps2 &= ~MMC_CAP2_HSX00_1_2V; in sdhci_setup_host()
4582 if ((host->caps1 & SDHCI_SUPPORT_DDR50) && in sdhci_setup_host()
4583 !(host->quirks2 & SDHCI_QUIRK2_BROKEN_DDR50)) in sdhci_setup_host()
4584 mmc->caps |= MMC_CAP_UHS_DDR50; in sdhci_setup_host()
4587 if (host->caps1 & SDHCI_USE_SDR50_TUNING) in sdhci_setup_host()
4588 host->flags |= SDHCI_SDR50_NEEDS_TUNING; in sdhci_setup_host()
4591 if (host->caps1 & SDHCI_DRIVER_TYPE_A) in sdhci_setup_host()
4592 mmc->caps |= MMC_CAP_DRIVER_TYPE_A; in sdhci_setup_host()
4593 if (host->caps1 & SDHCI_DRIVER_TYPE_C) in sdhci_setup_host()
4594 mmc->caps |= MMC_CAP_DRIVER_TYPE_C; in sdhci_setup_host()
4595 if (host->caps1 & SDHCI_DRIVER_TYPE_D) in sdhci_setup_host()
4596 mmc->caps |= MMC_CAP_DRIVER_TYPE_D; in sdhci_setup_host()
4598 /* Initial value for re-tuning timer count */ in sdhci_setup_host()
4599 host->tuning_count = FIELD_GET(SDHCI_RETUNING_TIMER_COUNT_MASK, in sdhci_setup_host()
4600 host->caps1); in sdhci_setup_host()
4603 * In case Re-tuning Timer is not disabled, the actual value of in sdhci_setup_host()
4604 * re-tuning timer will be 2 ^ (n - 1). in sdhci_setup_host()
4606 if (host->tuning_count) in sdhci_setup_host()
4607 host->tuning_count = 1 << (host->tuning_count - 1); in sdhci_setup_host()
4609 /* Re-tuning mode supported by the Host Controller */ in sdhci_setup_host()
4610 host->tuning_mode = FIELD_GET(SDHCI_RETUNING_MODE_MASK, host->caps1); in sdhci_setup_host()
4622 if (!max_current_caps && !IS_ERR(mmc->supply.vmmc)) { in sdhci_setup_host()
4623 int curr = regulator_get_current_limit(mmc->supply.vmmc); in sdhci_setup_host()
4638 if (host->caps & SDHCI_CAN_VDD_330) { in sdhci_setup_host()
4641 mmc->max_current_330 = FIELD_GET(SDHCI_MAX_CURRENT_330_MASK, in sdhci_setup_host()
4645 if (host->caps & SDHCI_CAN_VDD_300) { in sdhci_setup_host()
4648 mmc->max_current_300 = FIELD_GET(SDHCI_MAX_CURRENT_300_MASK, in sdhci_setup_host()
4652 if (host->caps & SDHCI_CAN_VDD_180) { in sdhci_setup_host()
4655 mmc->max_current_180 = FIELD_GET(SDHCI_MAX_CURRENT_180_MASK, in sdhci_setup_host()
4661 if (host->ocr_mask) in sdhci_setup_host()
4662 ocr_avail = host->ocr_mask; in sdhci_setup_host()
4665 if (mmc->ocr_avail) in sdhci_setup_host()
4666 ocr_avail = mmc->ocr_avail; in sdhci_setup_host()
4668 mmc->ocr_avail = ocr_avail; in sdhci_setup_host()
4669 mmc->ocr_avail_sdio = ocr_avail; in sdhci_setup_host()
4670 if (host->ocr_avail_sdio) in sdhci_setup_host()
4671 mmc->ocr_avail_sdio &= host->ocr_avail_sdio; in sdhci_setup_host()
4672 mmc->ocr_avail_sd = ocr_avail; in sdhci_setup_host()
4673 if (host->ocr_avail_sd) in sdhci_setup_host()
4674 mmc->ocr_avail_sd &= host->ocr_avail_sd; in sdhci_setup_host()
4676 mmc->ocr_avail_sd &= ~MMC_VDD_165_195; in sdhci_setup_host()
4677 mmc->ocr_avail_mmc = ocr_avail; in sdhci_setup_host()
4678 if (host->ocr_avail_mmc) in sdhci_setup_host()
4679 mmc->ocr_avail_mmc &= host->ocr_avail_mmc; in sdhci_setup_host()
4681 if (mmc->ocr_avail == 0) { in sdhci_setup_host()
4684 ret = -ENODEV; in sdhci_setup_host()
4688 if ((mmc->caps & (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | in sdhci_setup_host()
4691 (mmc->caps2 & (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V))) in sdhci_setup_host()
4692 host->flags |= SDHCI_SIGNALING_180; in sdhci_setup_host()
4694 if (mmc->caps2 & MMC_CAP2_HSX00_1_2V) in sdhci_setup_host()
4695 host->flags |= SDHCI_SIGNALING_120; in sdhci_setup_host()
4697 spin_lock_init(&host->lock); in sdhci_setup_host()
4704 mmc->max_req_size = 524288; in sdhci_setup_host()
4710 if (host->flags & SDHCI_USE_ADMA) { in sdhci_setup_host()
4711 mmc->max_segs = SDHCI_MAX_SEGS; in sdhci_setup_host()
4712 } else if (host->flags & SDHCI_USE_SDMA) { in sdhci_setup_host()
4713 mmc->max_segs = 1; in sdhci_setup_host()
4714 mmc->max_req_size = min_t(size_t, mmc->max_req_size, in sdhci_setup_host()
4717 mmc->max_segs = SDHCI_MAX_SEGS; in sdhci_setup_host()
4725 if (host->flags & SDHCI_USE_ADMA) { in sdhci_setup_host()
4726 if (host->quirks & SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC) { in sdhci_setup_host()
4727 host->max_adma = 65532; /* 32-bit alignment */ in sdhci_setup_host()
4728 mmc->max_seg_size = 65535; in sdhci_setup_host()
4730 mmc->max_seg_size = 65536; in sdhci_setup_host()
4733 mmc->max_seg_size = mmc->max_req_size; in sdhci_setup_host()
4740 if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) { in sdhci_setup_host()
4741 mmc->max_blk_size = 2; in sdhci_setup_host()
4743 mmc->max_blk_size = (host->caps & SDHCI_MAX_BLOCK_MASK) >> in sdhci_setup_host()
4745 if (mmc->max_blk_size >= 3) { in sdhci_setup_host()
4748 mmc->max_blk_size = 0; in sdhci_setup_host()
4752 mmc->max_blk_size = 512 << mmc->max_blk_size; in sdhci_setup_host()
4757 mmc->max_blk_count = (host->quirks & SDHCI_QUIRK_NO_MULTIBLOCK) ? 1 : 65535; in sdhci_setup_host()
4759 if (mmc->max_segs == 1) in sdhci_setup_host()
4760 /* This may alter mmc->*_blk_* parameters */ in sdhci_setup_host()
4766 if (host->sdhci_core_to_disable_vqmmc) in sdhci_setup_host()
4767 regulator_disable(mmc->supply.vqmmc); in sdhci_setup_host()
4769 if (host->align_buffer) in sdhci_setup_host()
4770 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_setup_host()
4771 host->adma_table_sz, host->align_buffer, in sdhci_setup_host()
4772 host->align_addr); in sdhci_setup_host()
4773 host->adma_table = NULL; in sdhci_setup_host()
4774 host->align_buffer = NULL; in sdhci_setup_host()
4782 struct mmc_host *mmc = host->mmc; in sdhci_cleanup_host()
4784 if (host->sdhci_core_to_disable_vqmmc) in sdhci_cleanup_host()
4785 regulator_disable(mmc->supply.vqmmc); in sdhci_cleanup_host()
4787 if (host->align_buffer) in sdhci_cleanup_host()
4788 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_cleanup_host()
4789 host->adma_table_sz, host->align_buffer, in sdhci_cleanup_host()
4790 host->align_addr); in sdhci_cleanup_host()
4792 if (host->use_external_dma) in sdhci_cleanup_host()
4795 host->adma_table = NULL; in sdhci_cleanup_host()
4796 host->align_buffer = NULL; in sdhci_cleanup_host()
4803 struct mmc_host *mmc = host->mmc; in __sdhci_add_host()
4806 if ((mmc->caps2 & MMC_CAP2_CQE) && in __sdhci_add_host()
4807 (host->quirks & SDHCI_QUIRK_BROKEN_CQE)) { in __sdhci_add_host()
4808 mmc->caps2 &= ~MMC_CAP2_CQE; in __sdhci_add_host()
4809 mmc->cqe_ops = NULL; in __sdhci_add_host()
4812 host->complete_wq = alloc_workqueue("sdhci", flags, 0); in __sdhci_add_host()
4813 if (!host->complete_wq) in __sdhci_add_host()
4814 return -ENOMEM; in __sdhci_add_host()
4816 INIT_WORK(&host->complete_work, sdhci_complete_work); in __sdhci_add_host()
4818 timer_setup(&host->timer, sdhci_timeout_timer, 0); in __sdhci_add_host()
4819 timer_setup(&host->data_timer, sdhci_timeout_data_timer, 0); in __sdhci_add_host()
4821 init_waitqueue_head(&host->buf_ready_int); in __sdhci_add_host()
4825 ret = request_threaded_irq(host->irq, sdhci_irq, sdhci_thread_irq, in __sdhci_add_host()
4829 mmc_hostname(mmc), host->irq, ret); in __sdhci_add_host()
4844 pr_info("%s: SDHCI controller on %s [%s] using %s\n", in __sdhci_add_host()
4845 mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)), in __sdhci_add_host()
4846 host->use_external_dma ? "External DMA" : in __sdhci_add_host()
4847 (host->flags & SDHCI_USE_ADMA) ? in __sdhci_add_host()
4848 (host->flags & SDHCI_USE_64_BIT_DMA) ? "ADMA 64-bit" : "ADMA" : in __sdhci_add_host()
4849 (host->flags & SDHCI_USE_SDMA) ? "DMA" : "PIO"); in __sdhci_add_host()
4861 free_irq(host->irq, host); in __sdhci_add_host()
4863 destroy_workqueue(host->complete_wq); in __sdhci_add_host()
4892 struct mmc_host *mmc = host->mmc; in sdhci_remove_host()
4896 spin_lock_irqsave(&host->lock, flags); in sdhci_remove_host()
4898 host->flags |= SDHCI_DEVICE_DEAD; in sdhci_remove_host()
4903 sdhci_error_out_mrqs(host, -ENOMEDIUM); in sdhci_remove_host()
4906 spin_unlock_irqrestore(&host->lock, flags); in sdhci_remove_host()
4920 free_irq(host->irq, host); in sdhci_remove_host()
4922 del_timer_sync(&host->timer); in sdhci_remove_host()
4923 del_timer_sync(&host->data_timer); in sdhci_remove_host()
4925 destroy_workqueue(host->complete_wq); in sdhci_remove_host()
4927 if (host->sdhci_core_to_disable_vqmmc) in sdhci_remove_host()
4928 regulator_disable(mmc->supply.vqmmc); in sdhci_remove_host()
4930 if (host->align_buffer) in sdhci_remove_host()
4931 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_remove_host()
4932 host->adma_table_sz, host->align_buffer, in sdhci_remove_host()
4933 host->align_addr); in sdhci_remove_host()
4935 if (host->use_external_dma) in sdhci_remove_host()
4938 host->adma_table = NULL; in sdhci_remove_host()
4939 host->align_buffer = NULL; in sdhci_remove_host()
4946 mmc_free_host(host->mmc); in sdhci_free_host()