1 // SPDX-License-Identifier: GPL-2.0-only
3  * sdhci-brcmstb.c Support for SDHCI on Broadcom BRCMSTB SoC's
15 #include "sdhci-cqhci.h"
16 #include "sdhci-pltfm.h"
62 	/* Reset will clear this, so re-enable it */  in brcmstb_reset()
63 	if (priv->flags & BRCMSTB_PRIV_FLAGS_GATE_CLOCK)  in brcmstb_reset()
73 	dev_dbg(mmc_dev(mmc), "%s(): Setting HS400-Enhanced-Strobe mode\n",  in sdhci_brcmstb_hs400es()
75 	reg = readl(host->ioaddr + SDHCI_VENDOR);  in sdhci_brcmstb_hs400es()
76 	if (ios->enhanced_strobe)  in sdhci_brcmstb_hs400es()
80 	writel(reg, host->ioaddr + SDHCI_VENDOR);  in sdhci_brcmstb_hs400es()
87 	host->mmc->actual_clock = 0;  in sdhci_brcmstb_set_clock()
89 	clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);  in sdhci_brcmstb_set_clock()
103 	dev_dbg(mmc_dev(host->mmc), "%s: Setting UHS signaling for %d timing\n",  in sdhci_brcmstb_set_uhs_signaling()
123 		ctrl_2 |= SDHCI_CTRL_HS400; /* Non-standard */  in sdhci_brcmstb_set_uhs_signaling()
184 	{ .compatible = "brcm,bcm7425-sdhci", .data = &match_priv_7425 },
185 	{ .compatible = "brcm,bcm7445-sdhci", .data = &match_priv_7445 },
186 	{ .compatible = "brcm,bcm7216-sdhci", .data = &match_priv_7216 },
198 	cqhci_irq(host->mmc, intmask, cmd_error, data_error);  in sdhci_brcmstb_cqhci_irq()
210 	if ((priv->flags & BRCMSTB_PRIV_FLAGS_HAS_CQE) == 0)  in sdhci_brcmstb_add_host()
213 	dev_dbg(mmc_dev(host->mmc), "CQE is enabled\n");  in sdhci_brcmstb_add_host()
214 	host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD;  in sdhci_brcmstb_add_host()
219 	cq_host = devm_kzalloc(mmc_dev(host->mmc),  in sdhci_brcmstb_add_host()
222 		ret = -ENOMEM;  in sdhci_brcmstb_add_host()
226 	cq_host->mmio = host->ioaddr + SDHCI_ARASAN_CQE_BASE_ADDR;  in sdhci_brcmstb_add_host()
227 	cq_host->ops = &sdhci_brcmstb_cqhci_ops;  in sdhci_brcmstb_add_host()
229 	dma64 = host->flags & SDHCI_USE_64_BIT_DMA;  in sdhci_brcmstb_add_host()
231 		dev_dbg(mmc_dev(host->mmc), "Using 64 bit DMA\n");  in sdhci_brcmstb_add_host()
232 		cq_host->caps |= CQHCI_TASK_DESC_SZ_128;  in sdhci_brcmstb_add_host()
235 	ret = cqhci_init(cq_host, host->mmc, dma64);  in sdhci_brcmstb_add_host()
263 	match = of_match_node(sdhci_brcm_of_match, pdev->dev.of_node);  in sdhci_brcmstb_probe()
264 	match_priv = match->data;  in sdhci_brcmstb_probe()
266 	dev_dbg(&pdev->dev, "Probe found match for %s\n",  match->compatible);  in sdhci_brcmstb_probe()
268 	clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);  in sdhci_brcmstb_probe()
270 		return dev_err_probe(&pdev->dev, PTR_ERR(clk),  in sdhci_brcmstb_probe()
274 	brcmstb_pdata.ops = match_priv->ops;  in sdhci_brcmstb_probe()
282 	if (device_property_read_bool(&pdev->dev, "supports-cqe")) {  in sdhci_brcmstb_probe()
283 		priv->flags |= BRCMSTB_PRIV_FLAGS_HAS_CQE;  in sdhci_brcmstb_probe()
284 		match_priv->ops->irq = sdhci_brcmstb_cqhci_irq;  in sdhci_brcmstb_probe()
287 	/* Map in the non-standard CFG registers */  in sdhci_brcmstb_probe()
288 	priv->cfg_regs = devm_platform_get_and_ioremap_resource(pdev, 1, NULL);  in sdhci_brcmstb_probe()
289 	if (IS_ERR(priv->cfg_regs)) {  in sdhci_brcmstb_probe()
290 		res = PTR_ERR(priv->cfg_regs);  in sdhci_brcmstb_probe()
295 	res = mmc_of_parse(host->mmc);  in sdhci_brcmstb_probe()
301 	 * voltage switch so only enable it for non-removable devices.  in sdhci_brcmstb_probe()
303 	if ((match_priv->flags & BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE) &&  in sdhci_brcmstb_probe()
304 	    (host->mmc->caps & MMC_CAP_NONREMOVABLE))  in sdhci_brcmstb_probe()
305 		priv->flags |= BRCMSTB_PRIV_FLAGS_GATE_CLOCK;  in sdhci_brcmstb_probe()
311 	if (match_priv->hs400es &&  in sdhci_brcmstb_probe()
312 	    (host->mmc->caps2 & MMC_CAP2_HS400_ES))  in sdhci_brcmstb_probe()
313 		host->mmc_host_ops.hs400_enhanced_strobe = match_priv->hs400es;  in sdhci_brcmstb_probe()
321 	if (match_priv->flags & BRCMSTB_MATCH_FLAGS_NO_64BIT)  in sdhci_brcmstb_probe()
322 		host->caps &= ~SDHCI_CAN_64BIT;  in sdhci_brcmstb_probe()
323 	host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 |  in sdhci_brcmstb_probe()
326 	if (match_priv->flags & BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT)  in sdhci_brcmstb_probe()
327 		host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;  in sdhci_brcmstb_probe()
329 	if (!(match_priv->flags & BRCMSTB_MATCH_FLAGS_USE_CARD_BUSY))  in sdhci_brcmstb_probe()
330 		host->mmc_host_ops.card_busy = NULL;  in sdhci_brcmstb_probe()
333 	if (device_property_read_u32(&pdev->dev, "clock-frequency",  in sdhci_brcmstb_probe()
334 				     &priv->base_freq_hz) != 0)  in sdhci_brcmstb_probe()
337 	base_clk = devm_clk_get_optional(&pdev->dev, "sdio_freq");  in sdhci_brcmstb_probe()
339 		dev_warn(&pdev->dev, "Clock for \"sdio_freq\" not found\n");  in sdhci_brcmstb_probe()
348 	clk_set_rate(base_clk, priv->base_freq_hz);  in sdhci_brcmstb_probe()
351 	host->caps &= ~SDHCI_CLOCK_V3_BASE_MASK;  in sdhci_brcmstb_probe()
352 	host->caps |= (actual_clock_mhz << SDHCI_CLOCK_BASE_SHIFT);  in sdhci_brcmstb_probe()
354 	host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;  in sdhci_brcmstb_probe()
356 	dev_dbg(&pdev->dev, "Base Clock Frequency changed to %dMHz\n",  in sdhci_brcmstb_probe()
358 	priv->base_clk = base_clk;  in sdhci_brcmstb_probe()
365 	pltfm_host->clk = clk;  in sdhci_brcmstb_probe()
376 	sdhci_pltfm_suspend(&pdev->dev);  in sdhci_brcmstb_shutdown()
388 	clk_disable_unprepare(priv->base_clk);  in sdhci_brcmstb_suspend()
400 	if (!ret && priv->base_freq_hz) {  in sdhci_brcmstb_resume()
401 		ret = clk_prepare_enable(priv->base_clk);  in sdhci_brcmstb_resume()
409 		    (clk_get_rate(priv->base_clk) != priv->base_freq_hz))  in sdhci_brcmstb_resume()
410 			ret = clk_set_rate(priv->base_clk, priv->base_freq_hz);  in sdhci_brcmstb_resume()
423 		.name	= "sdhci-brcmstb",
435 MODULE_DESCRIPTION("SDHCI driver for Broadcom BRCMSTB SoCs");