653 static void sdr_set_field(void __iomem *reg, u32 field, u32 val)  in sdr_set_field()  function
759 	sdr_set_field(host->base + MSDC_DMA_CFG, MSDC_DMA_CFG_DECSEN, 1);  in msdc_dma_setup()
765 		sdr_set_field(host->base + DMA_SA_H4BIT, DMA_ADDR_HIGH_4BIT,  in msdc_dma_setup()
829 	sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC,  in msdc_set_timeout()
838 	sdr_set_field(host->base + SDC_CFG, SDC_CFG_WRDTOC,  in msdc_set_busy_timeout()
943 		sdr_set_field(host->base + MSDC_CFG,  in msdc_set_mclk()
947 		sdr_set_field(host->base + MSDC_CFG,  in msdc_set_mclk()
993 		sdr_set_field(host->base + tune_reg,  in msdc_set_mclk()
1095 	sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_START, 1);  in msdc_start_data()
1417 		sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_STOP,  in msdc_data_xfer_done()
1715 		sdr_set_field(host->base + MSDC_PS, MSDC_PS_CDDEBOUNCE,  in msdc_init_hw()
1733 	sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0);  in msdc_init_hw()
1735 	sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);  in msdc_init_hw()
1740 		sdr_set_field(host->base + MSDC_PATCH_BIT1,  in msdc_init_hw()
1752 		sdr_set_field(host->base + MSDC_PATCH_BIT2,  in msdc_init_hw()
1762 			sdr_set_field(host->base + MSDC_PATCH_BIT2,  in msdc_init_hw()
1764 			sdr_set_field(host->base + MSDC_PATCH_BIT2,  in msdc_init_hw()
1814 	sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, 3);  in msdc_init_hw()
1990 		sdr_set_field(host->top_base + EMMC_TOP_CMD, PAD_CMD_RXDLY,  in msdc_set_cmd_delay()
1993 		sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRDLY,  in msdc_set_cmd_delay()
2002 		sdr_set_field(host->top_base + EMMC_TOP_CONTROL,  in msdc_set_data_delay()
2005 		sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_DATRRDLY,  in msdc_set_data_delay()
2023 		sdr_set_field(host->base + tune_reg,  in msdc_tune_response()
2088 		sdr_set_field(host->base + tune_reg,  in msdc_tune_response()
2096 	sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRRDLY,  in msdc_tune_response()
2114 	sdr_set_field(host->base + MSDC_PATCH_BIT1, MSDC_PATCH_BIT1_CMDTA, 2);  in hs400_tune_response()
2118 		sdr_set_field(host->base + MSDC_PAD_TUNE,  in hs400_tune_response()
2127 		sdr_set_field(host->base + PAD_CMD_TUNE,  in hs400_tune_response()
2145 	sdr_set_field(host->base + PAD_CMD_TUNE, PAD_CMD_TUNE_RX_DLY3,  in hs400_tune_response()
2161 	sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL,  in msdc_tune_data()
2216 	sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL,  in msdc_tune_together()
2319 			sdr_set_field(host->top_base + EMMC50_PAD_DS_TUNE,  in msdc_prepare_hs400_tuning()
2326 			sdr_set_field(host->base + PAD_DS_TUNE,  in msdc_prepare_hs400_tuning()
2334 	sdr_set_field(host->base + EMMC50_CFG3, EMMC50_CFG3_OUTS_WR, 2);  in msdc_prepare_hs400_tuning()
2360 			sdr_set_field(host->top_base + EMMC50_PAD_DS_TUNE,  in msdc_execute_hs400_tuning()
2363 			sdr_set_field(host->base + PAD_DS_TUNE,  in msdc_execute_hs400_tuning()
2379 		sdr_set_field(host->top_base + EMMC50_PAD_DS_TUNE,  in msdc_execute_hs400_tuning()
2382 		sdr_set_field(host->base + PAD_DS_TUNE,  in msdc_execute_hs400_tuning()
2443 		sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_PADCMD_LATCHCK, 1);  in msdc_hs400_enhanced_strobe()
2444 		sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_CMD_RESP_SEL, 1);  in msdc_hs400_enhanced_strobe()
2445 		sdr_set_field(host->base + EMMC50_CFG1, EMMC50_CFG1_DS_CFG, 1);  in msdc_hs400_enhanced_strobe()
2451 		sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_PADCMD_LATCHCK, 0);  in msdc_hs400_enhanced_strobe()
2452 		sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_CMD_RESP_SEL, 0);  in msdc_hs400_enhanced_strobe()
2453 		sdr_set_field(host->base + EMMC50_CFG1, EMMC50_CFG1_DS_CFG, 0);  in msdc_hs400_enhanced_strobe()
2457 		sdr_set_field(host->base + EMMC51_CFG0, CMDQ_RDAT_CNT, 0xb4);  in msdc_hs400_enhanced_strobe()
2532 		sdr_set_field(host->base + MSDC_DMA_CTRL,  in msdc_cqe_disable()