603 	writel(readl(host->base + MMCIMASK0) | MCI_DATAENDMASK,  in mmci_dma_start()
604 	       host->base + MMCIMASK0);  in mmci_dma_start()
645 		unsigned int mask0 = readl(base + MMCIMASK0);  in mmci_set_mask1()
650 		writel(mask0, base + MMCIMASK0);  in mmci_set_mask1()
693 	writel(readl(base + MMCIMASK0) &  in ux500_busy_clear_mask_done()
694 	       ~host->variant->busy_detect_mask, base + MMCIMASK0);  in ux500_busy_clear_mask_done()
757 				writel(readl(base + MMCIMASK0) |  in ux500_busy_complete()
759 				       base + MMCIMASK0);  in ux500_busy_complete()
1311 	writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0);  in mmci_start_data()
1758 		writel(readl(base + MMCIMASK0) | MCI_DATAENDMASK, base + MMCIMASK0);  in mmci_pio_irq()
1791 		status &= readl(host->base + MMCIMASK0);  in mmci_irq()
1843 	       host->base + MMCIMASK0);  in mmci_irq_thread()
2362 	writel(0, host->base + MMCIMASK0);  in mmci_probe()
2405 	writel(MCI_IRQENABLE | variant->start_err, host->base + MMCIMASK0);  in mmci_probe()
2449 		writel(0, host->base + MMCIMASK0);  in mmci_remove()
2470 	writel(0, host->base + MMCIMASK0);  in mmci_save()
2493 	       host->base + MMCIMASK0);  in mmci_restore()