16  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
55  * Control block status and exception codes
75  * Structure used to fetch exception detail for CBs that terminate with
98     /* DW 0  - low */
108     /* DW 0  - high */
117     /* DW 2-6 */
190 /* GAMIR - AMOs with implicit operands */
191 #define EOP_IR_FETCH	0x01 /* Plain fetch of memory */
192 #define EOP_IR_CLR	0x02 /* Fetch and clear */
193 #define EOP_IR_INC	0x05 /* Fetch and increment */
194 #define EOP_IR_DEC	0x07 /* Fetch and decrement */
198 /* GAMIRR - Registered AMOs with implicit operands */
199 #define EOP_IRR_FETCH	0x01 /* Registered fetch of memory */
200 #define EOP_IRR_CLR	0x02 /* Registered fetch and clear */
201 #define EOP_IRR_INC	0x05 /* Registered fetch and increment */
202 #define EOP_IRR_DEC	0x07 /* Registered fetch and decrement */
203 #define EOP_IRR_DECZ	0x0f /* Registered fetch and decrement, update on zero*/
205 /* GAMER - AMOs with explicit operands */
214 /* GAMERR - Registered AMOs with explicit operands */
224 /* GAMXR - SGI Arithmetic unit */
230 #define XTYPE_S		0x1	/* short (2-byte) */
231 #define XTYPE_W		0x2	/* word (4-byte) */
232 #define XTYPE_DW	0x3	/* doubleword (8-byte) */
233 #define XTYPE_CL	0x6	/* cacheline (64-byte) */
239 #define IAA_MMIO	0x1	/* noncoherent memory-mapped I/O space */
240 #define IAA_REGISTER	0x3	/* memory-mapped registers, etc. */
356  *     	- nelem and stride are in elements
357  *     	- tri0/tri1 is in bytes for the beginning of the data segment.
364 	ins->baddr0 = (long)gpa | ((unsigned long)iaa << 62);  in gru_vload_phys()
365 	ins->nelem = 1;  in gru_vload_phys()
366 	ins->op1_stride = 1;  in gru_vload_phys()
376 	ins->baddr0 = (long)gpa | ((unsigned long)iaa << 62);  in gru_vstore_phys()
377 	ins->nelem = 1;  in gru_vstore_phys()
378 	ins->op1_stride = 1;  in gru_vstore_phys()
389 	ins->baddr0 = (long)mem_addr;  in gru_vload()
390 	ins->nelem = nelem;  in gru_vload()
391 	ins->op1_stride = stride;  in gru_vload()
402 	ins->baddr0 = (long)mem_addr;  in gru_vstore()
403 	ins->nelem = nelem;  in gru_vstore()
404 	ins->op1_stride = stride;  in gru_vstore()
415 	ins->baddr0 = (long)mem_addr;  in gru_ivload()
416 	ins->nelem = nelem;  in gru_ivload()
417 	ins->tri1_bufsize = tri1;  in gru_ivload()
428 	ins->baddr0 = (long)mem_addr;  in gru_ivstore()
429 	ins->nelem = nelem;  in gru_ivstore()
430 	ins->tri1_bufsize = tri1;  in gru_ivstore()
441 	ins->baddr0 = (long)mem_addr;  in gru_vset()
442 	ins->op2_value_baddr1 = value;  in gru_vset()
443 	ins->nelem = nelem;  in gru_vset()
444 	ins->op1_stride = stride;  in gru_vset()
455 	ins->baddr0 = (long)mem_addr;  in gru_ivset()
456 	ins->op2_value_baddr1 = value;  in gru_ivset()
457 	ins->nelem = nelem;  in gru_ivset()
458 	ins->tri1_bufsize = tri1;  in gru_ivset()
469 	ins->baddr0 = (long)mem_addr;  in gru_vflush()
470 	ins->op1_stride = stride;  in gru_vflush()
471 	ins->nelem = nelem;  in gru_vflush()
491 	ins->baddr0 = (long)src;  in gru_bcopy()
492 	ins->op2_value_baddr1 = (long)dest;  in gru_bcopy()
493 	ins->nelem = nelem;  in gru_bcopy()
494 	ins->tri1_bufsize = bufsize;  in gru_bcopy()
505 	ins->baddr0 = (long)src;  in gru_bstore()
506 	ins->op2_value_baddr1 = (long)dest;  in gru_bstore()
507 	ins->nelem = nelem;  in gru_bstore()
517 	ins->baddr0 = (long)src;  in gru_gamir()
527 	ins->baddr0 = (long)src;  in gru_gamirr()
539 	ins->baddr0 = (long)src;  in gru_gamer()
540 	ins->op1_stride = operand1;  in gru_gamer()
541 	ins->op2_value_baddr1 = operand2;  in gru_gamer()
552 	ins->baddr0 = (long)src;  in gru_gamerr()
553 	ins->op1_stride = operand1;  in gru_gamerr()
554 	ins->op2_value_baddr1 = operand2;  in gru_gamerr()
564 	ins->baddr0 = (long)src;  in gru_gamxr()
565 	ins->nelem = 4;  in gru_gamxr()
576 	ins->baddr0 = (long)queue;  in gru_mesq()
577 	ins->nelem = nelem;  in gru_mesq()
586 	return ins->avalue;  in gru_get_amo_value()
593 	return ins->avalue & 0xffffffff;  in gru_get_amo_value_head()
600 	return ins->avalue >> 32;  in gru_get_amo_value_limit()
622  * Control block definition for checking status
640 	return cbs->istatus;  in gru_get_cb_status()
648 	return cbs->isubstatus & CBSS_MSG_QUEUE_MASK;  in gru_get_cb_message_queue_substatus()
656 	return cbs->isubstatus;  in gru_get_cb_substatus()
670 	ret = cbs->istatus;  in gru_check_status()
690  * mean TLB mis - only fatal errors such as memory parity error or user
700  * 	p	- Any valid pointer within the gseg
704 	return (void *)((unsigned long)p & ~(GRU_GSEG_PAGESIZE - 1));  in gru_get_gseg_pointer()
708  * Get a pointer to a control block
709  * 	gseg	- GSeg address returned from gru_get_thread_gru_segment()
710  * 	index	- index of desired CB
720  * 	gseg	- GSeg address returned from gru_get_thread_gru_segment()
721  * 	index	- index of desired cache line
730  * 	vaddr		- virtual address of within gseg
734 	return ((unsigned long)vaddr & (GRU_GSEG_PAGESIZE - 1)) - GRU_DS_BASE;  in gru_get_tri()