895 	u32 msg_slots;  in mei_cl_irq_disconnect()
904 	if ((u32)slots < msg_slots)  in mei_cl_irq_disconnect()
1088 	u32 msg_slots;  in mei_cl_irq_connect()
1100 	if ((u32)slots < msg_slots)  in mei_cl_irq_connect()
1485 	u32 msg_slots;  in mei_cl_irq_notify()
1495 	if ((u32)slots < msg_slots)  in mei_cl_irq_notify()
1849 	u32 dr_slots;  in mei_cl_irq_write()
1850 	u32 dma_len;  in mei_cl_irq_write()
1913 	} else if ((u32)hbuf_slots == mei_hbuf_depth(dev)) {  in mei_cl_irq_write()
1975 	u32 dr_slots;  in mei_cl_write()
1976 	u32 dma_len;  in mei_cl_write()
2215 	u32 msg_slots;  in mei_cl_irq_dma_map()
2224 	if ((u32)slots < msg_slots)  in mei_cl_irq_dma_map()
2251 	u32 msg_slots;  in mei_cl_irq_dma_unmap()
2260 	if ((u32)slots < msg_slots)  in mei_cl_irq_dma_unmap()