Lines Matching full:pcr
19 static u8 rts5228_get_ic_version(struct rtsx_pcr *pcr) in rts5228_get_ic_version() argument
23 rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val); in rts5228_get_ic_version()
27 static void rts5228_fill_driving(struct rtsx_pcr *pcr, u8 voltage) in rts5228_fill_driving() argument
45 drive_sel = pcr->sd30_drive_sel_3v3; in rts5228_fill_driving()
48 drive_sel = pcr->sd30_drive_sel_1v8; in rts5228_fill_driving()
51 rtsx_pci_write_register(pcr, SD30_CLK_DRIVE_SEL, in rts5228_fill_driving()
54 rtsx_pci_write_register(pcr, SD30_CMD_DRIVE_SEL, in rts5228_fill_driving()
57 rtsx_pci_write_register(pcr, SD30_DAT_DRIVE_SEL, in rts5228_fill_driving()
61 static void rtsx5228_fetch_vendor_settings(struct rtsx_pcr *pcr) in rtsx5228_fetch_vendor_settings() argument
63 struct pci_dev *pdev = pcr->pci; in rtsx5228_fetch_vendor_settings()
68 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); in rtsx5228_fetch_vendor_settings()
71 pcr_dbg(pcr, "skip fetch vendor setting\n"); in rtsx5228_fetch_vendor_settings()
74 pcr->sd30_drive_sel_1v8 = rtsx_reg_to_sd30_drive_sel_1v8(reg); in rtsx5228_fetch_vendor_settings()
75 pcr->aspm_en = rtsx_reg_to_aspm(reg); in rtsx5228_fetch_vendor_settings()
79 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); in rtsx5228_fetch_vendor_settings()
81 pcr->rtd3_en = rtsx_reg_to_rtd3(reg); in rtsx5228_fetch_vendor_settings()
83 pcr->extra_caps |= EXTRA_CAPS_NO_MMC; in rtsx5228_fetch_vendor_settings()
84 pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg); in rtsx5228_fetch_vendor_settings()
86 pcr->flags |= PCR_REVERSE_SOCKET; in rtsx5228_fetch_vendor_settings()
89 static int rts5228_optimize_phy(struct rtsx_pcr *pcr) in rts5228_optimize_phy() argument
91 return rtsx_pci_write_phy_register(pcr, 0x07, 0x8F40); in rts5228_optimize_phy()
94 static void rts5228_force_power_down(struct rtsx_pcr *pcr, u8 pm_state, bool runtime) in rts5228_force_power_down() argument
97 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, MASK_8_BIT_DEF, 0); in rts5228_force_power_down()
98 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 2, MASK_8_BIT_DEF, 0); in rts5228_force_power_down()
99 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3, in rts5228_force_power_down()
102 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, in rts5228_force_power_down()
106 rtsx_pci_write_register(pcr, RTS5228_AUTOLOAD_CFG1, in rts5228_force_power_down()
108 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x00); in rts5228_force_power_down()
109 rtsx_pci_write_register(pcr, RTS5228_REG_PME_FORCE_CTL, in rts5228_force_power_down()
113 rtsx_pci_write_register(pcr, FPDCTL, in rts5228_force_power_down()
117 static int rts5228_enable_auto_blink(struct rtsx_pcr *pcr) in rts5228_enable_auto_blink() argument
119 return rtsx_pci_write_register(pcr, OLT_LED_CTL, in rts5228_enable_auto_blink()
123 static int rts5228_disable_auto_blink(struct rtsx_pcr *pcr) in rts5228_disable_auto_blink() argument
125 return rtsx_pci_write_register(pcr, OLT_LED_CTL, in rts5228_disable_auto_blink()
129 static int rts5228_turn_on_led(struct rtsx_pcr *pcr) in rts5228_turn_on_led() argument
131 return rtsx_pci_write_register(pcr, GPIO_CTL, in rts5228_turn_on_led()
135 static int rts5228_turn_off_led(struct rtsx_pcr *pcr) in rts5228_turn_off_led() argument
137 return rtsx_pci_write_register(pcr, GPIO_CTL, in rts5228_turn_off_led()
167 static int rts5228_sd_set_sample_push_timing_sd30(struct rtsx_pcr *pcr) in rts5228_sd_set_sample_push_timing_sd30() argument
169 rtsx_pci_write_register(pcr, SD_CFG1, SD_MODE_SELECT_MASK in rts5228_sd_set_sample_push_timing_sd30()
171 rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ); in rts5228_sd_set_sample_push_timing_sd30()
172 rtsx_pci_write_register(pcr, CARD_CLK_SOURCE, 0xFF, in rts5228_sd_set_sample_push_timing_sd30()
174 rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rts5228_sd_set_sample_push_timing_sd30()
179 static int rts5228_card_power_on(struct rtsx_pcr *pcr, int card) in rts5228_card_power_on() argument
181 struct rtsx_cr_option *option = &pcr->option; in rts5228_card_power_on()
184 rtsx_pci_enable_ocp(pcr); in rts5228_card_power_on()
186 rtsx_pci_write_register(pcr, REG_CRC_DUMMY_0, in rts5228_card_power_on()
189 rtsx_pci_write_register(pcr, RTS5228_LDO1_CFG1, in rts5228_card_power_on()
192 rtsx_pci_write_register(pcr, RTS5228_LDO1233318_POW_CTL, in rts5228_card_power_on()
195 rtsx_pci_write_register(pcr, RTS5228_LDO1233318_POW_CTL, in rts5228_card_power_on()
199 rtsx_pci_write_register(pcr, RTS5228_LDO1233318_POW_CTL, in rts5228_card_power_on()
204 rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, SD_OUTPUT_EN); in rts5228_card_power_on()
207 rtsx_pci_write_register(pcr, SD_CFG1, 0xFF, in rts5228_card_power_on()
210 rtsx_pci_write_register(pcr, SD_SAMPLE_POINT_CTL, in rts5228_card_power_on()
212 rtsx_pci_write_register(pcr, SD_PUSH_POINT_CTL, 0xFF, 0); in rts5228_card_power_on()
213 rtsx_pci_write_register(pcr, CARD_STOP, SD_STOP | SD_CLR_ERR, in rts5228_card_power_on()
217 rtsx_pci_write_register(pcr, SD_CFG3, SD30_CLK_END_EN, 0); in rts5228_card_power_on()
218 rtsx_pci_write_register(pcr, REG_SD_STOP_SDCLK_CFG, in rts5228_card_power_on()
222 if (pcr->extra_caps & EXTRA_CAPS_SD_SDR50 || in rts5228_card_power_on()
223 pcr->extra_caps & EXTRA_CAPS_SD_SDR104) in rts5228_card_power_on()
224 rts5228_sd_set_sample_push_timing_sd30(pcr); in rts5228_card_power_on()
229 static int rts5228_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) in rts5228_switch_output_voltage() argument
234 rtsx_pci_write_register(pcr, RTS5228_CARD_PWR_CTL, in rts5228_switch_output_voltage()
239 rtsx_pci_read_phy_register(pcr, PHY_TUNE, &val); in rts5228_switch_output_voltage()
241 err = rtsx_pci_write_phy_register(pcr, PHY_TUNE, val); in rts5228_switch_output_voltage()
245 rtsx_pci_write_register(pcr, RTS5228_DV3318_CFG, in rts5228_switch_output_voltage()
247 rtsx_pci_write_register(pcr, SD_PAD_CTL, in rts5228_switch_output_voltage()
251 rtsx_pci_read_phy_register(pcr, PHY_TUNE, &val); in rts5228_switch_output_voltage()
253 err = rtsx_pci_write_phy_register(pcr, PHY_TUNE, val); in rts5228_switch_output_voltage()
257 rtsx_pci_write_register(pcr, RTS5228_DV3318_CFG, in rts5228_switch_output_voltage()
259 rtsx_pci_write_register(pcr, SD_PAD_CTL, in rts5228_switch_output_voltage()
267 rts5228_fill_driving(pcr, voltage); in rts5228_switch_output_voltage()
272 static void rts5228_stop_cmd(struct rtsx_pcr *pcr) in rts5228_stop_cmd() argument
274 rtsx_pci_writel(pcr, RTSX_HCBCTLR, STOP_CMD); in rts5228_stop_cmd()
275 rtsx_pci_writel(pcr, RTSX_HDBCTLR, STOP_DMA); in rts5228_stop_cmd()
276 rtsx_pci_write_register(pcr, RTS5260_DMA_RST_CTL_0, in rts5228_stop_cmd()
279 rtsx_pci_write_register(pcr, RBCTL, RB_FLUSH, RB_FLUSH); in rts5228_stop_cmd()
282 static void rts5228_card_before_power_off(struct rtsx_pcr *pcr) in rts5228_card_before_power_off() argument
284 rts5228_stop_cmd(pcr); in rts5228_card_before_power_off()
285 rts5228_switch_output_voltage(pcr, OUTPUT_3V3); in rts5228_card_before_power_off()
288 static void rts5228_enable_ocp(struct rtsx_pcr *pcr) in rts5228_enable_ocp() argument
293 rtsx_pci_write_register(pcr, REG_OCPCTL, 0xFF, val); in rts5228_enable_ocp()
294 rtsx_pci_write_register(pcr, RTS5228_LDO1_CFG0, in rts5228_enable_ocp()
299 static void rts5228_disable_ocp(struct rtsx_pcr *pcr) in rts5228_disable_ocp() argument
304 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0); in rts5228_disable_ocp()
305 rtsx_pci_write_register(pcr, RTS5228_LDO1_CFG0, in rts5228_disable_ocp()
309 static int rts5228_card_power_off(struct rtsx_pcr *pcr, int card) in rts5228_card_power_off() argument
313 rts5228_card_before_power_off(pcr); in rts5228_card_power_off()
314 err = rtsx_pci_write_register(pcr, RTS5228_LDO1233318_POW_CTL, in rts5228_card_power_off()
316 rtsx_pci_write_register(pcr, REG_CRC_DUMMY_0, CFG_SD_POW_AUTO_PD, 0); in rts5228_card_power_off()
318 if (pcr->option.ocp_en) in rts5228_card_power_off()
319 rtsx_pci_disable_ocp(pcr); in rts5228_card_power_off()
324 static void rts5228_init_ocp(struct rtsx_pcr *pcr) in rts5228_init_ocp() argument
326 struct rtsx_cr_option *option = &pcr->option; in rts5228_init_ocp()
331 rtsx_pci_write_register(pcr, RTS5228_LDO1_CFG0, in rts5228_init_ocp()
335 rtsx_pci_write_register(pcr, RTS5228_LDO1_CFG0, in rts5228_init_ocp()
338 rtsx_pci_write_register(pcr, RTS5228_LDO1_CFG0, in rts5228_init_ocp()
342 rtsx_pci_read_register(pcr, RTS5228_LDO1_CFG0, &val); in rts5228_init_ocp()
345 val = pcr->hw_param.ocp_glitch; in rts5228_init_ocp()
346 rtsx_pci_write_register(pcr, REG_OCPGLITCH, mask, val); in rts5228_init_ocp()
348 rts5228_enable_ocp(pcr); in rts5228_init_ocp()
351 rtsx_pci_write_register(pcr, RTS5228_LDO1_CFG0, in rts5228_init_ocp()
356 static void rts5228_clear_ocpstat(struct rtsx_pcr *pcr) in rts5228_clear_ocpstat() argument
364 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, val); in rts5228_clear_ocpstat()
367 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0); in rts5228_clear_ocpstat()
371 static void rts5228_process_ocp(struct rtsx_pcr *pcr) in rts5228_process_ocp() argument
373 if (!pcr->option.ocp_en) in rts5228_process_ocp()
376 rtsx_pci_get_ocpstat(pcr, &pcr->ocp_stat); in rts5228_process_ocp()
378 if (pcr->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) { in rts5228_process_ocp()
379 rts5228_clear_ocpstat(pcr); in rts5228_process_ocp()
380 rts5228_card_power_off(pcr, RTSX_SD_CARD); in rts5228_process_ocp()
381 rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, 0); in rts5228_process_ocp()
382 pcr->ocp_stat = 0; in rts5228_process_ocp()
387 static void rts5228_init_from_cfg(struct rtsx_pcr *pcr) in rts5228_init_from_cfg() argument
389 struct rtsx_cr_option *option = &pcr->option; in rts5228_init_from_cfg()
391 if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN in rts5228_init_from_cfg()
393 rtsx_pci_disable_oobs_polling(pcr); in rts5228_init_from_cfg()
395 rtsx_pci_enable_oobs_polling(pcr); in rts5228_init_from_cfg()
397 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0xFF, 0); in rts5228_init_from_cfg()
401 rtsx_set_ltr_latency(pcr, option->ltr_active_latency); in rts5228_init_from_cfg()
405 static int rts5228_extra_init_hw(struct rtsx_pcr *pcr) in rts5228_extra_init_hw() argument
407 struct rtsx_cr_option *option = &pcr->option; in rts5228_extra_init_hw()
409 rtsx_pci_write_register(pcr, RTS5228_AUTOLOAD_CFG1, in rts5228_extra_init_hw()
412 rts5228_init_from_cfg(pcr); in rts5228_extra_init_hw()
414 rtsx_pci_write_register(pcr, L1SUB_CONFIG1, in rts5228_extra_init_hw()
416 rtsx_pci_write_register(pcr, L1SUB_CONFIG3, 0xFF, 0); in rts5228_extra_init_hw()
418 rtsx_pci_write_register(pcr, FUNC_FORCE_CTL, in rts5228_extra_init_hw()
421 rtsx_pci_write_register(pcr, PCLK_CTL, in rts5228_extra_init_hw()
424 rtsx_pci_write_register(pcr, PM_EVENT_DEBUG, PME_DEBUG_0, PME_DEBUG_0); in rts5228_extra_init_hw()
425 rtsx_pci_write_register(pcr, PM_CLK_FORCE_CTL, CLK_PM_EN, CLK_PM_EN); in rts5228_extra_init_hw()
428 rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x0F, 0x02); in rts5228_extra_init_hw()
431 rts5228_fill_driving(pcr, OUTPUT_3V3); in rts5228_extra_init_hw()
433 if (pcr->flags & PCR_REVERSE_SOCKET) in rts5228_extra_init_hw()
434 rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x30); in rts5228_extra_init_hw()
436 rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00); in rts5228_extra_init_hw()
443 rtsx_pci_write_register(pcr, PETXCFG, in rts5228_extra_init_hw()
446 rtsx_pci_write_register(pcr, PETXCFG, in rts5228_extra_init_hw()
449 rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB); in rts5228_extra_init_hw()
451 if (pcr->rtd3_en) { in rts5228_extra_init_hw()
452 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x01); in rts5228_extra_init_hw()
453 rtsx_pci_write_register(pcr, RTS5228_REG_PME_FORCE_CTL, in rts5228_extra_init_hw()
457 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x00); in rts5228_extra_init_hw()
458 rtsx_pci_write_register(pcr, RTS5228_REG_PME_FORCE_CTL, in rts5228_extra_init_hw()
461 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, D3_DELINK_MODE_EN, 0x00); in rts5228_extra_init_hw()
466 static void rts5228_enable_aspm(struct rtsx_pcr *pcr, bool enable) in rts5228_enable_aspm() argument
470 if (pcr->aspm_enabled == enable) in rts5228_enable_aspm()
475 val |= (pcr->aspm_en & 0x02); in rts5228_enable_aspm()
476 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, mask, val); in rts5228_enable_aspm()
477 pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL, in rts5228_enable_aspm()
478 PCI_EXP_LNKCTL_ASPMC, pcr->aspm_en); in rts5228_enable_aspm()
479 pcr->aspm_enabled = enable; in rts5228_enable_aspm()
482 static void rts5228_disable_aspm(struct rtsx_pcr *pcr, bool enable) in rts5228_disable_aspm() argument
486 if (pcr->aspm_enabled == enable) in rts5228_disable_aspm()
489 pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL, in rts5228_disable_aspm()
493 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, mask, val); in rts5228_disable_aspm()
494 rtsx_pci_write_register(pcr, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0); in rts5228_disable_aspm()
496 pcr->aspm_enabled = enable; in rts5228_disable_aspm()
499 static void rts5228_set_aspm(struct rtsx_pcr *pcr, bool enable) in rts5228_set_aspm() argument
502 rts5228_enable_aspm(pcr, true); in rts5228_set_aspm()
504 rts5228_disable_aspm(pcr, false); in rts5228_set_aspm()
507 static void rts5228_set_l1off_cfg_sub_d0(struct rtsx_pcr *pcr, int active) in rts5228_set_l1off_cfg_sub_d0() argument
509 struct rtsx_cr_option *option = &pcr->option; in rts5228_set_l1off_cfg_sub_d0()
513 aspm_L1_1 = rtsx_check_dev_flag(pcr, ASPM_L1_1_EN); in rts5228_set_l1off_cfg_sub_d0()
514 aspm_L1_2 = rtsx_check_dev_flag(pcr, ASPM_L1_2_EN); in rts5228_set_l1off_cfg_sub_d0()
526 rtsx_set_l1off_sub(pcr, val); in rts5228_set_l1off_cfg_sub_d0()
557 int rts5228_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock, in rts5228_pci_switch_clock() argument
577 err = rtsx_pci_write_register(pcr, SD_CFG1, in rts5228_pci_switch_clock()
583 pcr_dbg(pcr, "Switch card clock to %dMHz\n", card_clock); in rts5228_pci_switch_clock()
588 pcr_dbg(pcr, "Internal SSC clock: %dMHz (cur_clock = %d)\n", in rts5228_pci_switch_clock()
589 clk, pcr->cur_clock); in rts5228_pci_switch_clock()
591 if (clk == pcr->cur_clock) in rts5228_pci_switch_clock()
594 if (pcr->ops->conv_clk_and_div_n) in rts5228_pci_switch_clock()
595 n = pcr->ops->conv_clk_and_div_n(clk, CLK_TO_DIV_N); in rts5228_pci_switch_clock()
607 if (pcr->ops->conv_clk_and_div_n) { in rts5228_pci_switch_clock()
608 int dbl_clk = pcr->ops->conv_clk_and_div_n(n, in rts5228_pci_switch_clock()
610 n = pcr->ops->conv_clk_and_div_n(dbl_clk, in rts5228_pci_switch_clock()
619 pcr_dbg(pcr, "n = %d, div = %d\n", n, div); in rts5228_pci_switch_clock()
645 pcr_dbg(pcr, "ssc_depth = %d\n", ssc_depth); in rts5228_pci_switch_clock()
647 rtsx_pci_init_cmd(pcr); in rts5228_pci_switch_clock()
648 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in rts5228_pci_switch_clock()
650 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, in rts5228_pci_switch_clock()
652 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); in rts5228_pci_switch_clock()
653 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, in rts5228_pci_switch_clock()
655 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n); in rts5228_pci_switch_clock()
656 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB); in rts5228_pci_switch_clock()
658 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rts5228_pci_switch_clock()
660 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK1_CTL, in rts5228_pci_switch_clock()
662 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rts5228_pci_switch_clock()
664 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK1_CTL, in rts5228_pci_switch_clock()
668 err = rtsx_pci_send_cmd(pcr, 2000); in rts5228_pci_switch_clock()
674 err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rts5228_pci_switch_clock()
678 pcr->cur_clock = clk; in rts5228_pci_switch_clock()
683 void rts5228_init_params(struct rtsx_pcr *pcr) in rts5228_init_params() argument
685 struct rtsx_cr_option *option = &pcr->option; in rts5228_init_params()
686 struct rtsx_hw_param *hw_param = &pcr->hw_param; in rts5228_init_params()
688 pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104; in rts5228_init_params()
689 pcr->num_slots = 1; in rts5228_init_params()
690 pcr->ops = &rts5228_pcr_ops; in rts5228_init_params()
692 pcr->flags = 0; in rts5228_init_params()
693 pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT; in rts5228_init_params()
694 pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_B; in rts5228_init_params()
695 pcr->sd30_drive_sel_3v3 = CFG_DRIVER_TYPE_B; in rts5228_init_params()
696 pcr->aspm_en = ASPM_L1_EN; in rts5228_init_params()
697 pcr->aspm_mode = ASPM_MODE_REG; in rts5228_init_params()
698 pcr->tx_initial_phase = SET_CLOCK_PHASE(28, 27, 11); in rts5228_init_params()
699 pcr->rx_initial_phase = SET_CLOCK_PHASE(24, 6, 5); in rts5228_init_params()
701 pcr->ic_version = rts5228_get_ic_version(pcr); in rts5228_init_params()
702 pcr->sd_pull_ctl_enable_tbl = rts5228_sd_pull_ctl_enable_tbl; in rts5228_init_params()
703 pcr->sd_pull_ctl_disable_tbl = rts5228_sd_pull_ctl_disable_tbl; in rts5228_init_params()
705 pcr->reg_pm_ctrl3 = RTS5228_AUTOLOAD_CFG3; in rts5228_init_params()