Lines Matching full:pcr
17 static u8 rts5227_get_ic_version(struct rtsx_pcr *pcr) in rts5227_get_ic_version() argument
21 rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val); in rts5227_get_ic_version()
25 static void rts5227_fill_driving(struct rtsx_pcr *pcr, u8 voltage) in rts5227_fill_driving() argument
43 drive_sel = pcr->sd30_drive_sel_3v3; in rts5227_fill_driving()
46 drive_sel = pcr->sd30_drive_sel_1v8; in rts5227_fill_driving()
49 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CLK_DRIVE_SEL, in rts5227_fill_driving()
51 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CMD_DRIVE_SEL, in rts5227_fill_driving()
53 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DAT_DRIVE_SEL, in rts5227_fill_driving()
57 static void rts5227_fetch_vendor_settings(struct rtsx_pcr *pcr) in rts5227_fetch_vendor_settings() argument
59 struct pci_dev *pdev = pcr->pci; in rts5227_fetch_vendor_settings()
63 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); in rts5227_fetch_vendor_settings()
68 pcr->aspm_en = rtsx_reg_to_aspm(reg); in rts5227_fetch_vendor_settings()
69 pcr->sd30_drive_sel_1v8 = rtsx_reg_to_sd30_drive_sel_1v8(reg); in rts5227_fetch_vendor_settings()
70 pcr->card_drive_sel &= 0x3F; in rts5227_fetch_vendor_settings()
71 pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg); in rts5227_fetch_vendor_settings()
74 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); in rts5227_fetch_vendor_settings()
75 if (CHK_PCI_PID(pcr, 0x522A)) in rts5227_fetch_vendor_settings()
76 pcr->rtd3_en = rtsx_reg_to_rtd3(reg); in rts5227_fetch_vendor_settings()
78 pcr->extra_caps |= EXTRA_CAPS_NO_MMC; in rts5227_fetch_vendor_settings()
79 pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg); in rts5227_fetch_vendor_settings()
81 pcr->flags |= PCR_REVERSE_SOCKET; in rts5227_fetch_vendor_settings()
84 static void rts5227_init_from_cfg(struct rtsx_pcr *pcr) in rts5227_init_from_cfg() argument
86 struct rtsx_cr_option *option = &pcr->option; in rts5227_init_from_cfg()
88 if (CHK_PCI_PID(pcr, 0x522A)) { in rts5227_init_from_cfg()
89 if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN in rts5227_init_from_cfg()
91 rtsx_pci_disable_oobs_polling(pcr); in rts5227_init_from_cfg()
93 rtsx_pci_enable_oobs_polling(pcr); in rts5227_init_from_cfg()
98 rtsx_set_ltr_latency(pcr, option->ltr_active_latency); in rts5227_init_from_cfg()
102 static int rts5227_extra_init_hw(struct rtsx_pcr *pcr) in rts5227_extra_init_hw() argument
105 struct rtsx_cr_option *option = &pcr->option; in rts5227_extra_init_hw()
107 rts5227_init_from_cfg(pcr); in rts5227_extra_init_hw()
108 rtsx_pci_init_cmd(pcr); in rts5227_extra_init_hw()
111 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02); in rts5227_extra_init_hw()
113 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0); in rts5227_extra_init_hw()
115 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00); in rts5227_extra_init_hw()
116 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01); in rts5227_extra_init_hw()
118 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02); in rts5227_extra_init_hw()
120 pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &cap); in rts5227_extra_init_hw()
122 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LTR_CTL, 0xFF, 0xA3); in rts5227_extra_init_hw()
124 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OBFF_CFG, 0x03, 0x03); in rts5227_extra_init_hw()
126 rts5227_fill_driving(pcr, OUTPUT_3V3); in rts5227_extra_init_hw()
128 if (pcr->flags & PCR_REVERSE_SOCKET) in rts5227_extra_init_hw()
129 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x30, 0x30); in rts5227_extra_init_hw()
131 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x30, 0x00); in rts5227_extra_init_hw()
133 if (CHK_PCI_PID(pcr, 0x522A)) in rts5227_extra_init_hw()
134 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_AUTOLOAD_CFG1, in rts5227_extra_init_hw()
137 if (pcr->rtd3_en) { in rts5227_extra_init_hw()
138 if (CHK_PCI_PID(pcr, 0x522A)) { in rts5227_extra_init_hw()
139 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_PM_CTRL3, 0x01, 0x01); in rts5227_extra_init_hw()
140 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_PME_FORCE_CTL, 0x30, 0x30); in rts5227_extra_init_hw()
142 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x01, 0x01); in rts5227_extra_init_hw()
143 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PME_FORCE_CTL, 0xFF, 0x33); in rts5227_extra_init_hw()
146 if (CHK_PCI_PID(pcr, 0x522A)) { in rts5227_extra_init_hw()
147 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_PM_CTRL3, 0x01, 0x00); in rts5227_extra_init_hw()
148 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_PME_FORCE_CTL, 0x30, 0x20); in rts5227_extra_init_hw()
150 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PME_FORCE_CTL, 0xFF, 0x30); in rts5227_extra_init_hw()
151 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x01, 0x00); in rts5227_extra_init_hw()
156 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, in rts5227_extra_init_hw()
159 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, in rts5227_extra_init_hw()
162 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, pcr->reg_pm_ctrl3, 0x10, 0x00); in rts5227_extra_init_hw()
164 return rtsx_pci_send_cmd(pcr, 100); in rts5227_extra_init_hw()
167 static int rts5227_optimize_phy(struct rtsx_pcr *pcr) in rts5227_optimize_phy() argument
171 err = rtsx_pci_write_register(pcr, PM_CTRL3, D3_DELINK_MODE_EN, 0x00); in rts5227_optimize_phy()
176 return rtsx_pci_write_phy_register(pcr, 0x00, 0xBA42); in rts5227_optimize_phy()
179 static int rts5227_turn_on_led(struct rtsx_pcr *pcr) in rts5227_turn_on_led() argument
181 return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02); in rts5227_turn_on_led()
184 static int rts5227_turn_off_led(struct rtsx_pcr *pcr) in rts5227_turn_off_led() argument
186 return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00); in rts5227_turn_off_led()
189 static int rts5227_enable_auto_blink(struct rtsx_pcr *pcr) in rts5227_enable_auto_blink() argument
191 return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08); in rts5227_enable_auto_blink()
194 static int rts5227_disable_auto_blink(struct rtsx_pcr *pcr) in rts5227_disable_auto_blink() argument
196 return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00); in rts5227_disable_auto_blink()
199 static int rts5227_card_power_on(struct rtsx_pcr *pcr, int card) in rts5227_card_power_on() argument
203 if (pcr->option.ocp_en) in rts5227_card_power_on()
204 rtsx_pci_enable_ocp(pcr); in rts5227_card_power_on()
206 rtsx_pci_init_cmd(pcr); in rts5227_card_power_on()
207 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, in rts5227_card_power_on()
210 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL, in rts5227_card_power_on()
213 err = rtsx_pci_send_cmd(pcr, 100); in rts5227_card_power_on()
219 rtsx_pci_init_cmd(pcr); in rts5227_card_power_on()
220 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, in rts5227_card_power_on()
223 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL, in rts5227_card_power_on()
226 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_OE, in rts5227_card_power_on()
228 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_OE, in rts5227_card_power_on()
230 return rtsx_pci_send_cmd(pcr, 100); in rts5227_card_power_on()
233 static int rts5227_card_power_off(struct rtsx_pcr *pcr, int card) in rts5227_card_power_off() argument
235 if (pcr->option.ocp_en) in rts5227_card_power_off()
236 rtsx_pci_disable_ocp(pcr); in rts5227_card_power_off()
238 rtsx_pci_write_register(pcr, CARD_PWR_CTL, SD_POWER_MASK | in rts5227_card_power_off()
240 rtsx_pci_write_register(pcr, PWR_GATE_CTRL, LDO3318_PWR_MASK, 0X00); in rts5227_card_power_off()
245 static int rts5227_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) in rts5227_switch_output_voltage() argument
250 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24); in rts5227_switch_output_voltage()
254 err = rtsx_pci_write_phy_register(pcr, 0x11, 0x3C02); in rts5227_switch_output_voltage()
257 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C80 | 0x24); in rts5227_switch_output_voltage()
265 rtsx_pci_init_cmd(pcr); in rts5227_switch_output_voltage()
266 rts5227_fill_driving(pcr, voltage); in rts5227_switch_output_voltage()
267 return rtsx_pci_send_cmd(pcr, 100); in rts5227_switch_output_voltage()
331 void rts5227_init_params(struct rtsx_pcr *pcr) in rts5227_init_params() argument
333 pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104; in rts5227_init_params()
334 pcr->num_slots = 2; in rts5227_init_params()
335 pcr->ops = &rts5227_pcr_ops; in rts5227_init_params()
337 pcr->flags = 0; in rts5227_init_params()
338 pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT; in rts5227_init_params()
339 pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_B; in rts5227_init_params()
340 pcr->sd30_drive_sel_3v3 = CFG_DRIVER_TYPE_B; in rts5227_init_params()
341 pcr->aspm_en = ASPM_L1_EN; in rts5227_init_params()
342 pcr->aspm_mode = ASPM_MODE_CFG; in rts5227_init_params()
343 pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 15); in rts5227_init_params()
344 pcr->rx_initial_phase = SET_CLOCK_PHASE(30, 7, 7); in rts5227_init_params()
346 pcr->ic_version = rts5227_get_ic_version(pcr); in rts5227_init_params()
347 pcr->sd_pull_ctl_enable_tbl = rts5227_sd_pull_ctl_enable_tbl; in rts5227_init_params()
348 pcr->sd_pull_ctl_disable_tbl = rts5227_sd_pull_ctl_disable_tbl; in rts5227_init_params()
349 pcr->ms_pull_ctl_enable_tbl = rts5227_ms_pull_ctl_enable_tbl; in rts5227_init_params()
350 pcr->ms_pull_ctl_disable_tbl = rts5227_ms_pull_ctl_disable_tbl; in rts5227_init_params()
352 pcr->reg_pm_ctrl3 = PM_CTRL3; in rts5227_init_params()
355 static int rts522a_optimize_phy(struct rtsx_pcr *pcr) in rts522a_optimize_phy() argument
359 err = rtsx_pci_write_register(pcr, RTS522A_PM_CTRL3, D3_DELINK_MODE_EN, in rts522a_optimize_phy()
364 if (is_version(pcr, 0x522A, IC_VER_A)) { in rts522a_optimize_phy()
365 err = rtsx_pci_write_phy_register(pcr, PHY_RCR2, in rts522a_optimize_phy()
370 rtsx_pci_write_phy_register(pcr, PHY_RCR1, PHY_RCR1_INIT_27S); in rts522a_optimize_phy()
371 rtsx_pci_write_phy_register(pcr, PHY_FLD0, PHY_FLD0_INIT_27S); in rts522a_optimize_phy()
372 rtsx_pci_write_phy_register(pcr, PHY_FLD3, PHY_FLD3_INIT_27S); in rts522a_optimize_phy()
373 rtsx_pci_write_phy_register(pcr, PHY_FLD4, PHY_FLD4_INIT_27S); in rts522a_optimize_phy()
379 static int rts522a_extra_init_hw(struct rtsx_pcr *pcr) in rts522a_extra_init_hw() argument
381 rts5227_extra_init_hw(pcr); in rts522a_extra_init_hw()
384 if (!pcr->card_exist) in rts522a_extra_init_hw()
385 rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, in rts522a_extra_init_hw()
388 rtsx_pci_write_register(pcr, FUNC_FORCE_CTL, FUNC_FORCE_UPME_XMT_DBG, in rts522a_extra_init_hw()
390 rtsx_pci_write_register(pcr, PCLK_CTL, 0x04, 0x04); in rts522a_extra_init_hw()
391 rtsx_pci_write_register(pcr, PM_EVENT_DEBUG, PME_DEBUG_0, PME_DEBUG_0); in rts522a_extra_init_hw()
392 rtsx_pci_write_register(pcr, PM_CLK_FORCE_CTL, 0xFF, 0x11); in rts522a_extra_init_hw()
397 static int rts522a_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) in rts522a_switch_output_voltage() argument
402 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x57E4); in rts522a_switch_output_voltage()
406 err = rtsx_pci_write_phy_register(pcr, 0x11, 0x3C02); in rts522a_switch_output_voltage()
409 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x54A4); in rts522a_switch_output_voltage()
417 rtsx_pci_init_cmd(pcr); in rts522a_switch_output_voltage()
418 rts5227_fill_driving(pcr, voltage); in rts522a_switch_output_voltage()
419 return rtsx_pci_send_cmd(pcr, 100); in rts522a_switch_output_voltage()
422 static void rts522a_force_power_down(struct rtsx_pcr *pcr, u8 pm_state, bool runtime) in rts522a_force_power_down() argument
425 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, MASK_8_BIT_DEF, 0); in rts522a_force_power_down()
426 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 2, MASK_8_BIT_DEF, 0); in rts522a_force_power_down()
427 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3, in rts522a_force_power_down()
430 rtsx_pci_write_register(pcr, RTS522A_PM_CTRL3, in rts522a_force_power_down()
434 rtsx_pci_write_register(pcr, RTS522A_AUTOLOAD_CFG1, in rts522a_force_power_down()
436 rtsx_pci_write_register(pcr, RTS522A_PM_CTRL3, 0x01, 0x00); in rts522a_force_power_down()
437 rtsx_pci_write_register(pcr, RTS522A_PME_FORCE_CTL, 0x30, 0x20); in rts522a_force_power_down()
440 rtsx_pci_write_register(pcr, FPDCTL, ALL_POWER_DOWN, ALL_POWER_DOWN); in rts522a_force_power_down()
444 static void rts522a_set_l1off_cfg_sub_d0(struct rtsx_pcr *pcr, int active) in rts522a_set_l1off_cfg_sub_d0() argument
446 struct rtsx_cr_option *option = &pcr->option; in rts522a_set_l1off_cfg_sub_d0()
450 aspm_L1_1 = rtsx_check_dev_flag(pcr, ASPM_L1_1_EN); in rts522a_set_l1off_cfg_sub_d0()
451 aspm_L1_2 = rtsx_check_dev_flag(pcr, ASPM_L1_2_EN); in rts522a_set_l1off_cfg_sub_d0()
463 rtsx_set_l1off_sub(pcr, val); in rts522a_set_l1off_cfg_sub_d0()
485 void rts522a_init_params(struct rtsx_pcr *pcr) in rts522a_init_params() argument
487 struct rtsx_cr_option *option = &pcr->option; in rts522a_init_params()
489 rts5227_init_params(pcr); in rts522a_init_params()
490 pcr->ops = &rts522a_pcr_ops; in rts522a_init_params()
491 pcr->aspm_mode = ASPM_MODE_REG; in rts522a_init_params()
492 pcr->tx_initial_phase = SET_CLOCK_PHASE(20, 20, 11); in rts522a_init_params()
493 pcr->reg_pm_ctrl3 = RTS522A_PM_CTRL3; in rts522a_init_params()
506 pcr->option.ocp_en = 1; in rts522a_init_params()
507 if (pcr->option.ocp_en) in rts522a_init_params()
508 pcr->hw_param.interrupt_en |= SD_OC_INT_EN; in rts522a_init_params()
509 pcr->hw_param.ocp_glitch = SD_OCP_GLITCH_10M; in rts522a_init_params()
510 pcr->option.sd_800mA_ocp_thd = RTS522A_OCP_THD_800; in rts522a_init_params()