Lines Matching refs:pllsw
454 u32 pllsw; member
1258 val |= (PRCM_CLK_MGT_CLKEN | clk_mgt[clock].pllsw); in request_clock()
1260 clk_mgt[clock].pllsw = (val & PRCM_CLK_MGT_CLKPLLSW_MASK); in request_clock()
1436 u32 pllsw; in clock_rate() local
1447 val |= clk_mgt[clock].pllsw; in clock_rate()
1448 pllsw = (val & PRCM_CLK_MGT_CLKPLLSW_MASK); in clock_rate()
1450 if (pllsw == PRCM_CLK_MGT_CLKPLLSW_SOC0) in clock_rate()
1452 else if (pllsw == PRCM_CLK_MGT_CLKPLLSW_SOC1) in clock_rate()
1454 else if (pllsw == PRCM_CLK_MGT_CLKPLLSW_DDR) in clock_rate()
1601 src_rate = clock_source_rate((val | clk_mgt[clock].pllsw), in round_clock_rate()
1761 src_rate = clock_source_rate((val | clk_mgt[clock].pllsw), in set_clock_rate()