Lines Matching +full:cs +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0
32 #define FMC2_BCR_MUXEN BIT(1)
101 FMC2_REG_BCR = 1,
148 * struct stm32_fmc2_prop - STM32 FMC2 EBI property
172 const struct stm32_fmc2_prop *prop, int cs);
173 u32 (*calculate)(struct stm32_fmc2_ebi *ebi, int cs, u32 setup);
176 int cs, u32 setup);
181 int cs) in stm32_fmc2_ebi_check_mux() argument
186 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_mux()
193 return -EINVAL; in stm32_fmc2_ebi_check_mux()
198 int cs) in stm32_fmc2_ebi_check_waitcfg() argument
203 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_waitcfg()
210 return -EINVAL; in stm32_fmc2_ebi_check_waitcfg()
215 int cs) in stm32_fmc2_ebi_check_sync_trans() argument
220 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_sync_trans()
227 return -EINVAL; in stm32_fmc2_ebi_check_sync_trans()
232 int cs) in stm32_fmc2_ebi_check_async_trans() argument
237 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_async_trans()
244 return -EINVAL; in stm32_fmc2_ebi_check_async_trans()
249 int cs) in stm32_fmc2_ebi_check_cpsize() argument
254 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_cpsize()
261 return -EINVAL; in stm32_fmc2_ebi_check_cpsize()
266 int cs) in stm32_fmc2_ebi_check_address_hold() argument
271 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_address_hold()
275 if (prop->reg_type == FMC2_REG_BWTR) in stm32_fmc2_ebi_check_address_hold()
276 ret = regmap_read(ebi->regmap, FMC2_BWTR(cs), &bxtr); in stm32_fmc2_ebi_check_address_hold()
278 ret = regmap_read(ebi->regmap, FMC2_BTR(cs), &bxtr); in stm32_fmc2_ebi_check_address_hold()
286 return -EINVAL; in stm32_fmc2_ebi_check_address_hold()
291 int cs) in stm32_fmc2_ebi_check_clk_period() argument
296 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_clk_period()
300 if (cs) { in stm32_fmc2_ebi_check_clk_period()
301 ret = regmap_read(ebi->regmap, FMC2_BCR1, &bcr1); in stm32_fmc2_ebi_check_clk_period()
308 if (bcr & FMC2_BCR_BURSTEN && (!cs || !(bcr1 & FMC2_BCR1_CCLKEN))) in stm32_fmc2_ebi_check_clk_period()
311 return -EINVAL; in stm32_fmc2_ebi_check_clk_period()
316 int cs) in stm32_fmc2_ebi_check_cclk() argument
318 if (cs) in stm32_fmc2_ebi_check_cclk()
319 return -EINVAL; in stm32_fmc2_ebi_check_cclk()
321 return stm32_fmc2_ebi_check_sync_trans(ebi, prop, cs); in stm32_fmc2_ebi_check_cclk()
325 int cs, u32 setup) in stm32_fmc2_ebi_ns_to_clock_cycles() argument
327 unsigned long hclk = clk_get_rate(ebi->clk); in stm32_fmc2_ebi_ns_to_clock_cycles()
334 int cs, u32 setup) in stm32_fmc2_ebi_ns_to_clk_period() argument
336 u32 nb_clk_cycles = stm32_fmc2_ebi_ns_to_clock_cycles(ebi, cs, setup); in stm32_fmc2_ebi_ns_to_clk_period()
340 ret = regmap_read(ebi->regmap, FMC2_BCR1, &bcr); in stm32_fmc2_ebi_ns_to_clk_period()
344 if (bcr & FMC2_BCR1_CCLKEN || !cs) in stm32_fmc2_ebi_ns_to_clk_period()
345 ret = regmap_read(ebi->regmap, FMC2_BTR1, &btr); in stm32_fmc2_ebi_ns_to_clk_period()
347 ret = regmap_read(ebi->regmap, FMC2_BTR(cs), &btr); in stm32_fmc2_ebi_ns_to_clk_period()
351 clk_period = FIELD_GET(FMC2_BTR_CLKDIV, btr) + 1; in stm32_fmc2_ebi_ns_to_clk_period()
356 static int stm32_fmc2_ebi_get_reg(int reg_type, int cs, u32 *reg) in stm32_fmc2_ebi_get_reg() argument
360 *reg = FMC2_BCR(cs); in stm32_fmc2_ebi_get_reg()
363 *reg = FMC2_BTR(cs); in stm32_fmc2_ebi_get_reg()
366 *reg = FMC2_BWTR(cs); in stm32_fmc2_ebi_get_reg()
372 return -EINVAL; in stm32_fmc2_ebi_get_reg()
380 int cs, u32 setup) in stm32_fmc2_ebi_set_bit_field() argument
385 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_bit_field()
389 regmap_update_bits(ebi->regmap, reg, prop->reg_mask, in stm32_fmc2_ebi_set_bit_field()
390 setup ? prop->reg_mask : 0); in stm32_fmc2_ebi_set_bit_field()
397 int cs, u32 setup) in stm32_fmc2_ebi_set_trans_type() argument
414 * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
419 * MUXEN = 0, MTYP = 1, FACCEN = 0, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
420 * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
427 * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
436 * MUXEN = 0, MTYP = 1, FACCEN = 0, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
437 * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
446 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
447 * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
454 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
455 * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 1 in stm32_fmc2_ebi_set_trans_type()
464 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
465 * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 2 in stm32_fmc2_ebi_set_trans_type()
474 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
475 * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 3 in stm32_fmc2_ebi_set_trans_type()
484 * MUXEN = 0, MTYP = 1, FACCEN = 0, BURSTEN = 1, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
485 * WREN = 1, EXTMOD = 0, CBURSTRW = 1, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
492 * MUXEN = 0, MTYP = 1, FACCEN = 0, BURSTEN = 1, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
493 * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
500 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 1, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
501 * WREN = 1, EXTMOD = 0, CBURSTRW = 1, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
508 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 1, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
509 * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
516 return -EINVAL; in stm32_fmc2_ebi_set_trans_type()
520 regmap_update_bits(ebi->regmap, FMC2_BWTR(cs), in stm32_fmc2_ebi_set_trans_type()
522 regmap_update_bits(ebi->regmap, FMC2_BTR(cs), btr_mask, btr); in stm32_fmc2_ebi_set_trans_type()
523 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), bcr_mask, bcr); in stm32_fmc2_ebi_set_trans_type()
530 int cs, u32 setup) in stm32_fmc2_ebi_set_buswidth() argument
543 return -EINVAL; in stm32_fmc2_ebi_set_buswidth()
546 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_MWID, val); in stm32_fmc2_ebi_set_buswidth()
553 int cs, u32 setup) in stm32_fmc2_ebi_set_cpsize() argument
575 return -EINVAL; in stm32_fmc2_ebi_set_cpsize()
578 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_CPSIZE, val); in stm32_fmc2_ebi_set_cpsize()
585 int cs, u32 setup) in stm32_fmc2_ebi_set_bl_setup() argument
591 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_NBLSET, val); in stm32_fmc2_ebi_set_bl_setup()
598 int cs, u32 setup) in stm32_fmc2_ebi_set_address_setup() argument
604 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_address_setup()
608 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_set_address_setup()
612 if (prop->reg_type == FMC2_REG_BWTR) in stm32_fmc2_ebi_set_address_setup()
613 ret = regmap_read(ebi->regmap, FMC2_BWTR(cs), &bxtr); in stm32_fmc2_ebi_set_address_setup()
615 ret = regmap_read(ebi->regmap, FMC2_BTR(cs), &bxtr); in stm32_fmc2_ebi_set_address_setup()
620 val = clamp_val(setup, 1, FMC2_BXTR_ADDSET_MAX); in stm32_fmc2_ebi_set_address_setup()
624 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_ADDSET, val); in stm32_fmc2_ebi_set_address_setup()
631 int cs, u32 setup) in stm32_fmc2_ebi_set_address_hold() argument
636 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_address_hold()
640 val = clamp_val(setup, 1, FMC2_BXTR_ADDHLD_MAX); in stm32_fmc2_ebi_set_address_hold()
642 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_ADDHLD, val); in stm32_fmc2_ebi_set_address_hold()
649 int cs, u32 setup) in stm32_fmc2_ebi_set_data_setup() argument
654 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_data_setup()
658 val = clamp_val(setup, 1, FMC2_BXTR_DATAST_MAX); in stm32_fmc2_ebi_set_data_setup()
660 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_DATAST, val); in stm32_fmc2_ebi_set_data_setup()
667 int cs, u32 setup) in stm32_fmc2_ebi_set_bus_turnaround() argument
672 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_bus_turnaround()
676 val = setup ? min_t(u32, setup - 1, FMC2_BXTR_BUSTURN_MAX) : 0; in stm32_fmc2_ebi_set_bus_turnaround()
678 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_BUSTURN, val); in stm32_fmc2_ebi_set_bus_turnaround()
685 int cs, u32 setup) in stm32_fmc2_ebi_set_data_hold() argument
690 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_data_hold()
694 if (prop->reg_type == FMC2_REG_BWTR) in stm32_fmc2_ebi_set_data_hold()
695 val = setup ? min_t(u32, setup - 1, FMC2_BXTR_DATAHLD_MAX) : 0; in stm32_fmc2_ebi_set_data_hold()
699 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_DATAHLD, val); in stm32_fmc2_ebi_set_data_hold()
706 int cs, u32 setup) in stm32_fmc2_ebi_set_clk_period() argument
710 val = setup ? clamp_val(setup - 1, 1, FMC2_BTR_CLKDIV_MAX) : 1; in stm32_fmc2_ebi_set_clk_period()
712 regmap_update_bits(ebi->regmap, FMC2_BTR(cs), FMC2_BTR_CLKDIV, val); in stm32_fmc2_ebi_set_clk_period()
719 int cs, u32 setup) in stm32_fmc2_ebi_set_data_latency() argument
723 val = setup > 1 ? min_t(u32, setup - 2, FMC2_BTR_DATLAT_MAX) : 0; in stm32_fmc2_ebi_set_data_latency()
725 regmap_update_bits(ebi->regmap, FMC2_BTR(cs), FMC2_BTR_DATLAT, val); in stm32_fmc2_ebi_set_data_latency()
732 int cs, u32 setup) in stm32_fmc2_ebi_set_max_low_pulse() argument
737 if (setup < 1) in stm32_fmc2_ebi_set_max_low_pulse()
740 ret = regmap_read(ebi->regmap, FMC2_PCSCNTR, &pcscntr); in stm32_fmc2_ebi_set_max_low_pulse()
745 regmap_update_bits(ebi->regmap, FMC2_PCSCNTR, in stm32_fmc2_ebi_set_max_low_pulse()
746 FMC2_PCSCNTR_CNTBEN(cs), in stm32_fmc2_ebi_set_max_low_pulse()
747 FMC2_PCSCNTR_CNTBEN(cs)); in stm32_fmc2_ebi_set_max_low_pulse()
749 new_val = min_t(u32, setup - 1, FMC2_PCSCNTR_CSCOUNT_MAX); in stm32_fmc2_ebi_set_max_low_pulse()
756 regmap_update_bits(ebi->regmap, FMC2_PCSCNTR, in stm32_fmc2_ebi_set_max_low_pulse()
763 /* st,fmc2-ebi-cs-trans-type must be the first property */
765 .name = "st,fmc2-ebi-cs-transaction-type",
770 .name = "st,fmc2-ebi-cs-cclk-enable",
778 .name = "st,fmc2-ebi-cs-mux-enable",
786 .name = "st,fmc2-ebi-cs-buswidth",
791 .name = "st,fmc2-ebi-cs-waitpol-high",
798 .name = "st,fmc2-ebi-cs-waitcfg-enable",
806 .name = "st,fmc2-ebi-cs-wait-enable",
814 .name = "st,fmc2-ebi-cs-asyncwait-enable",
822 .name = "st,fmc2-ebi-cs-cpsize",
827 .name = "st,fmc2-ebi-cs-byte-lane-setup-ns",
832 .name = "st,fmc2-ebi-cs-address-setup-ns",
840 .name = "st,fmc2-ebi-cs-address-hold-ns",
848 .name = "st,fmc2-ebi-cs-data-setup-ns",
856 .name = "st,fmc2-ebi-cs-bus-turnaround-ns",
858 .reset_val = FMC2_BXTR_BUSTURN_MAX + 1,
863 .name = "st,fmc2-ebi-cs-data-hold-ns",
870 .name = "st,fmc2-ebi-cs-clk-period-ns",
871 .reset_val = FMC2_BTR_CLKDIV_MAX + 1,
877 .name = "st,fmc2-ebi-cs-data-latency-ns",
883 .name = "st,fmc2-ebi-cs-write-address-setup-ns",
891 .name = "st,fmc2-ebi-cs-write-address-hold-ns",
899 .name = "st,fmc2-ebi-cs-write-data-setup-ns",
907 .name = "st,fmc2-ebi-cs-write-bus-turnaround-ns",
909 .reset_val = FMC2_BXTR_BUSTURN_MAX + 1,
914 .name = "st,fmc2-ebi-cs-write-data-hold-ns",
921 .name = "st,fmc2-ebi-cs-max-low-pulse-ns",
930 int cs) in stm32_fmc2_ebi_parse_prop() argument
932 struct device *dev = ebi->dev; in stm32_fmc2_ebi_parse_prop()
935 if (!prop->set) { in stm32_fmc2_ebi_parse_prop()
936 dev_err(dev, "property %s is not well defined\n", prop->name); in stm32_fmc2_ebi_parse_prop()
937 return -EINVAL; in stm32_fmc2_ebi_parse_prop()
940 if (prop->check && prop->check(ebi, prop, cs)) in stm32_fmc2_ebi_parse_prop()
944 if (prop->bprop) { in stm32_fmc2_ebi_parse_prop()
947 bprop = of_property_read_bool(dev_node, prop->name); in stm32_fmc2_ebi_parse_prop()
948 if (prop->mprop && !bprop) { in stm32_fmc2_ebi_parse_prop()
950 prop->name); in stm32_fmc2_ebi_parse_prop()
951 return -EINVAL; in stm32_fmc2_ebi_parse_prop()
955 setup = 1; in stm32_fmc2_ebi_parse_prop()
960 ret = of_property_read_u32(dev_node, prop->name, &val); in stm32_fmc2_ebi_parse_prop()
961 if (prop->mprop && ret) { in stm32_fmc2_ebi_parse_prop()
963 prop->name); in stm32_fmc2_ebi_parse_prop()
968 setup = prop->reset_val; in stm32_fmc2_ebi_parse_prop()
969 else if (prop->calculate) in stm32_fmc2_ebi_parse_prop()
970 setup = prop->calculate(ebi, cs, val); in stm32_fmc2_ebi_parse_prop()
975 return prop->set(ebi, prop, cs, setup); in stm32_fmc2_ebi_parse_prop()
978 static void stm32_fmc2_ebi_enable_bank(struct stm32_fmc2_ebi *ebi, int cs) in stm32_fmc2_ebi_enable_bank() argument
980 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), in stm32_fmc2_ebi_enable_bank()
984 static void stm32_fmc2_ebi_disable_bank(struct stm32_fmc2_ebi *ebi, int cs) in stm32_fmc2_ebi_disable_bank() argument
986 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_MBKEN, 0); in stm32_fmc2_ebi_disable_bank()
991 unsigned int cs; in stm32_fmc2_ebi_save_setup() local
994 for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) { in stm32_fmc2_ebi_save_setup()
995 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &ebi->bcr[cs]); in stm32_fmc2_ebi_save_setup()
996 ret |= regmap_read(ebi->regmap, FMC2_BTR(cs), &ebi->btr[cs]); in stm32_fmc2_ebi_save_setup()
997 ret |= regmap_read(ebi->regmap, FMC2_BWTR(cs), &ebi->bwtr[cs]); in stm32_fmc2_ebi_save_setup()
1002 return regmap_read(ebi->regmap, FMC2_PCSCNTR, &ebi->pcscntr); in stm32_fmc2_ebi_save_setup()
1007 unsigned int cs; in stm32_fmc2_ebi_set_setup() local
1009 for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) { in stm32_fmc2_ebi_set_setup()
1010 regmap_write(ebi->regmap, FMC2_BCR(cs), ebi->bcr[cs]); in stm32_fmc2_ebi_set_setup()
1011 regmap_write(ebi->regmap, FMC2_BTR(cs), ebi->btr[cs]); in stm32_fmc2_ebi_set_setup()
1012 regmap_write(ebi->regmap, FMC2_BWTR(cs), ebi->bwtr[cs]); in stm32_fmc2_ebi_set_setup()
1015 regmap_write(ebi->regmap, FMC2_PCSCNTR, ebi->pcscntr); in stm32_fmc2_ebi_set_setup()
1020 unsigned int cs; in stm32_fmc2_ebi_disable_banks() local
1022 for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) { in stm32_fmc2_ebi_disable_banks()
1023 if (!(ebi->bank_assigned & BIT(cs))) in stm32_fmc2_ebi_disable_banks()
1026 stm32_fmc2_ebi_disable_bank(ebi, cs); in stm32_fmc2_ebi_disable_banks()
1033 struct device *dev = ebi->dev; in stm32_fmc2_ebi_nwait_used_by_ctrls()
1034 unsigned int cs; in stm32_fmc2_ebi_nwait_used_by_ctrls() local
1038 for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) { in stm32_fmc2_ebi_nwait_used_by_ctrls()
1039 if (!(ebi->bank_assigned & BIT(cs))) in stm32_fmc2_ebi_nwait_used_by_ctrls()
1042 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_nwait_used_by_ctrls()
1047 ebi->bank_assigned & BIT(FMC2_NAND)) { in stm32_fmc2_ebi_nwait_used_by_ctrls()
1049 return -EINVAL; in stm32_fmc2_ebi_nwait_used_by_ctrls()
1058 regmap_update_bits(ebi->regmap, FMC2_BCR1, in stm32_fmc2_ebi_enable()
1064 regmap_update_bits(ebi->regmap, FMC2_BCR1, FMC2_BCR1_FMC2EN, 0); in stm32_fmc2_ebi_disable()
1069 u32 cs) in stm32_fmc2_ebi_setup_cs() argument
1074 stm32_fmc2_ebi_disable_bank(ebi, cs); in stm32_fmc2_ebi_setup_cs()
1079 ret = stm32_fmc2_ebi_parse_prop(ebi, dev_node, p, cs); in stm32_fmc2_ebi_setup_cs()
1081 dev_err(ebi->dev, "property %s could not be set: %d\n", in stm32_fmc2_ebi_setup_cs()
1082 p->name, ret); in stm32_fmc2_ebi_setup_cs()
1087 stm32_fmc2_ebi_enable_bank(ebi, cs); in stm32_fmc2_ebi_setup_cs()
1094 struct device *dev = ebi->dev; in stm32_fmc2_ebi_parse_dt()
1100 for_each_available_child_of_node(dev->of_node, child) { in stm32_fmc2_ebi_parse_dt()
1112 return -EINVAL; in stm32_fmc2_ebi_parse_dt()
1115 if (ebi->bank_assigned & BIT(bank)) { in stm32_fmc2_ebi_parse_dt()
1118 return -EINVAL; in stm32_fmc2_ebi_parse_dt()
1131 ebi->bank_assigned |= BIT(bank); in stm32_fmc2_ebi_parse_dt()
1137 return -ENODEV; in stm32_fmc2_ebi_parse_dt()
1146 return of_platform_populate(dev->of_node, NULL, NULL, dev); in stm32_fmc2_ebi_parse_dt()
1151 struct device *dev = &pdev->dev; in stm32_fmc2_ebi_probe()
1156 ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL); in stm32_fmc2_ebi_probe()
1158 return -ENOMEM; in stm32_fmc2_ebi_probe()
1160 ebi->dev = dev; in stm32_fmc2_ebi_probe()
1162 ebi->regmap = device_node_to_regmap(dev->of_node); in stm32_fmc2_ebi_probe()
1163 if (IS_ERR(ebi->regmap)) in stm32_fmc2_ebi_probe()
1164 return PTR_ERR(ebi->regmap); in stm32_fmc2_ebi_probe()
1166 ebi->clk = devm_clk_get(dev, NULL); in stm32_fmc2_ebi_probe()
1167 if (IS_ERR(ebi->clk)) in stm32_fmc2_ebi_probe()
1168 return PTR_ERR(ebi->clk); in stm32_fmc2_ebi_probe()
1171 if (PTR_ERR(rstc) == -EPROBE_DEFER) in stm32_fmc2_ebi_probe()
1172 return -EPROBE_DEFER; in stm32_fmc2_ebi_probe()
1174 ret = clk_prepare_enable(ebi->clk); in stm32_fmc2_ebi_probe()
1198 clk_disable_unprepare(ebi->clk); in stm32_fmc2_ebi_probe()
1207 of_platform_depopulate(&pdev->dev); in stm32_fmc2_ebi_remove()
1210 clk_disable_unprepare(ebi->clk); in stm32_fmc2_ebi_remove()
1220 clk_disable_unprepare(ebi->clk); in stm32_fmc2_ebi_suspend()
1233 ret = clk_prepare_enable(ebi->clk); in stm32_fmc2_ebi_resume()
1247 {.compatible = "st,stm32mp1-fmc2-ebi"},