Lines Matching +full:mt8186 +full:- +full:memory +full:- +full:port
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015-2016 MediaTek Inc.
6 #include <linux/arm-smccc.h>
20 #include <dt-bindings/memory/mt2701-larb-port.h>
21 #include <dt-bindings/memory/mtk-memory-port.h>
58 /* every register control 8 port, register offset 0x4 */
64 * every port have 4 bit to control, bit[port + 3] control virtual or physical,
65 * bit[port + 2 : port + 1] control the domain, bit[port] control the security
66 * or non-security.
155 struct device *smi_common_dev; /* common or sub-common dev */
171 larb->larbid = i; in mtk_smi_larb_bind()
172 larb->mmu = &larb_mmu[i].mmu; in mtk_smi_larb_bind()
173 larb->bank = larb_mmu[i].bank; in mtk_smi_larb_bind()
177 return -ENODEV; in mtk_smi_larb_bind()
194 const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen; in mtk_smi_larb_config_port_gen1()
195 struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev); in mtk_smi_larb_config_port_gen1()
199 m4u_port_id = larb_gen->port_in_larb[larb->larbid]; in mtk_smi_larb_config_port_gen1()
200 larb_port_num = larb_gen->port_in_larb[larb->larbid + 1] in mtk_smi_larb_config_port_gen1()
201 - larb_gen->port_in_larb[larb->larbid]; in mtk_smi_larb_config_port_gen1()
204 if (*larb->mmu & BIT(i)) { in mtk_smi_larb_config_port_gen1()
205 /* bit[port + 3] controls the virtual or physical */ in mtk_smi_larb_config_port_gen1()
208 /* do not need to enable m4u for this port */ in mtk_smi_larb_config_port_gen1()
211 reg_val = readl(common->smi_ao_base in mtk_smi_larb_config_port_gen1()
217 common->smi_ao_base in mtk_smi_larb_config_port_gen1()
227 writel(*larb->mmu, larb->base + MT8167_SMI_LARB_MMU_EN); in mtk_smi_larb_config_port_mt8167()
235 writel(*larb->mmu, larb->base + MT8173_SMI_LARB_MMU_EN); in mtk_smi_larb_config_port_mt8173()
242 u32 reg, flags_general = larb->larb_gen->flags_general; in mtk_smi_larb_config_port_gen2_general()
243 const u8 *larbostd = larb->larb_gen->ostd ? larb->larb_gen->ostd[larb->larbid] : NULL; in mtk_smi_larb_config_port_gen2_general()
247 if (BIT(larb->larbid) & larb->larb_gen->larb_direct_to_common_mask) in mtk_smi_larb_config_port_gen2_general()
251 reg = readl_relaxed(larb->base + SMI_LARB_CMD_THRT_CON); in mtk_smi_larb_config_port_gen2_general()
254 writel_relaxed(reg, larb->base + SMI_LARB_CMD_THRT_CON); in mtk_smi_larb_config_port_gen2_general()
258 writel_relaxed(SMI_LARB_SW_FLAG_1, larb->base + SMI_LARB_SW_FLAG); in mtk_smi_larb_config_port_gen2_general()
261 writel_relaxed(larbostd[i], larb->base + SMI_LARB_OSTDL_PORTx(i)); in mtk_smi_larb_config_port_gen2_general()
270 larb->larbid, *larb->mmu, 0, 0, 0, 0, &res); in mtk_smi_larb_config_port_gen2_general()
273 return -EINVAL; in mtk_smi_larb_config_port_gen2_general()
277 for_each_set_bit(i, (unsigned long *)larb->mmu, 32) { in mtk_smi_larb_config_port_gen2_general()
278 reg = readl_relaxed(larb->base + SMI_LARB_NONSEC_CON(i)); in mtk_smi_larb_config_port_gen2_general()
280 reg |= BANK_SEL(larb->bank[i]); in mtk_smi_larb_config_port_gen2_general()
281 writel(reg, larb->base + SMI_LARB_NONSEC_CON(i)); in mtk_smi_larb_config_port_gen2_general()
401 /* mt8167 do not need the port in larb */
406 /* mt8173 do not need the port in larb */
440 {.compatible = "mediatek,mt2701-smi-larb", .data = &mtk_smi_larb_mt2701},
441 {.compatible = "mediatek,mt2712-smi-larb", .data = &mtk_smi_larb_mt2712},
442 {.compatible = "mediatek,mt6779-smi-larb", .data = &mtk_smi_larb_mt6779},
443 {.compatible = "mediatek,mt6795-smi-larb", .data = &mtk_smi_larb_mt8173},
444 {.compatible = "mediatek,mt8167-smi-larb", .data = &mtk_smi_larb_mt8167},
445 {.compatible = "mediatek,mt8173-smi-larb", .data = &mtk_smi_larb_mt8173},
446 {.compatible = "mediatek,mt8183-smi-larb", .data = &mtk_smi_larb_mt8183},
447 {.compatible = "mediatek,mt8186-smi-larb", .data = &mtk_smi_larb_mt8186},
448 {.compatible = "mediatek,mt8188-smi-larb", .data = &mtk_smi_larb_mt8188},
449 {.compatible = "mediatek,mt8192-smi-larb", .data = &mtk_smi_larb_mt8192},
450 {.compatible = "mediatek,mt8195-smi-larb", .data = &mtk_smi_larb_mt8195},
459 writel_relaxed(SLP_PROT_EN, larb->base + SMI_LARB_SLP_CON); in mtk_smi_larb_sleep_ctrl_enable()
460 ret = readl_poll_timeout_atomic(larb->base + SMI_LARB_SLP_CON, in mtk_smi_larb_sleep_ctrl_enable()
464 dev_err(larb->smi.dev, "sleep ctrl is not ready(0x%x).\n", tmp); in mtk_smi_larb_sleep_ctrl_enable()
471 writel_relaxed(0, larb->base + SMI_LARB_SLP_CON); in mtk_smi_larb_sleep_ctrl_disable()
481 smi_com_node = of_parse_phandle(dev->of_node, "mediatek,smi", 0); in mtk_smi_device_link_common()
483 return -EINVAL; in mtk_smi_device_link_common()
490 put_device(&smi_com_pdev->dev); in mtk_smi_device_link_common()
491 return -EPROBE_DEFER; in mtk_smi_device_link_common()
493 smi_com_dev = &smi_com_pdev->dev; in mtk_smi_device_link_common()
497 dev_err(dev, "Unable to link smi-common dev\n"); in mtk_smi_device_link_common()
498 put_device(&smi_com_pdev->dev); in mtk_smi_device_link_common()
499 return -ENODEV; in mtk_smi_device_link_common()
504 return -EINVAL; in mtk_smi_device_link_common()
517 smi->clks[i].id = clks[i]; in mtk_smi_dts_clk_init()
518 ret = devm_clk_bulk_get(dev, clk_nr_required, smi->clks); in mtk_smi_dts_clk_init()
523 smi->clks[i].id = clks[i]; in mtk_smi_dts_clk_init()
525 smi->clks + clk_nr_required); in mtk_smi_dts_clk_init()
526 smi->clk_num = clk_nr_required + clk_nr_optional; in mtk_smi_dts_clk_init()
533 struct device *dev = &pdev->dev; in mtk_smi_larb_probe()
538 return -ENOMEM; in mtk_smi_larb_probe()
540 larb->larb_gen = of_device_get_match_data(dev); in mtk_smi_larb_probe()
541 larb->base = devm_platform_ioremap_resource(pdev, 0); in mtk_smi_larb_probe()
542 if (IS_ERR(larb->base)) in mtk_smi_larb_probe()
543 return PTR_ERR(larb->base); in mtk_smi_larb_probe()
545 ret = mtk_smi_dts_clk_init(dev, &larb->smi, mtk_smi_larb_clks, in mtk_smi_larb_probe()
550 larb->smi.dev = dev; in mtk_smi_larb_probe()
552 ret = mtk_smi_device_link_common(dev, &larb->smi_common_dev); in mtk_smi_larb_probe()
565 device_link_remove(dev, larb->smi_common_dev); in mtk_smi_larb_probe()
573 device_link_remove(&pdev->dev, larb->smi_common_dev); in mtk_smi_larb_remove()
574 pm_runtime_disable(&pdev->dev); in mtk_smi_larb_remove()
575 component_del(&pdev->dev, &mtk_smi_larb_component_ops); in mtk_smi_larb_remove()
582 const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen; in mtk_smi_larb_resume()
585 ret = clk_bulk_prepare_enable(larb->smi.clk_num, larb->smi.clks); in mtk_smi_larb_resume()
589 if (MTK_SMI_CAPS(larb->larb_gen->flags_general, MTK_SMI_FLAG_SLEEP_CTL)) in mtk_smi_larb_resume()
593 return larb_gen->config_port(dev); in mtk_smi_larb_resume()
601 if (MTK_SMI_CAPS(larb->larb_gen->flags_general, MTK_SMI_FLAG_SLEEP_CTL)) { in mtk_smi_larb_suspend()
607 clk_bulk_disable_unprepare(larb->smi.clk_num, larb->smi.clks); in mtk_smi_larb_suspend()
621 .name = "mtk-smi-larb",
722 {.compatible = "mediatek,mt2701-smi-common", .data = &mtk_smi_common_gen1},
723 {.compatible = "mediatek,mt2712-smi-common", .data = &mtk_smi_common_gen2},
724 {.compatible = "mediatek,mt6779-smi-common", .data = &mtk_smi_common_mt6779},
725 {.compatible = "mediatek,mt6795-smi-common", .data = &mtk_smi_common_mt6795},
726 {.compatible = "mediatek,mt8167-smi-common", .data = &mtk_smi_common_gen2},
727 {.compatible = "mediatek,mt8173-smi-common", .data = &mtk_smi_common_gen2},
728 {.compatible = "mediatek,mt8183-smi-common", .data = &mtk_smi_common_mt8183},
729 {.compatible = "mediatek,mt8186-smi-common", .data = &mtk_smi_common_mt8186},
730 {.compatible = "mediatek,mt8188-smi-common-vdo", .data = &mtk_smi_common_mt8188_vdo},
731 {.compatible = "mediatek,mt8188-smi-common-vpp", .data = &mtk_smi_common_mt8188_vpp},
732 {.compatible = "mediatek,mt8192-smi-common", .data = &mtk_smi_common_mt8192},
733 {.compatible = "mediatek,mt8195-smi-common-vdo", .data = &mtk_smi_common_mt8195_vdo},
734 {.compatible = "mediatek,mt8195-smi-common-vpp", .data = &mtk_smi_common_mt8195_vpp},
735 {.compatible = "mediatek,mt8195-smi-sub-common", .data = &mtk_smi_sub_common_mt8195},
736 {.compatible = "mediatek,mt8365-smi-common", .data = &mtk_smi_common_mt8365},
742 struct device *dev = &pdev->dev; in mtk_smi_common_probe()
748 return -ENOMEM; in mtk_smi_common_probe()
749 common->dev = dev; in mtk_smi_common_probe()
750 common->plat = of_device_get_match_data(dev); in mtk_smi_common_probe()
752 if (common->plat->has_gals) { in mtk_smi_common_probe()
753 if (common->plat->type == MTK_SMI_GEN2) in mtk_smi_common_probe()
755 else if (common->plat->type == MTK_SMI_GEN2_SUB_COMM) in mtk_smi_common_probe()
764 * m4u port, and we need to enable the aync clock for transform the smi in mtk_smi_common_probe()
768 if (common->plat->type == MTK_SMI_GEN1) { in mtk_smi_common_probe()
769 common->smi_ao_base = devm_platform_ioremap_resource(pdev, 0); in mtk_smi_common_probe()
770 if (IS_ERR(common->smi_ao_base)) in mtk_smi_common_probe()
771 return PTR_ERR(common->smi_ao_base); in mtk_smi_common_probe()
773 common->clk_async = devm_clk_get(dev, "async"); in mtk_smi_common_probe()
774 if (IS_ERR(common->clk_async)) in mtk_smi_common_probe()
775 return PTR_ERR(common->clk_async); in mtk_smi_common_probe()
777 ret = clk_prepare_enable(common->clk_async); in mtk_smi_common_probe()
781 common->base = devm_platform_ioremap_resource(pdev, 0); in mtk_smi_common_probe()
782 if (IS_ERR(common->base)) in mtk_smi_common_probe()
783 return PTR_ERR(common->base); in mtk_smi_common_probe()
786 /* link its smi-common if this is smi-sub-common */ in mtk_smi_common_probe()
787 if (common->plat->type == MTK_SMI_GEN2_SUB_COMM) { in mtk_smi_common_probe()
788 ret = mtk_smi_device_link_common(dev, &common->smi_common_dev); in mtk_smi_common_probe()
800 struct mtk_smi *common = dev_get_drvdata(&pdev->dev); in mtk_smi_common_remove()
802 if (common->plat->type == MTK_SMI_GEN2_SUB_COMM) in mtk_smi_common_remove()
803 device_link_remove(&pdev->dev, common->smi_common_dev); in mtk_smi_common_remove()
804 pm_runtime_disable(&pdev->dev); in mtk_smi_common_remove()
811 const struct mtk_smi_reg_pair *init = common->plat->init; in mtk_smi_common_resume()
812 u32 bus_sel = common->plat->bus_sel; /* default is 0 */ in mtk_smi_common_resume()
815 ret = clk_bulk_prepare_enable(common->clk_num, common->clks); in mtk_smi_common_resume()
819 if (common->plat->type != MTK_SMI_GEN2) in mtk_smi_common_resume()
823 writel_relaxed(init[i].value, common->base + init[i].offset); in mtk_smi_common_resume()
825 writel(bus_sel, common->base + SMI_BUS_SEL); in mtk_smi_common_resume()
833 clk_bulk_disable_unprepare(common->clk_num, common->clks); in mtk_smi_common_suspend()
847 .name = "mtk-smi-common",