Lines Matching refs:mxl111sf_write_reg
47 ret = mxl111sf_write_reg(state, 0xff, 0x00); /* AIC */ in mxl1x1sf_soft_reset()
50 ret = mxl111sf_write_reg(state, 0x02, 0x01); /* get out of reset */ in mxl1x1sf_soft_reset()
64 ret = mxl111sf_write_reg(state, 0x03, in mxl1x1sf_set_device_mode()
88 return mxl111sf_write_reg(state, 0x01, onoff ? 0x01 : 0x00); in mxl1x1sf_top_master_ctrl()
120 ret = mxl111sf_write_reg(state, V6_PIN_MUX_MODE_REG, V6_ENABLE_PIN_MUX); in mxl111sf_config_mpeg_in()
131 ret = mxl111sf_write_reg(state, V6_MPEG_IN_CLK_INV_REG, mode); in mxl111sf_config_mpeg_in()
165 ret = mxl111sf_write_reg(state, in mxl111sf_config_mpeg_in()
183 ret = mxl111sf_write_reg(state, V6_MPEG_IN_CTRL_REG, mode); in mxl111sf_config_mpeg_in()
213 ret = mxl111sf_write_reg(state, V6_I2S_NUM_SAMPLES_REG, sample_size); in mxl111sf_init_i2s_port()
245 ret = mxl111sf_write_reg(state, V6_I2S_STREAM_START_BIT_REG, tmp); in mxl111sf_config_i2s()
255 ret = mxl111sf_write_reg(state, V6_I2S_STREAM_END_BIT_REG, tmp); in mxl111sf_config_i2s()
268 ret = mxl111sf_write_reg(state, 0x00, 0x02); in mxl111sf_config_spi()
281 ret = mxl111sf_write_reg(state, V8_SPI_MODE_REG, val); in mxl111sf_config_spi()
285 ret = mxl111sf_write_reg(state, 0x00, 0x00); in mxl111sf_config_spi()
315 ret = mxl111sf_write_reg(state, V6_IDAC_HYSTERESIS_REG, in mxl111sf_idac_config()
320 ret = mxl111sf_write_reg(state, V6_IDAC_SETTINGS_REG, val); in mxl111sf_idac_config()